This disclosure relates to a video output circuit for high resolution character generation in a digital display unit. This output circuitry includes both character generation circuits and logic circuits, the latter of which fills in information bit areas adjacent to character bit areas which form a diagonal so as thereby to round out the character being displayed. In addition, the circuitry is adapted to change the position of such characters on the display screen so as to provide superscripts and subscripts as well as provide characters which are higher and wider than the normal character display. In order to minimize time lags in the generation display of such characters, the output circuitry is provided with a series of registers so that the character generation can be received in a sequential or pipelined manner.
An image display apparatus includes a programmable raster line address generator that repeatedly displays programmably selected raster lines of a stored pattern a predetermined number of times to enlarge the stored pattern when displayed. Programmable registers store integers that select which raster lines are to be repeatedly displayed.
A matrix printer normally cooperates with a particular character generator by means of which coded information representing characters to be printed is translated into a matrix of print commands for print styli printing dots out of which a character is composed. In accordance with the invention, the same character generator is used for printing smaller characters in superscript, subscript or in formal footnotes, by using a particular algorithm to translate the generator information into different set of information for each character, so as to reassign print commands for the several print styli.
A video display control unit controls characters to be displayed on a sequential scanning display unit (4). Namely, it reads address-specifying information and attribute information from a video memory (5) along scanning sequence of a screen in a continuous and address-unit time-divisional manner on the basis of address signals from a memory address counter (6). The read attribute information is outputted on a multiplex bus (42) through a gate (34) and delayed by a predetermined period by a pipeline register (40) to be supplied to a video signal encoder (18). The read address information is supplied to a character generator (16) so that character information is read from the character generator (16). The character information is outputted on the multiplex bus (42) through a gate (36) and delayed by a predetermined period in a pipeline register (38) to be supplied to the video signal encoder (18). The video signal encoder (18) outputs video signals on the basis of the attribute information and the character information.
A character generator, comprising: a font memory for storing dot patterns of fonts; a first-in first-out memory for loading dot pattern data in unit of one byte successively, which generates a load request signal when the memory has empty spaces; an input control unit for accessing a dot pattern of a font to be printed and for transmitting a dot array data of one byte to the first-in first-out memory when the load request signal is received; and an output control unit for sending an output request signal to the first-in first-out memory to receive dot array data from the first-in first-out memory, and for transmitting the dot array data to a dot-image printer synchronously with a load request signal from the dot-image printer.
A display control device according to the present invention includes a common memory having two functions, one as a refresh memory for outputting a character code and the other as a character generator for generating a character font, an output character code from which is stored in a line buffer. In this case, a display address generator circuit generates a character address for generating the character code and a raster address for designating the character font, which are in turn switched by an address selector and outputted to said common memory which then outputs a video signal to a video control circuit based upon said character font. Additionally, there is provided a line buffer control circuit for outputting a read/write access control signal to said line buffer based upon the raster address.
