 |
Description  |
|
|
TECHNICAL FIELD
The application relates to an improvement in the electrical timing power
control art.
BACKGROUND OF PRIOR ART
The invention described herein relates to timing devices for electrical
power circuits like lighting and appliance circuits in residences. In
recent years a large demand for automatic and/or remote control of
residential lighting has developed as a result of the increased crime rate
involving home invasions. Automatically timed controlled of lighting has
become widely accepted as a significant deterrent for prevention of home
invasion. Also, the remote operation of lights, either automatically, from
an intrusion alarm system, or from a remote location such as a bedside
unit, is a desirable feature of a home protection system.
Automatic light timers commonly available today are motor driven
mechanically activated switches. The least expensive type provides a
single "on" time selection and a single "off" time selection for each
24-hour period. Some mechanical timers provide for the selection of one
hour "on" or "off" intervals that can be arranged in any pattern. The
pattern is repeated every 24 hours. The most popular timer type is self
contained, with a two-prong plug integral with a housing therefor for
directly plugging into the usual household electrical outlet. The housing
also has an integral socket for plugging in the lamp or appliance to be
controlled. Another timer type has a power cord and is designed for
setting on the floor or table top. Some manufacturers offer timers for
permanent wall mounted installation to control lighting fixtures. To
further enhance the usefulness of automatic light timers as a deterrant
against home invasions, some timers have a feature that alters the actual
"on" time from day to day so that a more probable "lived in" pattern
results.
Mechanical motor driven timers have achieved great popularity because of
their low cost. However, because of the limitations of mechanical systems,
mechanical timers presently in use suffer from a number of disadvantages.
Thus, mechanical timers tend to be unreliable and noisy (especially after
some period of use), forcing many owners to abandon their use in quiet
areas such as studies and bedrooms. Mechanical timers are also large and
bulky and therefore have not lent themselves widely to convenient
table-top use with "decorator" type styling. The size and bulk of
mechanical timers precludes their installation into a flush device
electrical box, such as commonly houses wall switches for the control of
outdoor or ceiling lighting fixtures.
Inexpensive mechanical timers have "MANUAL/AUTOMATIC" settings on a switch
selector. When the timer is in the "AUTOMATIC" mode usually the light
cannot be turned on or off without taking the timer out of the "AUTOMATIC"
mode. Thus if it is desired to change the light from its present
automatically programmed state to the opposite state (ON to OFF or OFF to
ON) the user must remember to return to "AUTOMATIC" before leaving the
room if he wants programmed control to continue. However, some mechanical
timers heretofore developed have an automatic override feature where the
automatic control returns to operation automatically when the manual
setting and automatic setting subsequently correspond.
It is, accordingly, one of the objects of the invention to provide a timer,
which has its most important but not its only application to automatically
energize and de-energize home lighting, entertainment equipment or
appliance circuits, and wherein the timer is capable of providing a number
of "on" and "off" intervals over a 24-hour period by electrical control
circuitry which may be made in the form of integrated circuits, so that
the resulting timer operates quietly and can be made in a very compact and
attractive form, and wherein a measure of variability is automatically
provided in the pattern of such "on" and "off" intervals from one day to
the next. A timer which if unattended actuates a load device such as an
externally visible interior electric light in, for example, a dwelling,
according to an invarying on-off pattern (hereinafter referred to as the
duty profile) from one day to the next is considered to present to an
external observer an inadequate illusion of occupancy. A precise daily
repetition of the stored program would, it is believed, be readily noted.
A mechanical timer which automatically varies the duty profile on
successive days is the "Super-Cop" timer marketed currently by
Sears-Roebuck, Inc. (Model No. 796.664000). This unit, however, produces
only a single cycle, i.e. one off-on-off transition pattern at two
mechanically presettable times, said times being preset by manually
positioning two tabs on the face of a graduated 24-hour rotating dial.
Dogs attached to the tabs engage canes on a camshaft to intermittently
rotate the camshaft to actuate a simple microswitch. By appropriate cam
shaping, the actuation cycle is displaced in time by a fixed number of
minutes on alternate days, the duty profile cycle thereby repeating every
48 hours.
There has been described in a co-pending application by R. Goldstein and L.
Schornack entitled "Timer and Power Control System," Ser. No. 22,453 filed
Mar. 21, 1979, an invention relating to a programmable timer. The electric
timer of that invention is a 24-hour repeat cycle timer which controls an
external load device such as an electric light according to a bit pattern
stored in a memory unit which may be a random access memory, but which is
most advantageously a recirculating bit shift register having the same
number of stages as the number of basic programmable time intervals, e.g.
15 or 30 minutes, over a 24-hour period. Output sensing from a selected
register stage actuates a triac, which in turn actuates the load device.
The bit pattern is advanced automatically at the regular basic timing
intervals by internal timing means. A pushbutton override allows the user
to turn the load device on or off while the timer is in operation without
disturbing the stored pattern. In one mode of operation rapid programming
in a manner of a minute or so may be achieved by rotating a dial knob. In
another mode of operation, real time programming is achieved during the
first 24 hours after the timer is activated by application of power in
accordance with the load device on and off duty profile as obtained by the
normal operation of the pushbutton used as a normal on and off control.
Another and more specific object of the invention is to vary the duty
profile of such a timer in such a way that if the stored program is
unchanged from one day to the next, the duty profile is different for any
two consecutive days.
BRIEF SUMMARY OF INVENTION
The electric timer of the invention is a 24-hour repeat cycle timer which
may be constructed to fit into a conventional wall-switch housing. The
principal purpose of the timer is to create an illusion of occupancy in an
unoccupied dwelling by periodically activating an external load device
such as an interior light visible from the outside. The timer
automatically controls the load device to display a daily on-off pattern
(duty profile) set by the user and represented by a bit pattern stored in
the storage locations of a memory unit. The status of each bit ("0" or
"1") indicates the user's desired state of the output device, i.e. off or
on, during a basic timing interval, e.g. 15 minutes, associated with each
bit. The stored bits are read out sequentially from the memory unit at the
rate of one bit per basic timing interval, the bit so read out governing
the status of the load device throughout that interval via a triac control
circuit responsive to the memory unit output. A tour of the stored bit
pattern requires 24 hours, whereupon the cycle is repeated. The device is
thereby actuated in real time (observer time) to on or off condition
during successive basic timing intervals throughout each successive
24-hour cycle.
The preferred memory unit is a recirculating shift register wherein the
desired 24-hour pattern of off and on periods is stored in the form of "1"
and "0" bits in sequential stages. The bit pattern is advanced at the
beginning of each basic timing interval, the associated control circuitry
being governed by the bit currently residing in a chosen output stage of
the register. Because the register is recirculating, i.e. the output stage
contents are fed back to constitute the contents of the input stage, the
duty profile will repeat after a number of advances equal to the number of
stages. For a 24-hour cycle of 15 minutes basic timing intervals, a 96
stage register is required.
An alternative form of memory unit is a random-access memory (RAM), wherein
each bit is stored in separate consecutive one-bit locations. By accessing
the locations (addresses) sequentially every basic timing interval and
resetting for a fresh tour after accessing the last location, the same
functional behavior is achieved as with the shift register system, but at
significantly increased cost represented by the RAM itself, memory access
decoders, and related circuit elements.
To increase the illusion of occupancy a deliberate variation of the duty
profile is introduced every 24 hours so that the same duty profile is
never presented in any two consecutive 24-hour periods. Two methods are
used to accomplish this. The first and simplest method is to take the
output sensing signal on alternate days from two different, preferably,
adjacent, stages of the memory unit. By taking the output sensing signal
alternatively every 24-hour period from one stage or the other, the duty
profile for alternate days is shifted by one basic timing interval, e.g.
15 minutes. This method preferably employs a shift register memory unit,
wherein the output sensing is taken from adjacent output stages on
alternate 24-hour cycles. This method is disclosed but not claimed in the
parent application of R. Goldstein and L. Schornack, and is the sole
invention of L. Schornach. Here again, a more expensive version could
equally well employ RAM storage of the bit pattern, wherein for each
alternate 24-hour cycle tour of the RAM by the readout system a different,
preferably adjacent, storage location is chosen for the starting point of
the tour.
Although simple and therefore cost efficient, this general method suffers
from a form of transition distortion that may in certain circumstances
cause one output bit to be "lost" during the changeover from one stage to
the other. A possible result is that a user could erroneously believe his
unit to be malfunctioning. For this reason the basic timing intervals must
be kept fairly short to prevent such distortion from becoming grossly
annoying to the user, with the result that a memory unit of
correspondingly large capacity must be employed. A system that reproduces
the stored program more faithfully but still shifted in time could employ
longer basic timing intervals and thereby employ a smaller, less expensive
memory unit.
Such an improved system, requiring a few additional inexpensive components,
employs shifting the system timing means. By accessing the stored bit
pattern on alternate days at the same rate, e.g. one bit sensing every 30
minutes, but at a constant time offset, e.g. several minutes late for each
sensing, the stored pattern is replicated to produce on alternate days a
time-shifted duty profile exhibiting at most a moderate destortion of one
output block, but with no block loss whatever. Larger timing intervals and
a smaller memory may thus be used.
In the preferred form the offset of system timing is achieved by the
generation of a pair of pulses for each 30-minute basic timing interval,
an "early" pulse and a "late" pulse generated 16 minutes thereafter.
In the preferred form of this embodiment of the invention, the program is
stored as a bit string in a 48 stage recirculating shift register, the bit
string being advanced by the early pulse. Output sensing is taken on
alternate 24-hour periods from the last stage of the register either
synchronously with the early pulse or synchronously with the late pulse
via a storage latch. The purpose of the latch is to preserve a replica of
the bit advanced into the output stage by the early pulse. Since the next
early pulse will advance the string again, such replication is necessary
to bridge between successive late pulses. By preloading the internal
timing means during a reset operation the occurrence of the early and late
pulses are symmetrized in time to result in the early and late displays
occurring 8 minutes early and 8 minutes late respectively with respect to
the programmed sequence times entered by the user.
Alternatively, RAM system could equally well employ such offset timing
means to govern access times to storage locations on alternate days. In
such an arrangement the access timing would be derived either exclusively
from the early or late pulses on alternate days. Since there is no storage
disturbance generated by the early pulse, no latch is required, however,
the RAM system would still be significantly more expensive to implement
for the reasons previously stated.
Other objects, advantages, and features of the invention will become
apparent upon making reference to the description to follow, the drawings,
and the claims.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a functional block diagram of an exemplary timing system to which
the present invention may be applied;
FIG. 2 is a front elevation of a wall mounted switch opening timer
incorporating the timing system of FIG. 1.
FIG. 3 is a detailed block diagram of the timer system of FIG. 1 utilizing
for one version of the timer of the present invention employing alternate
register stage program readout to achieve a variable duty profile on
successive days of timer operation;
FIG. 4 is a functional circuit detail of the edge activated pulse
generating circuit shown in FIG. 3;
FIGS. 5A and 5B are timing diagrams of a single "on" block transiting
register stages 95 and 96 of the circuit of FIG. 3 to illustrate possible
bit loss during a 24-hour transition;
FIG. 6 is a detailed block diagram of the timer system of FIG. 1 utilizing
control circuitry of a second version of the present invention using
delayed and advance system timing pulses to achieve a variable duty
profile on successive days of timer operation;
FIGS. 7A-7F are timing diagrams applicable to the circuit of FIG. 6; and
FIGS. 8A and 8B respectively show details of the modified system block of
FIG. 6 and its timing diagram respectively.
DETAILED DESCRIPTION OF INVENTION
Referring now more particularly to FIG. 1, the timer system there shown,
and to which the present invention will be applied, as energized from AC
power lines 2--2'. The timer includes power switch 4, which may be a
triac, having load terminals 4a-4b connected between power line 2 through
a power on-off switch 8 (subsequently to be identified with the reset
function) and a conductor 2" extending from load terminal 4b to one
terminal of a device 5 to be controlled shown as a lighting device.
The power switch 4 is operated to a circuit closing condition by signals
from the control circuit 12 via control line 12a. These signals
alternately occur and terminate upon successive operation of a turn-on and
turn-off means 15, which most preferably includes a momentary contact
pushbutton 18. Conductors 3--3', are shown extending from the power switch
4 to a DC power supply means 6 which converts AC to DC used to energize
the various electrical circuits identified more fully in FIGS. 2-8 and to
be described later on in the specifications.
The timer system shown in FIG. 1 has a manually operable timer on-off
setting means 19 which sets the timer system into either a TIMER-OFF or
TIMER-ON mode of operation. As illustrated, this setting means includes a
manually operable arm 19a which is settable from an initial RESET
position, where all of the control circuits to be described are reset to a
reference condition, to either a TIMER-ON or TIMER-OFF position. The RESET
position of arm 19a preferably opens the main power on-off switch 8
controls the input power to the entire timer system. Output conductor
means 19b extend from the setting means to the control circuit 12. Control
signals appear on output conductor means 19b which identify to the control
circuit 12 the position of the timer-on and timer-off setting means 19.
When this setting means is set to a TIMER-OFF condition, the lighting
device 5 is operated in a normal manner by the push button 18. When the
setting means 19 is in its TIMER-ON condition, the control circuit 12 will
operate the power switch 4 in accordance with programming information
stored in an on-off storage means 21. The marker storage means 21 has a
number of storage locations in which timer-on and timer-off markers can be
stored indicating the particular timer interval or intervals of a 24-hour
period during which the control device 5 is to be selectively
automatically energized and de-energized. The "markers" can be binary
digits "1" and "0" stored in individual stages of a shift register in the
most preferred and advantageous form of the invention. The storage means
21 has a data output line 21a extending to the control circuit 12. When
control arm 19a is in the "TIMER-ON" position and the timer is programmed,
power switch operating signals on line 21a derived from the markers stored
in the storage means 21 effect operation of the power switch 4. When the
control arm 19a is in the "TIMER-OFF" position, the power switch is only
operating by the pushbutton 18. The depression of pushbutton 18 will
override the timer and change the power switch state at all times.
"Real time" programming of the timer system is effected by simply operating
setting means 19 (FIG. 1) first to its RESET condition and then operating
the same to the TIMER-ON or TIMER-OFF condition. When the setting means is
operated form its RESET condition to TIMER-ON or TIMER-OFF, for the first
24-hour period thereafter an on or off marker is set automatically in the
storage location of the storage means 21 identifying each time interval
over their first 24-hour operating period of the timer system in
accordance with the operation of the manually on-off control 18 during
each timer interval. Thereafter, no programming can take place until the
setting means 19 is returned to its RESET condition. The fact that the
timer is in the process of being programmed (i.e., the first 24-hour
period of the timer system operation after movement of the control arm 19a
from its RESET to a programming position) may be indicated by energization
of a lamp 14. After this 24-hour programming period has terminated, the
lamp 14 (which may be a red light source) is de-energized. FIG. 1 shown
control circuit output conductor means 12b extending between control
circuit 12 and red light source 14 to control the same in this manner.
The timer of FIG. 1 can also be fast programmed in a minute or so by
rotating a time dial knob 18', which may also be depressible to act as a
pushbutton 18 depressing knob at the designated times to set an "ON" or
"OFF" in storage means 21 corresponding to the resulting power switch
condition.
FIG. 2 shows one embodiment of such a timer designed to mount in a
conventional wall switch receptacle, and is described in detail in the
previously referenced co-pending application of Goldstein and Schornack.
The unit as shown is mounted behind a conventional slotted cover plate 39,
and presents to the operator a three position switch arm 19a to actuate
the timer off-on setting means 19 of FIG. 1, the 24-hour programming lamp
14, and the pushbutton 18 and time dial knob 18' actuating the turn-on and
turn-off means 15. The timer dial knob 18' is graduated by hour 28b and
15-minute 28b' markings identifying 15-minute basic timing intervals and
is settable to a present time indication with respect to a stationary
reference mark 29. The desired program is entered by resetting the timer,
then rotating the dial sequentially to a series of chosen device actuation
times, pushing the pushbutton 18 to command a change of state of the power
switch 4, i.e. off to on, or on to off, at each such chosen time. The
desired device duty profile is thus entered in memory, and may be verified
by rotating the dial again while observing a memory readout lamp 25' whose
energized state duplicates programmed load device on states. Finally, upon
returning the dial to the proper local time, the system is properly
programmed to replicate the stored program at the chosen times of the day
or night.
The storage of markers is made by a timing means 26 (FIG. 1) which produces
on an output conductor means 26a thereof timing pulses which are spaced
apart by the duration of a basic programmable time interval such as 15
minutes in the example of the invention being described. The output
conductor 26a is shown extending to the control circuit 12. The timing
means 26 will subsequently be alternatively termed the system clock.
Refer now to FIG. 3 which illustrates, among other things, a detailed block
diagram of one version of exemplary control circuit represented by a
single block 12 in FIG. 1. Also, FIG. 3 shown details of the lighting
turn-on and turn-off means 15 and the timer on-off setting means 19 not
shown in FIG. 1.
When the timer system of the invention is mounted in a wall switch opening
of a new home as it is being built, it could be wired to receive its
control power directly across the voltage AC power lines 2--2' without too
much difficulty. However, this is not so when it replaces a conventional
toggle on-off wall switch, since access to both AC power supply lines
2--2' is not normally made thereto, and it would be advantageous if the
wall switch opening mounted embodiment of the invention did not require
rewiring of an existing wall switch opening. Accordingly, in FIG. 3 the AC
input to the DC power supply 6 is shown connected by a pair of conductors
3 and 3' across the terminals 4a-4b of the triac 4 where the wall switch
opening contains only the input power conductor 2 and the conductor 2"
extending to a remote lighting or other controlled device 5. In the
circuit shown, when control arm 19a is in a TIMER-ON or TIMER-OFF position
there is obviously voltage present across the triac when it is in a
non-conductive state. When, however, the triac is to be conducting, there
is a short non-conducting period at the beginning of each half cycle of
the applied AC voltage during which current is routed into the triac
control terminal 4c to trigger the triac into conduction for the half
cycle. When this current into the triac control terminal reaches a given
threshold value, the triac starts conduction. It is during this short
period during each half cycle when the triac is in the non-conductive
state that the DC power supply 6 obtains its control power. It is old in
the prior art to provide a DC power supply 6 which obtains its control
power in this way. (One such circuit is shown in U.S. Pat. No. 3,940,660,
granted Feb. 24, 1976, to F. Edwards.) It will be assumed that the DC
output from the power supply 6 will be adequate to energize the various
circuits identified in block form in FIG. 3.
FIG. 3 shows the timing means 26 constituting the system clock as a
conventional pulse divider circuit which receives pulses at a pulse
repetition rate of 60 (or 120) pulses per second, either directly from the
AC power lines 2--2' or from another part of the circuit. The pulse
divider circuit 26 will produce on its output line 26a thereof pulses
which are spaced apart time intervals equal to the basic programmable time
interval of the timer system, which is 15 minutes in one embodiment of the
invention. The output line 26a extends to the input of a self-resetting
pulse counter 109 which resets itself automatically to zero count when
receiving a number of pulses representing a 24-hour period. (It will be
assumed that any gate circuit shown in the drawings will be opened when it
receives on its control terminal a "1" binary signal and will be closed
when it receives a "0" binary signal.)
The pulse counter 109 has an output terminal 109b which has a normal "0"
binary voltage state which changes to a "1" binary voltage state when the
pulse counter reaches its maximum count. (The pulse counter 109, i.e.
every 24 hours, will provide a "1" binary output state every 96 pulses,
when the pulse divider circuit output produces pulses 15 minutes apart.) A
line 110 interconnects the pulse counter output terminal 109b and the "S"
terminal of a set-reset bistable 111. The set-reset bistable 111 is set by
a "1" binary signal from the pulse counter 109 and is reset only when
power is removed therefrom, as when the timer on-off setting means 19 is
in its RESET position, or upon failure of the power system. (The control
arm 19a, it will be recalled, is only returned to its RESET condition when
it is desired to initially program or re-program the timer system.) The Q'
and Q output terminals of the bistable 111 are respectively connected by
conductors 114' and 114 to the control terminals of respective gates 118
and 118' which are respectively initially open and closed during
programming and are respectively closed and opened after the timer system
has been programmed.
A differentiating network 113 is connected to the output terminal 109b of
pulse counter 109 to derive pulses across a resistor 113a during each
change of the voltage condition at the terminal 109b.
The 15 minute pulses from the divider circuit 26 are coupled by a line 117
to the shift pulse terminal 119 of a conventional but uniquely used shift
register 21 constituting the previously described storage means 21. The
shift register 21 has 96 individual stages, stage numbers 95 and 96 having
output terminals numbered 95 and 96. When a stage is reset it has a "0"
binary output state representing a power-off marker state, and when the
stage is set it has a "1" binary output state representing a power-on
marker state. (The binary states "0" and "1" represent respectively zero
and plus DC voltage states in the example of the invention being
described.) Also, a "1" binary signal fed to a data input terminal 120 of
the shift register will cause the output terminal of the first stage
thereof to assume a "1" binary voltage state. Conversely, a "0" binary
signal fed to the data input terminal 120 will cause this output terminal
to assume a "0" binary voltage state. The feeding of a shift pulse to
shift pulse terminal 119 will cause the various binary states on the
output terminals of the various stages of the shift register to shift one
stage forward. The aforesaid gate 118 is connected between the output
terminal 21 of the shift register 96 of the 96th stage and the data input
terminal 120. The gate 118 is open only after completion of a real time
programming of the timer system to recirculate the markers in the shift
register.
The outputs of the shift register 21 appearing on output terminal 96 of the
96th stage and on output terminal 95 of the 95th stage are respectively
coupled through gates 122 and 122' to a common output line 124 which
effects control over the power switch 4 in a manner to be described. The
gates 122' and 122 are operated in an opposite sense so that when one gate
is open the other is closed, and vice versa. The gate circuits 122 and
122' are controlled by a toggle bistable 126 having Q' and Q outputs
respectively connected by conductor 126a' and 126a to the control
terminals of gates 122' and 122. The toggle bistable 126 has a toggle
input terminal "T" which is connected to the differentiating network
resistor 113a associated with pulse counter 109, so that the toggle
bistable is successively operated between set and reset conditions every
24 hours where the gates 122 and 122' are alternately opened and closed.
Accordingly, when the timer system is operated to its TIMER-ON mode of
operation the power switch control signals from the shift register will
alternately be the turn-on or turn-off markers in the 95th and 96th stages
of the shift register, so that the control functions carried out by the
shift register 21 will vary somewhat on successive days. This accomplishes
the object of the invention in one form, and will be discussed in detail
subsequently. An improved version will also be presented subsequently.
It will be recalled that during real time programming, the markers are set
into the storage means (shift register) 21 by the on-off operation of the
control means which normally would control the operation of the lighting
or other controlled device 5. In FIG. 3, this on-off control is the
pushbutton 18. When pushbutton 18 is momentarily depressed, contacts 18a
and 18b connected respectively to a source of positive voltage and line
18b are closed so that a "1" binary signal is produced. The output line
14a is coupled to the input of an "OR" circuit 127 whose output is coupled
to the "T" terminal of a toggle bistable 129. The Q terminal of the
bistable 129, on which a "1" binary signal appears when the bistable is
set and on which appears a "0" binary signal when the bistable is reset,
is coupled by a conductor 132' to one input of an "AND" gate 134 whose
other input extends is connected to the output of a negative edge one shot
multivibrator 136 whose input is connected to the output of a zero
crossing detector 135 whose input is connected by conductors 137--137'
respectively across the triac terminals 4a-4b. The zero crossing detector
135 is a conventional component which produces a voltage (e.g. a positive
voltage) on its output line 135c during the period when the input thereof
falls between small values on either side of zer | | |
