A method of operation of a memory array for storage of records of differing predetermined sizes is disclosed which features division of the array into domains which are substantially integral multiples of the predetermined record sizes. In a preferred embodiment the domain allocation may be varied adaptively in accordance with usage so as to enable more fully efficient use of the array.
A data-storage buffer transfers data signals with other units in relatively large blocks of data. Such large blocks storable in large address spaces are not always filled with meaningful data. To more efficiently use the data-storage space in the data-storage buffer, the allocatable unit or segment of the data buffer is made smaller than the data capacity of the large block. Each time a large block of data is to be written into the data buffer, a sufficient number of the segments for storing data of one large block is allocated for receiving the data. After the data of the one block is written into the data buffer, the allocated segments are examined; all of the allocated segments not storing data from the one large block are deallocated. The invention is particularly useful for data buffers acting as cached data storage for large-capacity direct-access storage devices (DASD) and are coupled to host processors programmed to operate with such DASD. The procedure is followed for data written into the caching data storage whether supplied by DASD or the host processors.
A data cache in a computer operating system that dynamically adapts its size in response to competing demands for processor storage, and exploits the storage cooperatively with other operating system components. An arbiter is used to determine the appropriate size of the cache based upon competing demands for memory. The arbiter is entered cyclically and samples user's wait states. The arbiter then makes a decision to decrease or increase the size of the cache in accordance with predetermined parameters.
Methods for managing a Least Recently Used (LRU) cache in a staged storage system on a prioritized basis permitting management of data using multiple cache priorities assigned at the data set level. One method uses the signed difference between an assigned and actual hit ratio to dynamically allocate cache size to a class of data and its correlation with priority of that class. Advantageously, the hit ratio performance of a class of data can not be degraded beyond a predetermined level by a class of data having lower priority. Another method dynamically reallocates cache space among partitions asymptotically to the general equality of a weighted hit rate slope function attributable to each partition. This function is the product of the slope of a weighting factor and the partition hit rate versus partition space allocation function. Cache space is dynamically reallocated among the partitions in a direction that forces the weighted hit rate slope for each partition into equality over the entire cache. Partition space is left substantially unchanged in those partitions where the weighted hit rate slope is non-positive. Hit rate is defined as hit ratio times I/O rate.
A reconfigurable set associative cache memory can be reconfigured from 2.sup.x way to 2.sup.y way set associative cache memory by effectively merging a predetermined number of least significant bits of the tag field of the main memory address with the line field of the main memory address. The effective merging is provided by logically merging least significant bits of the tag field with a reconfiguration designation. As a result, Y-X+1 different configurations of cache memory can be obtained using the Y-X least significant bits of the tag field merged with the cache memory address.
A storage control system with auxiliary storages includes a system information generator which determines an optimum process data length and gap value to minimize switching between cylinders or tracks in reading/writing of data based on device information obtained from a specified auxiliary storage. Based on the determined optimum process data length and gap value, a data area generator secures a data area on the specified auxiliary storage. The system information generator determines the process data length and the gap value so that the process data length is less than the size of a track in the specified auxiliary storage and satisfies either of the following conditions: (a) Size of a track can be divided by the process data length; or (b) Sum of the process data length and the gap value is a value obtainable by multiplying the track size by an integer.