A electronic digital processor system input/output circuitry including several input/output data ports where each port contains receiving circuitry to receive bit data from bit data pads and transmitting circuitry to transmit bit data to the data bit pads and control circuitry that provides for a configuration where one input/output port may respond to the address of another input/output port, allowing the second input/output port to perform other functions. This capability would allow a user to execute a program that emulates one configuration while the actual, physical connection of devices is, in fact, another configurations. The input/output circuitry also include control circuitry that determines whether the port is to receive bit data or to transmit bit data. This circuitry is connected to a data bus that couples the input/output data ports to the remaining electronic digital processor system.
An electronic output buffer includes an inverter connected to an input line with several circuit devices for driving an output. The buffer further includes the programmable capability at manufacture for selecting one of several buffer configurations by selectively connecting the inverter and the input line to the circuit driving devices and by selectively connecting the circuit driving devices to one of at least two voltage sources.
In a microprocessor having a programmable logic array there are provided a program counter for designating an instruction data, a data bus line, a timing and control circuit for outputting an internal reset signal in response to an external reset signal, a programmable logic array that outputs a reset data signal and a reset data bus control signal by interpreting the reset signal as an instruction, and a gate circuit for sending the reset data signal to the data bus line in response to the reset data bus control signal to reset the program counter.
In a microcomputer, an address mapper allows the user to selectively map a resource which is ordinarily addressable in one portion of the address range of the microcomputer into a correspondingly sized area elsewhere in the address range. Using a resource map address stored by the user in an addressable map register, the mapper continuously compares the map address to a corresponding number of bits on the microcomputer's address bus. When a match is detected, the mapper enables the address decoder of the mapped resource. The mapper can also map the map register. Since the mapper can map more than one resource, an interlock mechanism resolves access conflicts.
A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
A microcontroller integrated circuit comprises a processor core which exchanges data with at least one data processing and/or storage device. The integrated circuit comprises a mask-programmed read only memory containing a generic program such as a test program which can be executed by the microcontroller. The generic program includes a basic function for writing data into the data processing and/or storage device or devices. The write function is used to load a downloading program. Because a downloading program is not permanently stored in the read only memory, the microcontroller can be tested independently of the application program, and remains standard with regard to the type of memory component with which it can be used in a system.
