An address buffer for a dynamic memory includes a flip-flop. The flip-flop is coupled at its one input/output terminal with both a first input circuit and a third input circuit connected in parallel with each other and at its other input/output terminal with a second input circuit. The second input circuit receives a reference voltage and is activated by an external address timing clock during a normal operation mode. The first input circuit is also activated by the external address timing clock, but receives an external address. The third input circuit receives an internal refresh address and is activated by an internal refresh address. The address buffer cooperates with a switcher which produces the internal refresh address timing clock and the external address timing clock, alternatively, by switching a basic timing clock generated by an address drive clock generator.
An address control apparatus for a semiconductor memory device using a bank address, and more particularly an address control apparatus for a semiconductor memory device using a bank address being concurrently used as a row address in accordance with an architectural bank in realizing various dynamic random access memory (DRAM) macro sets more than 2M.about.64M, utilizing a memory compiler in embedded-DRAM, resulting in reduced design time for the macro sets with a minimum of circuit elements.
A circuit for generating internal power voltage comprising: a comparison unit for comparing reference voltage and internal voltage; a buffer unit, its input terminal comprising CMOS inverters, for buffering an output signal of the comparison unit; a buffer control unit for controlling current flowing through the CMOS inverters of the buffer unit less than a predetermined amount in regular operations and for controlling current flowing through the CMOS inverters of the buffer unit more than a predetermined amount in active operation; a first current supply unit for supplying current according to an output signal of the buffer unit; and a load unit for generating internal voltage by current supply from the first current supply unit.
