A distributed amplifier having a plurality of successively coupled field effect transistors with cascaded gate electrodes and cascaded drain electrodes. A first one of such transistors has the gate electrode thereof coupled to an input terminal adapted to receive an input radio frequency signal and the drain electrode thereof coupled to a dc drain electrode bias circuit. The last one of the successively coupled field effect transistors has the gate electrode thereof coupled to a dc gate electrode bias circuit and a drain electrode coupled to a radio frequency output terminal which produces an amplified radio frequency signal. The source electrodes of the plurality of transistors are coupled to ground. A drain bias voltage source is coupled between ground and the drain electrode bias circuit, such bias circuit providing a direct current path between such drain bias voltage source and the drain electrodes of the transistors. The drain electrode dc bias circuit has a complex impedance with the real component thereof being provided, in part, by a resistor in such bias circuit. The resistor is coupled in series with a grounded high frequency by-pass capacitor and, hence, is not in the direct current path between the drain bias voltage source and the drain electrodes, but rather is in the radio frequency signal path to ground. With such arrangement, only a relatively small amount of dc power is dissipated by the resistor in such drain biasing circuit.
An integrated amplifier circuit for monolithic fabrication is disclosed. circuit includes a plurality of amplifier stages between an input transmission line and an output transmission line. Each stage includes a FET formed on the surface of a semi-insulating substrate such as gallium arsenide (GaAs). The gate of each FET is connected to the input transmission line, while the drain is connected to the output transmission line. The source is connected through the semi-insulating substrate to a conductive layer. A received signal propagates as a traveling wave along the input transmission line, and is amplified by each of the FETs. The phase delay between the gates is the same as that between the drains, so that the amplified signal adds constructively on the output transmission line. Each of the transmission lines is terminated in its own characteristic impedance, which may be equal to the load.
A radio frequency matrix amplifier includes an input propagation network for successively connecting input electrodes of a first plurality of transistors. Output electrodes are successively coupled by an intermediate propagation network. The amplifier also includes a second plurality of transistors, having input electrodes successively coupled by the intermediate propagation network and output electrodes successively coupled by an output propagation network. A bias circuit for the amplifier includes an inductor connected between a last one of the second plurality of transistors and the intermediate propagation network and a plurality of capacitors disposed to connect reference electrodes of the second plurality of transistors to a reference potential. With this arrangement stages are connected in series for D.C. potentials and in cascade for r.f. potentials. In a preferred embodiment, capacitors are disposed between the input electrodes of each of the second plurality of transistors and the output electrodes of each of the first plurality of transistors to D.C. isolate the stages, and a voltage divider is disposed between the drain bias terminal and a reference potential for balancing input voltages at each of the inputs of the first plurality of transistors substantially independently of current through the output electrodes of each of the plurality of transistors.
A 2-18 gigahertz monolithic distributed amplifier using dual-gate gallium arsenide field effect transistors for maximum gain over the design bandwidth.
The disclosure relates to a gallium arsenide travelling-wave transistor oscillator which extends the oscillation frequency of the individual FETs by connecting them in parallel across a pair of inductive arrangements, either in common-gate or common-source configurations.
A distributed circuit includes a plurality of field effect transistors (FETS), each one of such FETS having gate, drain and source electrodes, with a first portion, or a first channel, of such FETS having gate electrodes and drain electrodes successively coupled between a first input terminal and an output terminal, and a second like portion or a second channel of such FETS having gate electrodes and drain electrodes successively coupled between a second input terminal and said output terminal. Separate bias circuits are provided to the input electrodes of the first and second channels. Bias signals fed to the bias circuits and coupled to the input electrodes place the FETS in an "on" state to provide gain to r.f. input signals fed thereto, or in a "pinch-off" state to isolate r.f. signals fed to the input electrodes of the FETS. Accordingly, a 2.times.1 switch or a two way active r.f. combiner which provides gain to a signal is provided.
