Symbols, each having a particular number (e.g. 9) of binary bits in first channels have individual periodicities. A symbol in each channel indicates the start and the periodicity of the symbols in that channel. Another symbol indicates the end of the symbols in that channel. The symbols from each channel are merged into sequential time slots, during the occurrence of the symbols in such channel, in a priority dependent upon the symbol periodicities in the different channels. Aperiodic symbols in second channels are merged sequentially into the time slots not occupied by the periodic symbols. Second portions (e.g. 5 bits) of the symbols in groups are provided in character frames without change. The binary bits (e.g. 4) in the first portion of each symbol in each group represent a decimal integer with an individual decimal significance. The resultant decimal value is represented in the character frame by a reduced number (e.g. 10) of binary bits. After transmission, the reduced number of binary bits are converted at a receiver to binary bits representing each decimal integer in the resultant decimal value. The converted bits for each symbol are combined with the bits in the second portion of the symbol to restore the symbol. The time slots for the periodic symbols of each individual periodicity are determined from the start symbol and the periodicity of such symbols. The symbols in the time slots of each individual periodicity are introduced to a separate channel. The aperiodic symbols are introduced to an additional channel.

A bit interleaved multiplexer system permitting byte synchronization of apparatuses communicating thereon without the consumption of additional aggregate bandwidth is provided. The system comprises a multiplexer, a demultiplexer, and an aggregate line. The multiplexer includes a transmit frame which includes a memory means and at least one recirculating counter which is programmed according to a framing algorithm, and a transmit data buffer and transmit mark buffer for each terminal which is to be connected to the system. Every time the transmit frame requests a predetermined bit of a byte (e.g. an MSB), a "1" is marked in the mark buffer. When a bit leaves the mark buffer it causes the terminal to write a bit into the transmit data buffer, with the written bit being an MSB when the bit leaving the mark buffer is a "1". By arranging the delay through the transmit mark and data buffers to be equal to I(L)+C, where I is an integer greater than zero, L is the length of a byte, and C is a constant phase shift, when the transmit frame requests an MSB, an MSB will be sent by the transmit data buffer C requests later. If C is set to zero, an MSB will be sent when the transmit frame so requests. The demultiplexer of the invention includes a receive frame which is synchronized with the transmit frame and which includes a memory means and at least one recirculating counter, and a receive data buffer and receive mark buffer for each terminal which is connected to the system. Every time the framing algorithm indicates that an MSB is being received by the receive frame, a "1" is marked into the receive mark buffer while the bit is forwarded to the receive data buffer. Because the receive mark and receive data buffers are equal in length, the terminal receiving information from the buffers will be provided with the information as to whether the received bit is an MSB.

A demand assign multiplexer has a multiplexing portion multiplexing a signal which can be transmitted in a statistical multiplexing. Also, the multiplexer has an output element for outputting a channel assignment demand depending upon a signal from a system which requires guarantee of transparent data transfer which guarantees content of transfer in a normal state of a transmission path. A control portion controls to perform demand assign process with channel assignment depending upon the output of the statistical multiplexing processing portion; and the signals which require guaranteed transparent data transfers.

Symbols, each having a particular number (e.g. 9) of binary bits in first channels have individual periodicities. A symbol in each channel indicates the start and the periodicity of the symbols in that channel. Another symbol indicates the end of the symbols in that channel. The symbols from each channel are merged into sequential time slots, in a priority dependent upon the symbol periodicities in the different channels. Aperiodic symbols in second channels are merged sequentially into the time slots not occupied by the periodic symbols. Second portions (e.g. 5 bits) of the symbols in groups are provided in character frames without change. The binary bits (e.g. 4) in the first portion of each symbol in each group represent a decimal integer. The resultant decimal value is represented in the character frame by a reduced number (e.g. 10) of binary bits. After transmission, the reduced number of binary bits are converted at a receiver to binary bits representing each decimal integer in the resultant decimal value. The converted bits for each symbol are combined with the bits in the second portion of the symbol to restore the symbol. The time slots for the periodic symbols of each individual periodicity are determined from the start symbol and the periodicity of such symbols. The symbols in the time slots of each individual periodicity are introduced to a separate channel. The aperiodic symbols are introduced to an additional channel.

The present invention provides a communications system that improves upon the availability of communications paths between devices and simplifies the connectivity requirements to communicate data and control information to and from a remote station. System nodes are provided which are disposed along a time multiplex network signal stream. The nodes serve to interface remote stations to the network signal stream and may also switch information to different stations connected to the same node. The nodes are operative to allocate a variable bandwidth of the network signal stream for data communications between devices connected to different nodes. The nodes include switching devices that may be configured to accommodate stations that operate at different speeds. Allocation of bandwidth may be dynamically varied such that system resources are not unnecessarily diverted. Control of bandwidth allocation and internal switching within the node is accomplished via control information communicated to and from the node. Such control information may be contained within the network signal stream and decoded by the node or communicated to the node via a dedicated control communications line. Control information may be encoded into the signal stream communicated between the system node and the remote station. Thus, communication of data and control signals between the stations and the system node does not require complex wiring. Accordingly, individual stations may be more conveniently located.