A data communication device for use either as an interface between a data processing device and a transmission medium of a CSMA/CD network or as a repeater between a CSMA/CD network and an additional data communication network which shares a transmission medium with the CSMA/CD network, sends an obstruction signal towards the CSMA/CD network when an input buffer tends to overflow on storing an input data packet for delivery to the data processing device or for transmission towards the additional data communication network. The obstruction signal is for causing a collision in the CSMA/CD network. The additional data communication network may be plural in number. When the additional data communication networks are CSMA/CD networks, the transmission of data packets thereto is suspended when a collision is detected at the repeater. The transmission is restarted a variable interval after disappearance of the collision. The variable interval corresponds to a weighted random number known in the art.
A buffer device for a digital transmission network transmitting voice signals, by packets, including so-called purging means for eliminating a number x.sub.(t) of the oldest packets stored in the buffer to prevent saturation thereof. The number of packets received at the input of the buffer within a given time interval is used to address a storage that supplies two pre-stored digital values, namely, x.sub.(t) and L.sub.(t). When the contents of the buffer are equal to L.sub.(t), a number x.sub.(t) of the oldest packets contained in the buffer are dropped.
Provided is a circuit for preventing local area network packets shorter than a predetermined bit length from being received by a local area network coprocessor. Serial data which would otherwise be received by the coprocessor is delayed by a data-shift register of predetermined bit length. Simultaneously, a carrier-sense-signal, which alerts the coprocessor that serial data is ready to be received, is modified by a carrier-sense-signal regeneration circuit. If the carrier-sense-signal is detected true by the regeneration circuit for a number of clock cycles equal to the number of bits in the data-shift register, then the carrier-sense-signal is delivered to the coprocessor and the data in the data-shift register is received by the coprocessor. Once the carrier-sense signal goes false, the regeneration circuit continues to deliver the carrier-sense-signal until the data-shift register empties.
In a data communications network having a plurality of information processing sytems coupled to a communication channel which serially transmits data in the form of information packets, a network controller is provided between the communication channel and an information processing system. The network controller includes a counter connected to the transmit buffer for controlling the release of packets from the transmit buffer according to a predetermined amount of time between the transmission of successive packets.
A network controller includes an interface unit connected to a communication network channel for transferring data in the form of information packets to and from the channel; a receive buffer connected for storing in parallel form the data packets transferred from the communication channel; and first and second shift registers having n bit positions including a pointer bits to the receive buffer, circulating at different clock rates corresponding to the clock rate of data on said communication channel and the clock rate of the system bus.
In a serial bus system an active representation of the logic states of a bus signal for transmission of both logic states is implemented either on two separate lines for separate transmission of the logic states thereon or on a single line with both logic states being represented by different frequencies. In the method selection of a subscriber connected to the bus, the subscribers wishing to transmit a message indicate this by issuing a collision signal to the bus. The time period during which the collision signal is issued by each subscriber is chosen in such a way that each subscriber of the bus has the possibility to be prepared for the selection. The selection of the subscriber wishing to transmit a message then is done by means of an address comparison on a bit-by-bit basis.