Multilevel code mates A and B expanded in accordance with the expression a)I (b.sup.K) and B=(a.sup.K)I (b) are compressed to a lobeless basic mate pair by repeatedly compressing corresponding code mate pairs in successive stages to provide diminishing codes of half the number of code bits by amplifying the code mates by a predetermined amplification factor and then adding and subtracting the code mates in accordance with expressions A.sub.i-1 =A.sub.i +B.sub.i.sup.K.sbsp.i and B.sub.i-1 =A.sub.i.sup.K.sbsp.i -B.sub.i where i is the i.sub.th compression stage and K.sub.i is the amplification factor applied to the codes A.sub.i and B.sub.i.
A spread-spectrum transmission system wherein a plurality of spread-spectrum signals are frequency division multiplexed by offsetting the center or carrier frequencies of the spread-spectrum signals by a fraction of the spectral-line spacing of the signals. The signals are generated by modulating a carrier with a pseudo-noise (PN) code signal. At a receiver, demultiplexing is carried out by mixing (42) the received multiplexed signal with a plurality of local oscillator frequencies (43) which are offset from each other in the same manner as the centre or carrier frequencies of the multiplexed spread-spectrum signals. The mixed signals are then further mixed (45) with generated PN code signals (47) corresponding to those used to generate the multiplexed spread-spectrum signals. The epoch of each generated PN code signal is then advanced or retarded in response to a respective epoch control signal (48) generated by a respective controller (46). After mixing (45) the signals are passed through respective narrowband filters (49) to select the baseband signals which are then fed to the respective controllers (46) to enable the generation of the epoch control signals (48 ). When applied to a vehicle tracking system a number of spaced receivers are utilized.
Multilevel code mates A and B expanded in accordance with the expression , b.sup.K and B=a.sup.K, b are compressed to a lobeless basic mate pair by repeatedly compressing corresponding code mate pairs in successive stages to provide diminishing codes of half the code length by amplifying the code mates by a predetermined amplification factor and then adding and subtracting the code mates in accordance with the expressions A.sub.i-1 =A.sub.i +B.sub.i.sup.K.sbsp.i and B.sub.i-1 =A.sub.i.sup.K.sbsp.i -B.sub.i where i is the i.sub.th compression stage and K.sub.i is the amplification factor applied to the codes A.sub.i and B.sub.i.
Noise codes are generated of a type termed "code mates" having correlation unctions which, upon detection in a matched filter, provide an impulse autocorrelation function. More particularly, code mate pairs of at least two code bits each are generated and shown, for purposes of illustration, utilized in a communications system and wherein one code mate is comprised of two signal bits of first and second or opposite polarity, one bit of which has a larger amplitude than the other bit and wherein the other code mate is comprised of two signal bits of said second polarity, one bit of which has a like larger amplitude than the other bit.
Disclosed is a microcontroller based Resolver-to-Digital converter in which synchronous sample-and-hold type demodulation is used with an optimum time of the sample-and-hold established by control of the phase and the magnitude of the reference voltage supplied to the resolver as a function of the resolver's electrical characteristics, thus minimizing the quadrature and the even harmonics effects which are a byproduct of the resolver. The demodulated resolver outputs are filtered and are converted to digital form with the use of an A/D converter integral or external to the microcontroller. The magnitude of the reference voltage is set to an optimum value in order to utilize the full range of the A/D converter. Using digital signal processing techniques and known trigonometric identities the shaft angle of the resolver is extracted from the A/D outputs and supplied to the output latches in continuous or bus controlled fashion. This method is further expended to cover the use of the R/D converter with multiple resolvers.