A method of fabricating field effect transistors which includes control of threshold potential by an ion implantation limited to the active channel area. The active channel area is defined by a photoresist pattern. Ions are implanted into the exposed area in a concentration to achieve a desired threshold. Appropriate metals are deposited over the channel area to form a gate electrode. The photoresist is lifted off leaving the gate electrode in position over the channel area. If desired, a layer of polysilicon can be included prior to resist formation and later removed by an etchant which does not attack the gate electrode.
In the fabrication of an MIS transistor, the distribution characteristic of the impurity density with respect to the depth of the first region exhibited when the amount of ions implanted for channel doping is varied is first determined. The swing value is calculated from the gate voltage - drain current characteristic on the basis of the distribution characteristic obtained. Ions are implanted to the channel portion at a dose which is selected in accordance with the impurity density of the first region so that the swing value takes the minimum value or a value as small as possible, thereby producing an MIS type semiconductor device having a channel doping structure in a first region between a source and a drain.
Disclosed herein is a MOS-type field-effect transistor in which a semiconductor region having the same type of conductivity as the substrate and an impurity concentration higher than that of the substrate is formed under the channel so as to come at both ends thereof into contact with the source and drain regions. The semiconductor region restricts the extension of depletion layer from the source and drain regions, and restricts the short-channel effect. The junction capacity is small between the semiconductor region and the source and drain regions.
A gate insulating film and gate electrodes are formed on a substrate containing N-type impurities such as P or As. Under the gate insulating film is a gate region on both sides of which are a first and a second source drain region. The gate region is furnished in its central part with a high-concentration channel injection region containing N-type impurities at a concentration higher than that of the substrate. Between the high-concentration channel injection region on the one hand and the first and the second source drain region and on the other hand, there are formed a first and a second low-concentration channel injection region and having substantially the same impurity concentration as that of the substrate.
A method is disclosed for fabricating submicron silicon gate metal-oxide-semiconductor field effect transistors (MOSFETs) which have threshold and punchthrough implants that are self-aligned to the gate electrode and source and drain regions. A layer of dielectric material (12) is either deposited or grown on the surface of a substrate, and a trench (15), which defines the region of the MOSFET gate electrode, is formed in the dielectric layer. A gate oxide (16) is formed at the exposed substrate at the bottom of the trench, and an implant is performed into the silicon substrate wherever there is gate oxide, but not into the portion of the substrate covered by the original dielectric layer. A layer of polysilicon (20), preferably doped, or another metallic film is then deposited onto the surface. The polysilicon is etched back to the top surface of the dielectric layer, thereby leaving polysilicon in the trench to form the gate electrode (24). The dielectric layer (12) is then etched back preferentially to a thickness approximately equal to the thickness of the gate dielectric, and a high-dose implant is performed through the reduced thickness dielectric layer into the silicon substrate, except for the areas covered by the polysilicon gate to form the source and drain regions (30) of the MOSFET.
