A circuit arrangement including first and second output transistors, a sensor diode means, and a circuit means. The first output transistor drives the load positive. The second output transistor drives the load negative. The sensor diode means senses the current in the collector of the first output transistor. The circuit means is connected in circuit with the sensor diode means and the base of the second output transistor for establishing the quiescent current level of the first output transistor. An output of the circuit means is applied at the base of the second output transistor for preventing the output of the first output transistor from falling substantially below its quiescent current level. The output of the circuit means is dependent upon the current sensed by the sensor diode means.
An amplifier system includes a constant current unit which produces a constant current in response to a source voltage from a source voltage terminal. An emitter follower unit has a base, an emitter and a collector, an input signal being supplied to the base, the emitter being connected to the constant current unit, the source voltage being supplied to the collector, the emitter follower unit producing an output signal at the emitter in response to the input signal. A current regulating unit regulates the constant current in response to a collector current fed into the collector of the emitter follower unit, so that the constant current is fed from the emitter of the emitter follower unit into the constant current unit.
A microphone bias amplifier circuit (30) and method for biasing a microphone with an amplifier circuit. The amplifier circuit (30) has an input stage (34) coupled to an output stage (40). The output stage (40) includes a first transistor (M1) coupled to a feedback loop (32) provides a variable source current (13) to the first transistor (M1) and the output stage output V.sub.out. The feedback loop (32) includes an amplifier (36) coupled to the first transistor (M1) and a first current source (I.sub.2) conducted through a second transistor (M2) and coupled to the amplifier (36). The amplifier (36) controllably drives a third transistor (M3) coupled to a voltage source (AVDD) to generate the variable current source (I.sub.2). The gates of the first (M1) and second (M2) transistors are coupled together and driven by the input stage (34). The third transistor (M3) of the feedback loop (32) provides the variable source current (I.sub.3) to the first transistor (M1), whereby the current conducted by the first and second transistors (I.sub.1, I.sub.2) is equal, and the remainder (I.sub.3 -I.sub.1) of the variable source current (I.sub.3) is provided to the load of the output stage (40).
A circuit for providing unity gain buffering of an input signal with reduced power consumption and symmetrical load driving capability. A feedback circuit between a buffer transistor and a bias circuit modulates the bias current to the buffer transistor. Modulating the bias current allows the buffer circuit to have a smaller quiescent bias current and increased current sink capability than the prior art unity gain buffer circuit. The modulating bias current allows more efficient operation of the buffer circuit while maintaining symmetrical load driving capability.
A push-pull amplifier circuit includes an NPN pullup transistor and an pulldown transistor, an emitter of the pullup transistor being coupled to a collector of the pulldown transistor. A first resistor is coupled between an output conductor and the emitter of the pullup transistor, and a second resistor is coupled between an emitter of the pulldown transistor and a supply voltage. A bias circuit includes a phase splitting transistor having an emitter coupled to a constant bias current source and a base of the pullup transistor, a collector coupled to a base of the pulldown transistor, and a control electrode coupled to an input signal. The phase splitting transistor steers a portion of the bias current into a first conductor connected to the base of the pullup transistor and a portion of the bias current into a second conductor connected to the base of the pulldown transistor in response to an input signal applied to the control electrode of the phase splitting transistor. A change in an output current flowing through the output conductor changes a base-emitter voltage of the pullup transistor by flowing through the first resistor and changing the voltage across the first resistor to compensate for steering current from the constant bias current source out of the first conductor to maintain a minimum amount of bias current flowing in the pullup transistor when the pulldown transistor is turned on hard, thereby reducing crossover distortion, maintaining output impedance low, and increasing bandwidth of the circuit.
A current mirror uses an operational amplifier to control the collector voltage of two mirroring transistors during operation. The operational amplifier is coupled to the collector of each mirroring transistor such that a differential in voltage between the collector will produce an output voltage which drives a MOS transistor. The MOS transistor, responsive to the output of the operational amplifier, adjusts the voltage at the collector of one of the mirroring transistors to restore equilibrium.