The invention relates to an operational amplifier (OA) with reduced offset voltage, particularly for A/D and D/A converters, S/H amplifiers, measuring instruments. The OA may also be used for applications where previously fast or precision OA's have been used. The basic circuitry of the OA consists of four resistors arranged in series, a fast OA B and preferably a precision OA A. The values of the resistors may be matched in such a way that the offset voltage of the OA B is totally eliminated or is canceled out by the offset voltage of the OA A, which makes it possible for the offset voltage of the entire circuit to be very small. Reduction of the input currents is also possible.
A circuit which converts differential outputs of a fully differential amplifier to a single output using a buffer amplifier is provided. The fully differential amplifier has common-mode feedback provided by a differential feedback stage. An input of the common-mode differential feedback stage is connected to a predetermined one of the differential outputs to maintain the predetermined output at a reference voltage potential. The buffer amplifier uses diffused or well resistors and a single-ended differential amplifier. The buffer amplifier has a balanced structure which minimizes noise and resistor nonlinearity output errors. The circuit also maintains excellent power supply rejection.
The distortion correction circuit includes: a main amplifier 30 having a first resistor 36 coupled from an output of the main amplifier 30 to a first input of the main amplifier 30, and a second resistor 34 coupled between the first input of the main amplifier 30 and a first input signal node; a correction loop amplifier 32 having an output coupled to a second input of the main amplifier 30, an output of the main amplifier 30 coupled to a first input of the correction loop amplifier 32, a second input of the correction loop amplifier 32 coupled to a second input signal node.
A method and apparatus for controlling the common mode impedance misbalance of an isolated single-ended circuit for all common mode paths, thereby allowing the balancing of the common mode impedances which reduces common mode effects while maintaining the advantages of the single-ended amplifier including circuit simplicity and the reference input connected to circuit ground. In one embodiment, two solid shields enclose the circuit as completely as possible with the inner shield connected to circuit ground which is also the reference for all other inputs to the circuit. A discrete capacitor is connected between the outer shield and each of the non-reference inputs. When the shield is complete, i.e., solid, almost solid with minimal holes or a fine mesh, the value of the discrete capacitor is selected to match the parasitic capacitance formed between the outer shield and the inner shield. In another embodiment, the shield may be incomplete, i.e., a grid, coarse mesh or a solid shield only enclosing a portion of the circuit; this shield is connected to the non-reference input of the circuit. In this case, the exposures of the incomplete outer shield and the electronic circuit ground plane (or inner shield) to an external noise source are matched to balance the effect of their parasitic capacitances. Also, in the case of an incomplete shield, a discrete capacitor may be connected between the outer shield and the non-reference input of the circuit to enable balancing the impedances to common mode currents.
