An IC card with a built-in voice synthesizing function is provided which includes a solid-state memory containing vector-quantized coded data, a pattern generating means for generating patterns each composed of a prescribed number of digital data by repeatedly performing calculations using a recurrence equation with initial values given by coded data read out of the solid-state memory, a converter circuit for limiting the band of each pattern generated by the pattern generating means and converting into an analog voice signal, and a gain control circuit for adjusting the gain of the analog voice signal output from the converter circuit on the basis of gain data read out of the solid-state memory.

A speech synthesizing circuit includes a speech synthesizing integrated circuit chip and an audio synthesizing integrated circuit chip. The speech synthesizing integrated circuit chip has a microprocessor, a speech synthesizer, a programmable memory, an input/output port, and a speech address register. The audio synthesizing integrated circuit chip has a microprocessor, an audio synthesizer, a programmable memory, an audio data storage memory, and an input/output port. The input/output port of the speech synthesizing integrated circuit chip is connected to input/output port of the audio data storage memory of the audio synthesizing integrated circuit chip. The programmable memory of the speech synthesizing integrated circuit chip is programmed to cause the microprocessor of the speech synthesizing integrated circuit chip to retrieve speech data from the audio data storage memory of the audio synthesizing integrated circuit chip for speech synthesis by the speech synthesizer of the speech synthesizing integrated circuit chip. The programmable memory is programmed by providing software simulations of instructions preprogrammed into the speech synthesizing integrated circuit chip during manufacture thereof that cause an address to be loaded onto the speech address register, and cause speech data located at an address stored in the speech address register to be obtained. The software simulations cause an address to be loaded into the audio synthesizing integrated circuit chip and cause speech data to be obtained by the speech synthesizing integrated circuit chip from the external memory integrated circuit chip at an address stored in the external memory integrated circuit chip.

A single chip integrated circuit is partitioned to support a microprocessor chip for providing the logic interface between a keyboard peripherally connected to a host computer. The support circuit includes in a single integrated chip a voltage regulator, a serial to parallel converter, a multiple output current source, an oscillator, a DC to DC converter, an audio driver and LED drivers. The voltage regulator produces a plurality of regulated output voltages utilized to operate the microprocessor and the internal circuitry of the support circuit and is comprised of a band gap regulator and output of which is coupled to an external resistor for providing a reference current. The current source is coupled to the voltage regulator and provides a plurality of output currents ratioed with respect to the reference current. The serial to parallel converter converts serial digital data supplied from the microprocessor into parallel data for controlling the operation of the audio and LED driver circuits. The LED driver circuit converts currents supplied thereto from the current source to a higher magnitude sufficient for driving individual LEDs. The audio driver circuit provides a logarithmic output current thereat as controlled by said data.

An apparatus for processing signals including a signal receiving circuit, a first processing circuit executing a first set of instructions, a second processing circuit executing a second set of instructions implementing a digital signal processing algorithm, an output circuit for outputting processed signals, and a communication circuit for communicatingly connecting the signal receiving circuit, the first processing circuit, the second processing circuit, and the output circuit. The first set of instructions includes control instructions for controlling operation of the apparatus and first operational instructions for processing signals; the second set of instructions includes second operational instructions for processing signals; selected of the second operational instructions produce interrupt results. When the first processing circuit receives an interrupt result it processes the interrupt result as a priority interrupt in executing the first set of instructions.

A storage device stores data on a disk. A storage device can be a electromagnetic or optical storage device. The storage device utilizes a motion control circuit having a digital signal processor and central processing unit integrated on a single substrate. The central processing unit and digital signal processor cooperate to affect motion control operations for the storage device. The motion control circuit partitions complex and non-complex mathematical instructions between the digital signal processor and the general purpose central processing unit.