A power transistor structure that is well suited to both switching and lower-voltage linear applications is displayed. A key element of the design is thin-film ballast resistors that act as a second level of interconnect. They can be connected to or insulated from the overlying metal and the underlying silicon, except where contact holes are provided. Thus, an intricate structure having small emitters with individual ballast resistors can be fabricated below the wide metal busses required to carry current out of a large power array. The result is a ballasting scheme that can be optimized for a wide range of linear and switching applications while making efficient use of metallization which often limits the size of power arrays. This is especially important in the design of IC power transistors where both the emitter and collector current must be conducted out of the array with surface metallization. The integration of a thermal sensor into the array that responds to hot spots for controlling the peak junction temperature greatly increases the power ratings that can be guaranteed, while providing more effective overload protection.
A semiconductor device provided with a semiconductor substrate with a bipolar transistor having a collector region of a first conductivity type, a base region adjoining the collector region and of a second conductivity type opposed to the first, and an elongate emitter region of the first conductivity type adjoining the base region; the collector region, the base region, and the emitter region being provided with conductor tracks which are connected to conductive connection surfaces. The conductor track on the elongate emitter region of the semiconductor device has a connection to a connection surface for a further electrical connection at each of the two ends of the emitter region. The emitter region may be made longer in this manner because the length of the emitter region is effectively halved by the connections at the two ends. Consequently, charge carriers need be transported over no more than at most half the emitter length. The semiconductor device according to the invention is thus capable of supplying high powers because the charge transport is not limited by charge transport through the conductor track on the elongate emitter region.
An electronic circuit device having a monolithic integrated power transistor is disclosed that comprises a parallel connection of a plurality of individual partial transistors (1, 2, 3, . . . , n). In order to stabilize the distribution of the sum current to the individual partial transistors (1, 2, 3, . . . , n) resistors (41, 42, 43, . . . 4n) are provided in their emitter lines. At least one of the resistors (41, 42, 43, . . . 4n) in the emitter lines of the partial transistors (1, 2, 3, . . . , n) serves as measurement resistor for producing a signal voltage proportional to the current to provide an electronic circuit device having current regulation or current limiting, as shown in FIG. 2.
A bipolar transistor includes a substrate of semiconductor material having an expitaxial body of the semiconductor material on a surface thereof. The semiconductor body has a major surface. A collector region of one conductivity type is in the body at the major surface and a base region of the opposite conductivity type is in the collector region at the major surface and forms with the collector region a collector/base junction which extends to the surface. A plurality of emitter regions of the one conductivity type are in the base region and form with the base region emitter/base junctions which extend to the surface. At least some of the emitter/base junctions are adjacent to but spaced from the collector/base junction at the major surface. A layer of insulating silicon oxide is on the major surface and a layer of conductive polysilicon is on the insulating layer. The polysilicon layer includes strips which extend only over the area of the surface between the collector/base junction and the adjacent emitter/base junctions and resistor areas to which the strips are connected. The emitter regions are connected to the polysilicon layer. The bipolar transistor may be part of an integrated circuit which includes MOS transistors and the polysilicon layer also forms the gates of the MOS transistors.
In a semiconductor device wherein a bonding pad is formed on an electrode through an insulating interlayer and a bonding wire is bonded to the bonding pad by thermocompression bonding, a through hole for connecting the bonding pad and the electrode is formed in the insulating interlayer above a contact hole for connecting the electrode and an active region formed in a semiconductor substrate. Metal columns of members of the electrode filled in the contact hole and members of the bonding pad filled in the through hole are formed under the bonding pad.
A transistor structure incorporates a polysilicon layer which is doped with N-type dopants and is used as an emitter ballast resistor in an array of NPN transistors. In one embodiment, the polysilicon layer is also used as a diffusion source to form N-type emitter regions within a deep and high resistivity P-well, which acts as a relatively high value base ballast resistor for the transistor. In another embodiment, a standard base is used, contributing little base ballast resistance. A buried collector region carries collector current. Preferably, the emitter regions are formed as oblong strips. P-type base contact regions, also generally formed as oblong strips, are formed in the surface of this P-well parallel to the emitter regions. The dimensions of the base contact regions may be varied in order to achieve a constant base-emitter voltage along the entire length of each emitter strip. An emitter metal layer overlies the polysilicon layer and contacts the polysilicon layer through openings in an insulating layer. The resulting three dimensional structure in one embodiment thus incorporates a stacked collector region, base ballast resistor, base region, emitter regions, emitter ballast resistors, and emitter metal layer. In another embodiment, the same three dimensional structure results except that there is no base ballast resistor. Dimensions of the emitter metal layer and other metal layers may be adjusted so that the transistor structure has a trapezoidal shape and requires less silicon real estate.
