A current difference current source which provides a stable current as operating conditions change. Two MOS transistors operate as two current sources. A difference current is obtained by subtracting the two transistor currents. The two current sources are configured to vary similarly as conditions change, such that their difference remains constant. In the alternative the difference current is forced to decrease as current increases in the transistors, wherein a reverse compensated current is provided. The difference current is used to drive a current mirror which functions as a compensated current source.
A current generator for the production of a reference current includes a first P type transistor, a source of which is connected to a first pole of a resistor and a gate of which is connected to a second pole of the resistor. The reference current flows in the resistor with a value that is a function of a threshold voltage of the first transistor. The current generator further includes a second N type transistor whose drain, gate and source are connected respectively to the second pole of the resistor, the first pole of the resistor and the drain of the first resistor. The second transistor is configured to operate in saturation mode.
A constant current circuit includes first and second depression type MOS transistors having drains connected to a high electric potential side; and first, second, and third enhanced type MOS transistors having sources connected to a low electric potential side.
A voltage/current (v/c) conversion circuit is designed for use in integrated circuit devices. Conventional designs of v/c conversion circuits require a relatively high value of load resistor, i.e. a steep v/c conversion slope, to generate high levels of output current. In place of the high load resistor which is expensive to fabricate with IC fabrication techniques, the source-drain resistance in an n-type MOSFET is utilized, and the output current level is adjusted by adjusting the potential of a bias input circuit supplied from the gate potential in an n-type MOSFET. The proposed configuration is ideally suited to IC fabrication processes, and the circuit is useful in a many applications requiring a wide range of high current levels from a conversion circuit having a low v/c conversion factor.
In a current pump, three separate current sources, each providing an identical current, are used. A first current pump is provided between an output load and a positive power supply terminal to provide a positive current to a load. To enable the current pump to provide a zero current to the load or withdraw a current from the load, second and third current pumps are provided in parallel between the load and a ground terminal. Associated switches couple these second and third current sources to the load. Thus, three states of the current pump are available which provide either a positive current, a negative current, or a zero current to a load.
Breakdown of a zapping diode is attained through zapping, and causes a switching transistor to be switched off. The switching transistor is connected in parallel with a current-determining transistor for inducing flow of a constant current and which is diode-connected. When the switching transistor is switched off, a current flows through the current-determining transistor. An adjustment current identical with the current flowing through the current-determining transistor flows through an adjustment current transistor which is connected to the current-determining transistor to form a current mirror. When, on the other hand, no zapping is performed, the switching transistor is switched on and the current-determining transistor is switched off, causing no current to flow through the adjustment current transistor. In this manner, with the current-determining transistor being diode-connected, Vce is a constant value, and the ON-resistance does not affect the magnitude of the adjustment current, enabling attainment of a stable adjustment current.
