An apparatus directs storage requests from a processor through a storage controller to storage. The storage controller contains address comparators which are uninitialized, i.e., they contain no address identifiers. As a result, logic within the storage controller is used to direct these storage requests until the address comparators become initialized. The storage controller directs the first and all subsequent storage requests to a read only storage if the first storage request is for a load, or read, operation. Conversely, the storage controller directs the first and all subsequent storage requests to a random access memory if the first storage request contains a store, or write, operation. An initialization program contained in an I/O device is loaded into the random access memory at the time the first storage request containing a store operation is made. After the address comparators within the storage controller have been initialized, all storage requests are directed to the appropriate location in storage identified by an address accompanying each storage request.
A method to initialize information disposed in an information storage and retrieval system comprising a data cache and one or more information storage media comprising a plurality of addresses. The method receives an initialization command, where that initialization command comprises a range of addresses and, optionally, an initialization pattern, where the plurality of addresses includes the range of addresses. The method forms and saves state information, where that state information includes the initialization pattern, and generates and saves a plurality of indicators, where that plurality of indicators includes an indicator for each track comprising the range of addresses. The method sets each of those indicators to a first value thereby indicating special handling, and provides an ending status signal, such that the receiving step, forming step, generating step, setting step, and providing step are performed substantially synchronously.
Boot up instructions may be stored on a memory coupled to the peripheral component interconnect (PCI) bus. These instructions may be accessed, despite the fact that peripheral component interconnect devices are normally not active during the boot up sequence. As a result, both the basic input/output system and other information may be stored on a reprogrammable memory coupled to the PCI bus. In some embodiments, this may reduce costs by avoiding the need for two semiconductor memories, one on the PCI bus and the other on a legacy bus.
A computer (20) includes a hardware memory access enforcer (50) to insure that various independent programs (52, 54) operating on the computer (20) follow isolated processing rules. Each program has its own memory domain (56), which may extend across instruction, data, and I/O memory spaces (40, 42, 44). A system controller program (52) is a trusted process. The system controller (52) may access memory in the domain (56) of any application (54), and program flow may exit system controller (52) to any application (54). However, applications (54) cannot access memory outside of their own domains (56), and program flow may not exit applications (54) to enter other applications (54). Program flow may exit applications (54) to system controller (52) only if directed to an entry address (60). A tracking circuit (74) verifies that a microprocessor (22) actually executes entry instructions (94) located at the entry address (60).
An apparatus provides redundant wireless to access field devices in a distributed control system having primary access to the field devices provided by hard-wired media that couples the field devices to the control room. The field devices are coupled to a Fieldbus control network. In a first embodiment, each field device is provided with a wireless Fieldbus port that is accessible by a wireless terminal. In a second embodiment, each Fieldbus control network is provided with a field module having a wireless Fieldbus port that allows all devices connected to the Fieldbus control network to be accessed by a wireless terminal. In a third embodiment, an H2-to-H1 Fieldbus bridge (which may service a plurality of H1 control networks) is provided with a wireless Fieldbus port that allows all Fieldbus devices connected to H1 control networks serviced by the H2-to-H1 bridge to be accessed by a wireless handheld unit of a wireless terminal. The redundant wireless access provided by the present invention allows a control room operator to access field devices in the event of failure or unavailability of the hard-wired media that provides primary access to the field devices.
An apparatus provides redundant wireless to access field devices in a distributed control system having primary access to the field devices provided by hard-wired media that couples the field devices to the control room. The field devices are coupled to a Fieldbus control network. In a first embodiment, each field device is provided with a wireless Fieldbus port that is accessible by a wireless terminal. In a second embodiment, each Fieldbus control network is provided with a field module having a wireless Fieldbus port that allows all devices connected to the Fieldbus control network to be accessed by a wireless terminal. In a third embodiment, an H2-to-H1 Fieldbus bridge (which may service a plurality of H1 control networks) is provided with a wireless Fieldbus port that allows all Fieldbus devices connected to H1 control networks serviced by the H2-to-H1 bridge to be accessed by a wireless handheld unit of a wireless terminal. The redundant wireless access provided by the present invention allows a control room operator to access field devices in the event of failure or unavailability of the hard-wired media that provides primary access to the field devices.
