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Claims  |
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What is claimed:
1. A signal processing apparatus comprising:
a plurality N of first means for correlating a first signal with a second
signal and generating an output representative of the correlation between
said first and second signals;
second means for applying said first signal in parallel to each of said
first means; and
third means for continuously applying said second signal to each respective
one of said first means at a time that is offset relative to the time of
application of said second signal to any other respective one of said
first means.
2. A signal processing apparatus according to claim 1, further including
fourth means, coupled to receive the outputs of each of said first means
and producing an output signal indicative of the correlation between said
first and second signals among the first means of said plurality.
3. A signal processing apparatus according to claim 1, wherein said third
means comprises a respective delay means associated with each of said
first means for delaying said second signal applied to a respective
i.sup.th one of said first means by a prescribed delay time and applying
the delayed second signal to the (i+1).sup.th one of said first means, and
wherein the output of the N.sup.th delay means is coupled to supply the
delayed second signal output thereof to the first one of said plurality of
first means.
4. A signal processing apparatus according to claim 3, wherein said second
signal comprises a K chip spreading sequence, the delay imparted by each
of said delay means is equal to one-half a chip time and the plurality N
of first means is equal to 2.sup.K.
5. A signal processing apparatus according to claim 1, wherein said second
signal comprises a K chip spreading sequence, with the signal span of said
pluralilty N of first means convering the duration of said K chip
spreading sequence.
6. A signal processing apparatus according to claim 1, wherein each of said
first means comprises a switch having a signal input coupled to receive
said first signal, a control input coupled to receive said second signal
and an output coupled to an integrator, from the output of which said
output representative of the correlation between said first and second
signals is generated, said switch connecting its signal input to its
output in accordance with the signal content of said second signal.
7. A signal processing apparatus according to claim 6, further including
means for reading out the contents of each respective integrator at the
termination of said second signal being applied to each respective first
means.
8. A signal processing apparatus according to claim 1, wherein said second
signal is comprised of in-phase and quadrature-phase spreading sequences
Si(t) and Sq(t), respectively and said first signal is comprised of an
in-phase component I(t) and a quadrature-phase component Q(t),
respectively defined by
I(t)=D(t)[Si(t) Cos .theta.-Sq(t) Sin .theta.] and
Q(t)=D(t)[Si(t) Sin .theta.+Sq(t) Cos .theta.],
where D(t) is a data modulation signal, and .theta. relates to the carrier
phase of said first signal to said plurality of first means.
9. A signal processing apparatus according to claim 8, wherein each of said
first means includes means for producing first and second correlation
outputs A(t) and B(t) defined in accordance with the relationships:
##EQU1##
where Ts is the symbol time span of said first signal.
10. A signal processing apparatus according to claim 9, wherein each of
said first means comprises a plurality of switches, each of which has a
control input selectively coupled to receive, as said second signal, a
delayed version of one of the signals Si(t), Si(t), Sq(t), Sq(t), a signal
input selectively coupled to receive, as said first signal, one of the
signals I(t), I(t), Q(t), Q(t), and an output, the outputs of said
switches being selectively combined and coupled to integrator means for
producing said outputs A(t) and B(t).
11. A signal processing apparatus according to claim 10, wherein each of
said switches is formed of a field effect transistor, one of the source
and drain of which corresponds to its signal input, the other of the
source and drain of which corresponds to its output, and the gate
electrode of which corresponds to its control input.
12. An apparatus for encoding and transmitting coherent communication
signals comprising:
first means for receiving information signals and encoding said information
signals into respective groups of intermediate signals which have
maximized and equalized energy spacing with respect to one another;
second means, coupled to said first means, for generating for each of said
groups of intermediate signals a coherent plurality of symbols in the form
of respective spreading sequences and including means for controllably
varying the spreading sequences by way of which the respective symbols are
formed, so that for successive prescribed time intervals each symbol is
formed of a respectively different sequence; and
third means, coupled to said second means, for modulating an output carrier
by spreading sequences of said symbols.
13. An apparatus according to claim 12, wherein the spreading sequence of
which a symbol is formed comprises a K chip PN sequence, and said second
means includes means for selectively changing the state of each chip in a
random order over the span of the K chip sequence.
14. An apparatus according to claim 13, wherein said selectively changing
means includes means for selectively changing, in a random order, the
state of each chip once during a respective prescribed time interval.
15. A communication system comprising:
at a transmitting station;
first means for receiving information signals and encoding said information
signals into respective coherent groups of intermediate signals which have
maximized and equalized energy distance with respect to each other;
second means, coupled to said first means, for generating for each of said
groups of intermediate signals a plurality of symbols in the form of
respective spreading sequences and including means for controllably
varying the spreading sequences by way of which the respective symbols are
formed, so that for successive prescribed time intervals each symbol is
formed of a respectively difference sequence; and
third means, coupled to said second means, for modulating an output carrier
by the spreading sequences of said symbols and causing said carrier to be
transmitted to a receiving station;
at a receiving station;
fourth means, for demodulating a received signal to obtain said respective
spreading sequences;
fifth means, coupled to said fourth means, for correlating said obtained
spreading sequences with respective ones of a set of reference spreading
sequences defining the symbols capable of being transmitted; and
sixth means, coupled to said fifth means, for deriving, from the correlated
outputs of said fifth means, respective coherent groups of said
intermediate signals and recovering therefrom said information signals.
16. A communication system according to claim 15, wherein the spreading
sequence of which a symbol is formed comprises a K chip PN sequence, and
said second means includes means for selectively changing the state of
each chip in a random order over the span of the K chip sequence.
17. A communication system according to claim 15, wherein said selectively
changing means includes means for selectively changing, in a random order,
the state of each chip once during a respective prescribed time interval.
18. A communication system according to claim 15, wherein said fifth means
comprises a set of matched filters the response characteristics of which
are uniquely associated with respective ones of said symbols, and
said sixth means comprises means for deriving, as a respective group of
said intermediate signal, that group associated with those symbols whose
correlation outputs of said fifth means correspond to a prescribed maximum
signal characteristic criterion.
19. A communication system according to claim 17, wherein each of said
matched filters comprises a hybrid array correlator which includes
a plurality of correlator cells, each of which is coupled to correlate the
spreading sequence output of said fourth means with a plurality of
reference symbol sequences on a continuing time basis, each reference
symbol sequence applied to a respective correlator cell having the same
chip sequence as those applied to the other cells of the correlator, but
being shifted in time relative thereto.
20. A communication system according to claim 19, wherein each hybrid array
correlator is comprised of 2K correlator cells, where K is the number of
chips in the reference symbol sequence, which sequence is associated with
that particular matched filter, each i.sup.th correlator cell being
coupled to receive said reference symbol spreading sequence and delaying
said sequence by one-half a chip time as it couples the delayed sequence
to the (i+1).sup.th correlator cell, the spreading sequence output of said
fourth means being coupled to each of said 2K correlator cells in
parallel, with the delayed reference spreading sequence output of the
2K.sup.th cell being coupled to the first correlator cell. |
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Claims |
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Description |
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FIELD INVENTION
The present invention relates to command, control, and communication
systems, and is particularly directed to a scheme for the acquisition,
synchronization, and recovery of coherently coded and combined spread
spectrum symbol formats. In particular, the present invention is directed
to a matched filter scheme for such a system formed of an improved hybrid
array correlator, that is effectively a time invariant coherent spread
symbol correlator and is programmable.
BACKGROUND OF THE INVENTION
With the continuing development of sophisticated command, control, and
communication data processing systems, spread spectrum communication
techniques have drawn particular attention because of a number of
advantages they offer over more conventional and limited bandwidth
modulation schemes. One advantage is the capability of enabling the
communication link to exhibit a robustness against jamming or natural
interfering signals which are not correlated with the particular spreading
waveform. These interference signals may include jamming, randomly
distributed natural events, or other users of the same spectrum. A further
advantage is that a signal-to-noise improvement may be obtained by systems
which employ a plurality of codes (symbol alphabet) by transmitting a
sequence of spread symbols whose energy distance has been maximized and
equalized to enhance the decision thresholds as opposed to using an
uncoded signal. In addition, enhanced time resolution may be obtained with
the increased bandwidth.
The advantages of employing such a communication scheme are not obtained
with ease, however, as part of the price one must pay is the complexity of
the signal processing required to extract the useful information or data
and the complexity of acquisition and synchronization processes needed.
Typical modulation schemes employ coded sequences to define symbols which
transmit each code bit of information, so that, at the receiver, some form
of correlation or matched filtering, matched to each symbol of the symbol
alphabet, is required to synchronize the receiver to the transmitter and
extract the original data.
More specifically, as is well known, a signal waveform, or its complement,
can be used to transmit a data symbol at some bit rate f.sub.B =1/TB on a
carrier f.sub.c, with the bandwidth being determined by the duration of
the chip T.sub.C =T.sub.B /N.sub.C (where N.sub.C is the number of chips
per symbol) rather than symbol duration. This results in an increase in
the bandwidth by a factor of N.sub.C yielding a spread spectrum signal. A
conventional technique for detecting and decoding the data stream involves
the use of a correlation receiver in which locally generated replicas of
the symbol sequence are mixed with the incoming signal. Unfortunately,
precise chip synchronization must be maintained, resulting in system
complexity which makes this approach disadvantageous.
An alternate solution to data detection is the use of a matched filter
receiver. In this case, different biorthogonal pseudo random sequences may
be chosen to define the respective symbols in the symbol alphabet to be
transmitted and, for a signal alphabet more complex than a binary one, a
given number of information bits can be transmitted at a specified error
rate with less total energy than is required for an optimum antipodal
energy signal. In exchange for a savings in required bit energy, however,
one must trade off increased bandwidth and equipment complexity.
In one such type of communication scheme, commonly termed M-ary
transmission, an alphabet of M=2.sup.K symbols is defined, with the
transmission of one symbol comprising log.sub.2 M=K bits of binary data.
Each symbol consists of a sequence of n elementary signals or chips, with
n<<K, typically, in order for each member of the alphabet to be orthogonal
to all other members. The symbol spreading can be done in one phase (BPSK)
by N chips or on two quadrature phases, (QPSK) N I-phase chips and N
Q-phase chips, with or without staggering the I and Q chip transitions.
Optimal processing at the receiver requires the incoming signal to be
correlated with one of M possible symbol waveforms. The receiver
determines the most probable waveform to be that waveform having the
highest degree of correlation as measured by the M receiver correlators.
This decision minimizes the probability of error.
Previous attempts to manufacture a device for this purpose have included
the CCD correlator, the optical Bragg cell correlator, the digital sum
correlator, the SAW Fourier Transform correlator, the programmable SWD
tapped delay correlator and the SWD airgap and elastic convolvers.
In operation, several of these correlators typically quantize and then
delay the incoming signals for implementing the signal matching process.
At the end of the symbol duration Ts a correlation pulse output is
produced if the input signal matches a prescribed reference signal.
Unfortunately, quantization of the input coded signal requires a high
level of digital encoding in order to pass the wide dynamic range of input
signals to be processed. This normally means that the input signal must be
coded with from eight to twelve bits in order to provide adequate dynamic
range. This increases the complexity of the hardware and substantially
increases processing problems.
Moreover, these devices suffer from a number of other disadvantages such as
large size, high power consumption, low delay stability, limited
temperature range, high cost, low reliability, low dynamic signal range,
high distortion and insertion loss, non-coherent output of the type most
suitable for a multi-symbol coherent decoding process, and limited
time-bandwidth products. As a result, these types of correlators are not
suitable for systems whose signal formats require demodulation with ultra
high speed PN and carrier phase acquisition.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided an improved
matched filter correlator that has particular command, control, or
communication applications, but does not suffer from the above-described
drawbacks of prior art approaches to signal acquisition, synchronization,
and recovery of coherently coded and combined spread spectrum symbol
formats. For this purpose, the matched filter correlator of the present
invention is configured to be effectively time invariant, so that
regardless of the time of arrival of an incoming symbol relative to a
reference symbol signal, the correlator is continuously capable of
acquiring the data, and is not limited by the need for complex signal
synchronization circuitry; nor is it limited by some finite signal
observation window, outside of which incoming signals would not otherwise
be acquired.
In order to effect this time invariant property, the hybrid array
correlator of the present invention is configured of a cascaded array of
individually identical correlator cells, through which a preselectable
reference symbol spreading or coding sequence, identifiable with a symbol
to be acquired, is successively clocked, from cell to cell and then
recirculated back to the beginning or first cell of the array. The
physical span of the correlator covers one complete symbol time, with each
cell imparting a one-half chip delay to the reference spreading sequence
as it is clocked through the correlator. Yet, because of the recirculation
of the reference spreading sequence from the last cell back to the first
cell, the electrical span of the correlator is effectively infinite or
time invariant. An incoming unknown symbol sequence capable of being
acquired is applied in parallel to all the cells of the correlator array.
Regardless of the time of arrival or phase of this incoming spreading
sequence, in one of the cells of the correlator, the reference spreading
sequence will have a phase that is effectively aligned with that of the
incoming signal and, assuming that the incoming symbol sequence is
associated with that matched filter, this particular correlator cell will
produce a strong correlation output at the completion of the symbol span,
thereby indicating that the symbol has been detected.
Advantageously, in a preferred embodiment of the invention, the hybrid
array correlator may be configured using CMOS integrated circuit
techniques, emp1oying sets of field effect transistor (FET) switches and
associated symbol span integrator circuitry at the outputs of the FET
switches to perform the correlation.
In accordance with a further aspect of the present invention, there is
provided a communication technique with respect to which the hybrid array
correlator has particular utility by extending the rapid acquisition and
coherent correlation processing to span group vectors many times the
length, and/or, for example, time bandwidth product, of a single symbol.
Pursuant to the communication technique, the composition of digital data
messages is encoded into coherent message groups consisting of a coherent
sequence of M-ary symbols. Each member of the group so comprised exhibits
maximized and equalized energy distance to other members of the group. The
sequence of symbols that make up each group are represented by the PN
spreading sequences which define the individual symbols, some preselected
number of K chips in length multiplied by the number of symbols in a group
code vector. In the signal acquisition circuitry at the receiver, each
matched filter hybrid array correlator according to the present invention
is effectively programmable, in that the reference spreading sequence that
is to be continuously recirculated through the cells of that respective
matched filter is preselected to correspond to each of the symbols of
which an encoded data group may be comprised.
The outputs of the set of matched filters in the receiver that is capable
of detecting any symbol of which the transmitted message may be formed are
coupled to data recovery signal processing circuitry which operates on or
processes the matched filter outputs pursuant to a coherent maximum
likelihood decision process for determining the most likely message group
that was originally transmitted. The decided-upon message group is then
converted or decoded into the original digital data. Thus, coherent
detection of a group consisting of a plurality of symbols is achieved
without complex synchronous detection processing or high time bandwidth
product correlators.
The programmability feature of the present invention is especially
advantageous in that it permits each correlator to be adjustable, so as to
satisfy code validity interval requirements governing anti-jam systems.
The adjustability of each correlator is capable of being carried out in a
gradual or "soft edged" manner over the duration of the code validity
interval, so that the possible loss of symbol acquisition capability at
the receiver caused by modest timing drift for each new successive
spreading code sequence is avoided. For this purpose, the spreading
sequences, by way of which each symbol capable of being transmitted is
defined, are changed in the transmitter and receiver on a random
chip-by-chip basis, with each chip position in a sequence being
selectively altered, in accordance with the new symbol to follow in the
next code validity interval, once during the code validity interval. As a
result, the correlation properties of the symbol format degrade gracefully
as the timing uncertainty increases over the code validity interval,
enabling the communication scheme pursuant to the present invention to be
especially suitable for a multitude of sophisticated signal acquisition
synchronization and data recovery requirements, while having a high degree
of anti-jam capability.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a table showing an exemplary format of the message encoding
scheme in accordance with the present invention;
FIG. 2 is a general block diagram illustration of a hybrid array correlator
with sixty four cells;
FIG. 3 is a timing diagram useful in explaining the operation of the
multi-cell hybrid array correlator shown in FIG. 2;
FIG. 4 is a general schematic block diagram of an individual correlator
cell of the hybrid array correlator of FIG. 2;
FIG. 5 is a detailed schematic diagram of an individual correlator cell of
the hybrid array correlator, employing field effect transistor circuitry;
FIG. 6 is a schematic block diagram of symbol sequence decision circuit
associated with a plurality of matched filter hybrid array correlators in
a receiver;
FIG. 7 is a schematic diagram of the configuration of a transmitter in
which a "soft edged" spreading sequence changeover is capable of being
carried out; and
FIGS. 8 and 9 show modifications of the integrator circuitry that may be
employed in the hybrid array correlator in accordance with the present
invention.
DETAILED DESCRIPTION
Prior to describing an illustrative implementation of the circuitry
configuration of a communication system embodying the principles of the
present invention, including the hybrid array correlator referenced above,
a discussion of the communication technique involved will be initially
presented. As was indicated briefly above, this communication technique
has the particular advantage that it is capable of providing ultra fast
signal acquisition and, unlike conventional data transmission systems,
including those employing commonly adopted spread spectrum techniques,
does not require signal tracking circuitry such as PN tracking and
coherent carrier phase lock loops.
In order to facilitate the description to follow and to provide a ready
understanding of the data encoding and communication technique carried out
in accordance with the present invention, the message assembly format will
be explained with reference to a simplified encoding format although, as
will be discussed below, the technique employed may be practically
realizable on a much larger scale; advantageously, the basic hybrid array
correlation and data recovery scheme is still employed regardless of the
complexity of the manner of assembly of the signalling format.
Attention is directed to FIG. 1 which shows an exemplary format of the
encoding scheme employed in accordance with the present invention. For
purposes of simplification, consider an arbitrary digital sequence of ones
and zeros representative of a message to be transmitted, e.g. in the basic
form: 10110001 . . . . The components of the series, namely the ones and
zeroes may be subdivided into sets of any chosen size, such as two, three,
four, etc., bits per set. Keeping with the intended simplification of the
present description, let us consider each set to comprise a pair of bits
as the basic message element. For a pair of bits, there will be 2.sup.2 or
four possible message elements, i.e. 00, 01, 10, and 11. (For a higher
order set assembly, such as sets of three (i.e. n=3) the number of
possible message elements that may be derived from an incoming digital
sequence will increase, of course, and obey the relationship N=2.sup.n,
where N is the number of possible sets and n is the number of bits per
set.
Now, for each basic message element or set, a group of symbols will be
assigned. These groups of symbols are chosen to be biorthogonal. In the
example chosen, for message elements of two bits each, the groupings shown
in FIG. 1 have been given as illustrative; i.e. message element 00 will be
encoded as group 1111, element 01 as group 1100, element 10 as group 1010
and element 11 as group 1001. Note that this is a Hamming distance 2 code
with common lead element. Other EDAC codes can be implemented in this same
manner. The constituency of each group is subdivided into an alphabet of
symbols preserving the orthogonality of the assembly. In the grouping
shown in FIG. 1, an alphabet of symbols may be selected such that +M1=11,
its complement -M1=00, +M2=10, and its complement -M2=01. Thus, the
illustrated orthogonal groups may be considered to be comprised of pairs
of symbols as shown in the "SYMBOL PAIR" column of the Figure. This
grouping provides a maximum and equalized energy distance between the
symbols. It should be observed that the number of symbols in the alphabet
selected may be and is, practically, considerably larger than the
quaternary alphabet illustrated here. The most useful range is two to
sixteen symbols in length.
Now, for purposes of actual data transmission, each symbol is represented
by a sequence of K chips, BPSK encoding or 2K chips, QPSK encoding. Here,
there is shown the more complex QPSK encoding case which includes both a K
chip in-phase and a K chip quadrature spreading function sequence. With
present day signalling equipment chip durations of 37.736 nanoseconds may
be selected as an example. Thus, for each symbol there will be a K chip
in-phase sequence S.sub.i (t) and a K chip quadrature sequence S.sub.q
(t). The magnitude of K may be varied depending upon the encoding
sophistication chosen. For purposes of the present description, K will be
chosen to be K=32. Again, however, chip durations of K=16 to 128, or even
on the order of several thousand may be employed. The exemplary number
(K=32) chosen here is merely for purposes of providing an illustrative
embodiment. With a duration of 32 chips per symbol, each group vector
consisting of two symbols will have a total chip duration of 64 chips;
e.g. for message set "10" the corresponding group "1010" is defined by the
sequence alphabet symbols (+M2), (+M2) yielding a duration of 32+32=64
chips. Each symbol is preferably quadrature modulated onto the
transmission carrier, so that for the exemplary message set above, there
will be transmitted an alphabet spreading function pair Si.sub.+M2 (t) and
Sq.sub.+M2 (t) followed by the same quadrature signals Si.sub.+M2 (T) and
Sq.sub.+M2 (T).
Before explaining the manner in which these symbols are generated and
transmitted, the present description will focus upon the signal acquistion
technique, particularly the hybrid array correlator employed in the
receiver, by way of which data recovery is achieved. Initially, it is to
be observed that the improved signal acquisition, hybrid array correlator
arrangement in accordance with the present invention, is operative, in
general, on a constant envelope spread signal of the form e(t)=D(t) [Si(t)
Sin (.omega.t+.theta.)+Sq(t) Cos (.omega.t+.theta.)], where D(t) is the
data modulation, Si(t) and Sq(t) are quadrature PN spreading functions and
.theta. is the unknown signal carrier arrival phase. Note that for BPSK
signalling, Sq(t)=0. Now, for a constant envelope signal the sum of the
squares of the spreading functions is constant, i.e. Si.sup.2 (t)+Sq.sup.2
(t)=Constant.
Prior to operating on the received signal having the general form indicated
above, in accordance with the present invention, the received modulated
carrier is down-converted to an I.F. frequency, and then the in-phrase (I)
and quadrature (Q) components are further converted down to baseband and
separated into separate channels. For this purpose, the incoming spread
I.F. signal e(t) is applied to a pair of mixers, to which the output of a
local oscillator is applied directly and through a 90.degree. phase shift,
respectively; i.e. to one mixer is applied a signal Sin .omega.t and to
the other mixer is applied a signal Cos .omega.t. The outputs of the
mixers are coupled to respective low pass filters to remove the double
I.F. frequency components, thereby yielding an in-phase component
I(t)=D(t) [Si(t)Cos .theta.-Sq(t)Sin.theta.] and a quadrature component
Q(t)=D(t)[Si(t)Sin .theta.+Sq(t)Cos.theta.]. These respective signals are
applied to a set of matched filters, each respective one of which is
programmed to be responsive to a particular symbol. Thus, for the four
symbol grouping described above, there will be four matched filters. In
accordance with the present invention, the four matched filters are
configured using two, i.e. the number of symbols used to define the group
vectors, hybrid array correlators each of which is effectively a time
invariant correlator. Namely, as will be explained in detail below, the
correlation function of the filter looks for an incoming symbol identified
with it, continuously, not merely over a preestablished interval. For this
purpose, an individual matched filter according to the present invention
is generally configured as shown in FIG. 2.
As shown in FIG. 2, the correlator comprises a plurality of correlator
cells, an individual one of which will be described in detail below in
conjunction with the description of FIG. 4, connected in cascade with a
one-half chip delay between successive stages. Each correlator cell
correlates the in-phase and quadrature components of the baseband signal
(I(t) and Q(t)) with in-phase and quadrature reference spreading sequences
Si(t) and Sq(t). For this purpose, rather than delay the unknown I(t) and
Q(t) signals and applying these signals to separate correlators in series,
the hybrid array correlator of the present invention delays the reference
spreading functions a one-half chip delay period for each cell and couples
the incoming I(t) and Q(t) in parallel to each cell. The result achieved
from this approach is shown by the timing diagram of FIG. 3.
More particularly, each correlator cell looks continuously at the incoming
in-phase I(t) and quadrature Q(t) components of the received signal and
correlates these signals with some delayed version of the spreading
signals Si(t) and Sq(t). Assuming, for the matched filter of interest,
that the incoming signal contains a symbol chip sequence associated with
that particular matched filter, but the time of arrival and carrier phase
.theta. which is unknown then one of the 2K correlator cells will receive
the reference spreading function in time alignment with the incoming
unknown signal and will produce an output representative of a large valued
correlation between the two signals. For the timing signal diagram shown
in FIG. 3, the incoming signal is not in time alignment at t.sub.o with
the spreading function applied to the input of the correlator but is,
instead, delayed by .tau. relative to t.sub.o. For purposes of
illustration, let it be assumed that .tau. is approximately one chip time,
i.e. Tc; since the spreading function is delayed one-half chip time by
cell number one and one-half chip time by cell number two then the passage
of the spreading function through cell number three will be in time
alignment with the incoming signal in that same cell and cell number three
will produce a strong correlation output at the completion of the symbol
integration at the time t.sub.o +.tau.s+Tc, indicative of a match between
the incoming unknown signal and the reference spreading function defined
bv the symbol associated with the cell of interest.
Now, as was pointed out above, the total span of the correlator is equal to
the total chip duration of the symbol, i.e. 32 chips for the symbol
duration in the present example, for a total correlator span of 64 cells.
In order to make the matched filter time invariant, the spreading sequence
derived from the delay stage of the last cell (here, the 64.sup.th cell)
is looped back to the first cell. Namely, at any point in time ti, the
definition of the spreading function is the same at integral multiples of
Ts, plus ti, where Ts is the span of the symbol. This means that for time
of arrival t.sub.o +.tau. of an incoming signal, one of the cells 1-64
will provide a strong correlation output, at the completion of its .tau.s
integration. This time invariant property of the hybrid array correlator
is particularly significant since it means that receiver is always capable
of acquiring an incoming symbol, not being limited by an expectancy
window.
A schematic block diagram of an individual hybrid array correlator cell is
shown in FIG. 4. Each cell operates to produce a pair of outputs
indicative of the cross-correlation of the in-phase and quadrature
components of the reference spreading function and the in-phase and
quadrature components of the unknown received signal. Namely, each cell
produces a first output
A=.intg.(I(t)Si(t)+Q(t)Sg(t))dt and
B=.intg.(I(t)Sq(t)-Si(t)Q(t))dt.
For this purpose, the in-phase component of the spreading function is
coupled over line 10 to one input of a pair of multipliers 14 and 17 and
to a one-half chip delay circuit 20. A second input of multiplier 14 is
coupled to line 12 over which the in-phase component I(t) of the received
analog signal is applied, while a second input of multiplier 16 is coupled
to line 13 over which the quadrature component Q(t) of the received analog
signal is applied. Lines 12 and 13 are coupled in parallel to each cell of
the correlator array. Similarly, the quadrature component Sq(t) of the
reference spreading function is coupled over line 11 to one input of each
of multipliers 16 and 19 and to a one-half chip delay circuit 21. A second
input of multiplier 16 is coupled to receive the quadrature component Q(t)
of the received signal over line 13, while a second input of multiplier 19
is coupled to receive the in-phase component I(t) of the received signal
over line 12. Delay circuits 20 and 21 impart a one-half chip delay to the
respective in-phase and quadrature components of the reference spreading
function, to be coupled to the downstream adjacent correlator cell. Thus,
the output of one-ha1f chip delay circuit 20 corresponds to the in-phase
spreading function coupled to the corresponding line 10 of the next
successive cell, while the output of one-half chip delay circuit 21
corresponds to the quadrature spreading function coupled to the
corresponding line 11 of the next successive cell.
The outputs of multipliers 14 and 16 are summed in adder 15, the output of
which is coupled to integrator 22. The output of multiplier 17 is
subtracted from the output of multiplier 19 in subtraction circuit 18, the
output of which is coupled to integrator 24. Each of integrators 22 and 24
integrates its input over the duration of a symbol span, i.e. 32 chip
times or the span of the correlator, and then couples the integrator
outputs to an A bus 29 and a B bus 28, respectively. To this end, a gating
circuit 26 is coupled between the output of integrator 22 and A bus 29,
while a gating circuit 27 is coupled between the output of integrator 24
and B bus 28. Gating circuits are enabled by a gate enabling signal on
line 30 which circulates through the correlator from one cell to the next.
The enabling signal is delayed by a one-half chip delay circuit 31, so
that for a 64 cell correlator, the enabling signal on line 30 reappears at
a respective cell i once per symbol time Ts. The output of delay circuit
31 is coupled to a pair of dump circuits 23 and 25 which respectively
discharge integrators 22 and 24 one-half chip time subsequent to gating
the outputs of the integrators to their respectively associated A and B
buses. For the constant envelope, spread signals considered here, the
signals on the A and B buses may be defined as follows.
A=.intg.(I(t)Si(t)+Q(t)Sq(t))dt=D(t) Cos .theta.(Si.sup.2 (t)+Sq.sup.2
(t)), and
B=.intg.(I(t)Sq(t)-Q(t)Si(t)dt=D(t) Sin .theta.(Si.sup.2 (t)+Sq.sup.2 (t)).
Thus, the outputs of the integrators on the A and B buses are indicative of
the coherent data components and acquisitio | | |
