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Method and apparatus for converting a run length limited code    
United States Patent4760378   
Link to this pagehttp://www.wikipatents.com/4760378.html
Inventor(s)Iketani; Akira (Higashiosaka, JP); Yamamitsu; Chojuro (Kawanishi, JP); Suesada; Kunio (Ikoma, JP); Ogura; Ichiro (Hirakata, JP)
AbstractA systematic method and apparatus for constructing a run length limited code in which the minimum number of continuous bits of the same binary value is constrained to d and the maximum number thereof is constrained to k. In converting m-bit data words to n-bit code words (n>m) to construct the run length limited code, selection means for n-bit code words usable to meet the d, k-constraint and a concatenation rule of the code words selected by the selection means are introduced. The selection means divides each of 2.sup.n n-bit bit sequences into a leading block L having l continuous bits of the same binary value, an end block R having .gamma. continuous bits of the same binary value and an intermediate block B having b(=n-l-.gamma.) bits between the blocks L and R. Only those n-bit bit sequences in which the blocks B thereof completely meet the d, k-constraint and the blocks L and R thereof meet conditions uniquely defined for given d and k are used as the code words. Consequently, a systematic method for constructing the run length limited code is provided.



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Method and apparatus for converting a run length limited code - US Patent 4760378 Drawing
Method and apparatus for converting a run length limited code
Inventor     Iketani; Akira (Higashiosaka, JP); Yamamitsu; Chojuro (Kawanishi, JP); Suesada; Kunio (Ikoma, JP); Ogura; Ichiro (Hirakata, JP)
Owner/Assignee     Matsushita Electric Industrial Co., Ltd. (Osaka, JP)
Patent assignment
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Publication Date     July 26, 1988
Application Number     06/719,629
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     April 3, 1985
US Classification     341/59
Int'l Classification     H03M 007/00
Examiner     Miller; Charles D.
Assistant Examiner    
Attorney/Law Firm     Spencer & Frank
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Parent Case    
Priority Data     May 21, 1984[JP]59-102138 Sep 06, 1984[JP]59-186705
USPTO Field of Search     340/347 DD 360/40 375/25
Patent Tags     converting run length limited code
   
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ReferenceRelevancyCommentsReferenceRelevancyComments
4554529
Moriyama
341/95
Nov,1985

[0 after 0 votes]
4501000
Immink
375/242
Feb,1985

[0 after 0 votes]
4486739
Franaszek
341/59
Dec,1984

[0 after 0 votes]
4398225
Cornaby
360/39
Aug,1983

[0 after 0 votes]
4146909
Beckenhauer
360/39
Mar,1979

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3689899
Peter A. Franaszek (Mt. Kisco, NY)
341/59
Sep,1972

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What is claimed is:

1. A method for generating a run length limited code which meets a d, k-constraint in which the minimum number of continuous bits having the same binary value is limited to d and the maximum number of continuous bits having the same binary value is limited to k, by converting m.sub.i -bit data words to n.sub.i -bit code words, where 1.ltoreq.i.ltoreq.i.sub.max, to generate 2.sup.ni n.sub.i -bit bit patterns, comprising the steps of: dividing each of said bit patterns into a leading block L having l continuous bits of the same binary value, an end block R having .gamma. continuous bits of the same binary value and an intermediate block B having b(=n.sub.i -l-.gamma.) bits between the blocks L and R; and selecting as the n.sub.i -bit code words to be used in the m.sub.i /n.sub.i conversion patterns which perfectly meet the d, k-constraint in the block B.

2. A method according to claim 1, wherein d=1 and only code words {C10.sub.i } which meet 1.ltoreq.l.ltoreq.x and 1.ltoreq..gamma..ltoreq.k-x, where 1.ltoreq.x.ltoreq.k-1 and the code words {CX11.sub.i } which meet x+1.ltoreq.l.ltoreq.k and 1.ltoreq..gamma..ltoreq.k-x are used.

3. A method according to claim 2, wherein code words which belong to the code words {CX11.sub.i } and have "1" bits in the block L are represented by {C11.sub.i }, a code word C11.sub.i is called a front pattern, a code word having "1"s in the front code C11.sub.i .epsilon.{C11.sub.i } changed to "0"s and "0"s in the front code C11.sub.i .epsilon.{C11.sub.i } changed to "1"s is called a back pattern C11.sub.i .epsilon.{C11.sub.i }, a data word is assigned to each code word C10.sub.i .epsilon.{C10.sub.i } the code words C11.sub.i and its back pattern C11.sub.i .epsilon.{C11.sub.i } are paired and a data word is assigned to each pair.

4. A method according to claim 3, wherein the code words are concatenated in accordance with INV.sub.i =LB.multidot.F.sub.1 where LB is the binary value of the block R of the first code word, F.sub.1 =0 if the second code word belongs to {C10.sub.i }, F.sub.1 =1 if the second code word belongs to {C11.sub.i }, INV.sub.1 =0 if the second code word is the front pattern and INV.sub.1 =1 if the second code word is the back pattern.

5. A method according to claim 3, wherein a data word is assigned to each of code words C100.sub.i .epsilon.{C100.sub.i } of the code words {C10.sub.i } having zero disparity (DP=0) defined by a difference between the numbers of "1"s and "0"s in the code word, a data word is assigned to each two-word set of a code word C110.sub.i .epsilon.{C110.sub.i } having DP=0 of the code words {C11.sub.i } and a back pattern C110.sub.i .epsilon.{C110.sub.i } thereof, a data word is assigned to each set of a code word C10P.sub.i .epsilon.{C10P.sub.i } having DP>0 of the code words {C10.sub.i } and a back pattern C10P.sub.i .epsilon.{C10P.sub.i } thereof, a data word is assigned to each two-word set of a code word C10m.sub.i .epsilon.{C10m.sub.i } having DP<0 of the code words {C10.sub.i } and a back pattern C10m.sub.i .epsilon.{C10m.sub.i } thereof, and a data word is assigned to each four-word set of a code word C11P.sub.i .epsilon.{C11P.sub.i } having DP>0 of the code words {C11.sub.i }, a back pattern C11P.sub.i .epsilon.{C11P.sub.i } thereof, a code word C11m.sub.i .epsilon.{C11m.sub.i } having DP<0 of the code words {C11.sub.i } and a back pattern C11m.sub.i .epsilon.{C11m.sub.i } thereof.

6. A method according to claim 5, wherein the code words are concatenated in accordance with

SC.sub.1 =P.sub.1 +(DV.sym.LB).multidot.P.sub.2 .multidot.F.sub.1

SC.sub.2 =F.sub.1 .multidot.LB+P.sub.1 +(DV.sym.P.sub.2)

where LB is the binary value of the bits of the block R of the first code word, DV=0 if DSV.sub.1 .gtoreq.0 at the last bit of the first code word, DV=1 if DSV.sub.1 <0, P.sub.1 =1 if DP.sub.2 =0 in the second code word, P.sub.1 =0 if DP.sub.2 .noteq.0, P.sub.2 =0 if DP.sub.2 >0, P.sub.2 =1 if DP.sub.2 <0, SC1=0 if the second code word belongs to {C100.sub.i }, {C110.sub.i }, {C10P.sub.i }, {C10m.sub.i } or {C11P.sub.i }, SC1=1 if the second code word belongs to {C11m.sub.i }, CS2=0 if the second code word is the front pattern and SC2=1 if the second code word is the back pattern.

7. A method according to claim 6, wherein i.sub.max =1, d=1, k=4, m=8, n=10 and x=2.

8. A method according to claim 7, where only code words haviang .vertline.DP.vertline..ltoreq.2 are used.

9. A method according to claim 6, wherein i.sub.max =1, d=1, k=7, m=9, n=10 and x=3.

10. A method according to claim 9, wherein only code words having .vertline.DP.vertline..ltoreq.4 are used.

11. A method according to claim 6, wherein i.sub.max =1, d=1, k=7, m=9, n=10 and x=4.

12. A method according to claim 11, wherein only code words having .vertline.DP.vertline..ltoreq.4 are used.

13. A method according to claim 6, wherein i.sub.max =1, d=1, k=6, m=9, n=10, x=3 and the same code word is assigned only to fine data words.

14. A method according to claim 6, wherein i.sub.max =1, d=1, k=6, m=7, n=8 and x=3.

15. A method according to claim 6, wherein i.sub.max =1, d=1, k=7, m=11, n=12 and x=3.

16. A method according to claim 6, wherein i.sub.max =1, d=1, k=7, m=11, n=12 and x=4.

17. A method according to claim 6, wherein i.sub.max =1, d=1, k=4, m=12, n=14 and x=2.

18. A method according to claim 6, wherein i.sub.max =1, d=1, k=5, m=16, n=18 and x=2.

19. A method according to claim 6, wherein i.sub.max =1, d=1, k=5, m=16, n=18 and x=3.

20. A method according to claim 6, wherein i.sub.max =1, d=1, k=6, m=5, n=6 and x=3.

21. A method according to claim 4, wherein i.sub.max m.sub.i /n.sub.i conversion code are used to perform m/n conversion where ##EQU9##

22. A method according to claim 6, wherein i.sub.max m.sub.i /n.sub.i conversion code are used to perform m/n conversion where ##EQU10##

23. A method according to claim 22, wherein n.sub.i is an even number.

24. A method according to claim 23, wherein divergence of DSV is prevented for each m.sub.i /n.sub.i conversion.

25. A method according to claim 24, wherein i.sub.max =2, d=1, m.sub.1 =7, n.sub.1 =8, n.sub.2 =9 and n.sub.2 =10.

26. A method according to claim 25, wherein of a 16-bit data word comprising two 8-bit data words, high order 7 bits of the first data word are 7/8 converted and 9 bits consisting of the least significant bit of the first data word and the 8 bits of the second data word are 9/10 converted.

27. A method according to claim 26, wherein RLL code having d=1, k=7, m.sub.1 =7, n.sub.1 =8 and x=3 in the m.sub.1 /n.sub.1 conversion and RLL code having m.sub.2 =9 and n.sub.2 =10 in the m.sub.2 /n.sub.2 conversion are used, where d=1, k=7, m=16 and n=18.

28. A method according to claim 26, wherein RLL code having d=1, k=7, m.sub.1 =7, n.sub.1 =8, x=3 and .vertline.DP.vertline..ltoreq.4 in the m.sub.1 /n.sub.1 conversion and RLL code having m.sub.2 =9 and n.sub.2 =10 in the m.sub.2 /n.sub.2 conversion are used, where d=1, k=7, m=16 and n=18.

29. A method according to claim 26, wherein RLL code having m.sub.1 =7 and n.sub.1 =8 in the m.sub.1 /n.sub.1 conversion and RLL code having m.sub.2 =9 and n.sub.2 =10 in the m.sub.2 /n.sub.2 conversion used, where d=1, k=7, m=16 and n=18.

30. A method according to claim 1, wherein only the code words having y.ltoreq.l.ltoreq.k-d+1 and d-y.ltoreq..gamma..ltoreq.k-d+1 where 1.ltoreq.y.ltoreq.d-1 are used.

31. A method according to claim 30, wherein a data word is assigned to each two-word set of a code word C20.sub.i .epsilon.{C20.sub.i } having l.ltoreq.d and starting with "1" and a back pattern C20.sub.i .epsilon.{C20.sub.i } thereof, and a data word is assigned to each two-word set of a code word C21.sub.i .epsilon.{C21.sub.i } having l.ltoreq.d and a back pattern C21.sub.i .epsilon.{C21.sub.i } thereof.

32. A method according to claim 31, wherein code words are concatenated in accordance with INV.sub.2 =LB.sym.(E.sub.2 .multidot.F.sub.2) where LB is the binary value of the bits of the block R of the first code word, E.sub.2 =0 if .gamma..ltoreq.d-1 in the first code word, E.sub.2 =1 if .gamma..gtoreq.d, F.sub.2 =0 if l.ltoreq.d-1 in the second code word, F.sub.2 =1 if l.gtoreq.d, INV.sub.2 =0 if the second code word is the front pattern and INV.sub.2 =1if the second code word is the back pattern.

33. A method according to claim 32, wherein m.sub.i =im.sub.min and n.sub.i =in.sub.min.

34. A method according to claim 33, wherein d.ltoreq.3.

35. A method according to claim 34, wherein i.sub.max =6, d=5, k=18, m.sub.min =2, n.sub.min =5 and y=2.

36. A method according to claim 34, wherein i.sub.max =6, d=5, k=18, m.sub.min =2, n.sub.min =5 and y=3.

37. A method according to claim 34, wherein i.sub.max =4, d=6, k=16, m.sub.min =2 and n.sub.min =6.

38. A method according to claim 34, wherein i.sub.max =2, d=3, k=12, m.sub.min =8 and n.sub.min =15.

39. A method according to claim 33, wherein when k-2d+2.ltoreq.in.sub.min .ltoreq.k-d+1 is met, code words having in.sub.min bits of the same binary value in one of the blocks L and R are excluded from the code words having no less than (i+1)n.sub.min bits.

40. A method according to claim 39, wherein i.sub.max =5, d=2, k=7, m.sub.min =2, n.sub.min =3 and y=1.

41. A method according to claim 33, wherein n.sub.min -bit code words are not used when n.sub.min <d.

42. A method according to claim 41, wherein i.sub.max =3, d=3, k=8, m.sub.min =1, n.sub.min =2 and y=2.

43. A method according to claim 31, wherein a data word is assigned to each two-word set of a code word C200.sub.i .epsilon.{C200.sub.i } having DP=0 of the code words {C20.sub.i } and a back pattern C200.sub.i .epsilon.{C200.sub.i } thereof, a data word is assigned to each set of a code word C210.sub.i .epsilon.{C210.sub.i } having DP=0 of the code words {C21.sub.i } and a back pattern C210.sub.i .epsilon.{C210.sub.i } thereof, a data word is assigned to each four-word set of a code word C20P.sub.i .epsilon.{C20P.sub.i } having DP>0 of the code words {C20.sub.i }, a back pattern C20P.sub.i .epsilon.{C20P.sub.i } thereof, a code word C20m.sub.i .epsilon.{C20m.sub.i } having DP<0 of the code words {C20.sub.i } and a back pattern C20m.sub.i .epsilon.{C20m.sub.i } thereof, and a data word is assigned to each four-word set of a code word C21P.sub.i .epsilon.{C21P.sub.i } having DP>0 of the code words {C21.sub.i }, a back pattern C21P.sub.i .epsilon.{C21P.sub.i } thereof, a code word C21m.sub.i .epsilon.{C21m.sub.i } having DP<0 of the code words {C21.sub.i } and a back pattern C21m.sub.i .epsilon.{C21m.sub.i } thereof.

44. A method according to claim 43, wherein the code words are concatenated in accordance with

SC2=LB.sym.(E.sub.2 .multidot.F.sub.2)

SC1=P.multidot.(DV.sym.SC2)

where LB is the binary value of the bits of the block R of the first code word, DV=0 if DSV.sub.1 .gtoreq.0 at the last bit of the first code word, DV=1 if DSV.sub.1 <0 P=0 if DP.sub.2 =0 in the second code word, P=1 if DP.sub.2 .noteq.0, SC1=0 if the second code words belongs to {C200.sub.i }, {C210.sub.i }, {C20.sub.i } or {C21P.sub.i }, SC1=1 if the second code word belongs to {C20m.sub.i } or {C21m.sub.i }, SC2=0 if the second code word is the front pattern, and SC2=1 if the second code word is the back pattern.

45. A method according to claim 44, wherein i.sub.max =1, d=2, k=8, m=8 and n=14.

46. A method according to claim 44, wherein i.sub.max =1, d=2, k=6, m=9 and n=16.

47. A method according to claim 44, wherein when a maximum number .gamma..sub.max of continuous bits of the same binary value in the block R of the code word is smaller than k-d+1, a data word is assigned to each four-word set of a code word C20P.sub.i .epsilon.{C20P.sub.i }, a back pattern C20P.sub.i .epsilon.{C20P.sub.i } thereof, a code word C21m0.sub.i .epsilon.{C21m0.sub.i } and a back pattern C21m0.sub.i .epsilon.{C21m0.sub.i } thereof, for the code words {C21P0.sub.i } and {C21m0.sub.i } having d.ltoreq.l.ltoreq.k-n+y, of the code words {C21P.sub.i } and {C21m.sub.i }, and a data word is assigned to each four-word set of a code word C20m.sub.i .epsilon.{C20m.sub.i }, a back pattern C20m.sub.i .epsilon.{C20m.sub.i } thereof, a code word C21P0.sub.i .epsilon.{C21P0.sub.i } and a back pattern C21P0.sub.i .epsilon.{C21P0.sub.i } thereof, and the code word {C21P0.sub.i } are included in {C20P.sub.i } and the code words {C21m0.sub.i } are included in {C20m.sub.i } when the code words are concatenated.

48. A method according to claim 47, wherein i.sub.max =1, d=2, k=9, m=4 and n=8.

49. A code conversion apparatus for generating a run length limited code which meets a d, k-constraint in which the minimum number of continuous bits having the same binary value is limited to d and the maximum number of continuous bits having the same binary value is limited to k, by converting m.sub.i -bit data words to n.sub.i -bit code words, where 1.ltoreq.i.ltoreq.i.sub.max, comprising:

code word generation means for generating an n.sub.i -bit code word having l continuous bits of the same binary value in a leading block L of the code word, .gamma. continuous bit of the same binary value in an end block R and an intermediate block B consisting of b(=n.sub.i -l-.gamma.) bits between the blocks L and R which perfectly meets the d, k-constraint;

block R information generation means for generating information about the block R of the first code word in concatenating the first code word and the second code word generated by said code word generation means;

second code word information generation means for generating information about the second code word; and

second code word selection/modification means for selecting or modifying the second code word in accordance with the information from said block R information generation means and said second code word information generation means.

50. A code conversion apparatus according to claim 49, wherein the code words generated by said code word generation means have 1.ltoreq.l.ltoreq.x and 1<.gamma..ltoreq.k-x or x+1.ltoreq.l.ltoreq.k and 1.ltoreq..gamma..ltoreq.k-x, where 1.ltoreq.x.ltoreq.k-1.

51. A code conversion apparatus according to claim 50, wherein said block R information generation means includes means for holding the binary value LB of the bits of the block R of the first code word, said second code word information generation means includes means for generating F.sub.1 =0 if l.ltoreq.x and F.sub.1 =1 if l>x+1, and said second code word selection 1 modification means includes means for calculating F.sub.1 .multidot.LB and means for outputting the second code word as it is if F.sub.1 .multidot.LB=0 and in the front pattern if F.sub.1 .multidot.LB=1.

52. A code conversion apparatus according to claim 50, wherein said block R information generation means includes means for holding the binary value LB of the bits of the block R of the first code word, said second code word information generation means includes means for generating F.sub.1 =0 if l.ltoreq.x in the second code word and F.sub.1 =1 if l.gtoreq.x+1, and said second code word selection/modification means includes means for generating DV=0 if DSV.sub.1 >0 at the last bit of the first code word and DV=1 if DSV.sub.1 <0, means for generating P.sub.1 =1 if DP.sub.2 =0 the disparity of the second code word, P.sub.1 =0 and P.sub.2 =0 if DP.sub.2 >0, and P.sub.1 =0 and P.sub.2 =1 if DP.sub.2 <0, means for calculating SC1=P.sub.1 +(DV.sym.LB).multidot.P.sub.2 .multidot.F.sub.1, means for selecting code word having F.sub.1 =1 and DP.sub.2 <0 is the second code word only when SC1=1, means for calculating SC2=F.sub.1 .multidot.LB+P.sub.1 +(DV.sym.P.sub.2) and means for outputting the second code word as it is if SC2=0 and in the back pattern if SC2=1.

53. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=4, m=8, n=10 and x=2.

54. A code conversion apparatus according to claim 53, wherein only code words having .vertline.DP.vertline..ltoreq.2 are used.

55. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=7, m=9, n=10 and x=3.

56. Aa code conversion apparatus according to claim 55, wherein only code words having .vertline.DP.vertline..ltoreq.4 are used.

57. A code conversion apparatus according to claim 55, wherein i.sub.max =1, d=1, k=7, m=9, n=10 and x=4.

58. A code conversion apparatus according to claim 57, wherein only code words having .vertline.DP.vertline..ltoreq.4 are used.

59. A code conversion apparatus according to claim 52, wherein i.sub.max -1, d=1, k=6, m=9, n=10, x=3 and the same code word is assigned only to five data words.

60. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=6, m=7, n=8 and x=3.

61. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=7, m=11, n=12 and x=3.

62. A code conversion apparatus according to claim 52, wherein i.sub.max =1 d=1, k=7, m=11, n=12 and x=4.

63. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=4, m=12, n=14 and x=2.

64. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=5, m=16, n=18 and x=2.

65. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=5, m=16, n=18 and x=3.

66. A code conversion apparatus according to claim 52, wherein i.sub.max =1, d=1, k=6, m=5, n=6 and x=3.

67. A code conversion apparatus according to claim 52, wherein i.sub.max =2, d=1, m.sub.1 =7, n.sub.1 =8, n.sub.2 =9 and n.sub.2 =10.

68. A code conversion apparatus according to claim 67, wherein of a 16-bit data word comprising two 8-bit data words, high order 7 bits of the first data word are 7/8 converted and 9 bits consisting of the least significant bit of the first data word and the 8 bits of the second data word are 9/10 converted.

69. A code conversion apparatus according to claim 68, wherein only code words having .vertline.DP.vertline..ltoreq.4 are used.

70. A code conversion apparatus according to claim 49, wherein the code words generated by said code word generation means have y.ltoreq.l.ltoreq.k-d+1 and d-y<.gamma..ltoreq.k-d+1 when 1.ltoreq.y.ltoreq.d-1.

71. A code conversion apparatus according to claim 70, wherein said block R information generation means includes means for holding the binary value LB of the bits of the block R of the first code word, means for generating E.sub.2 =0 if .gamma..ltoreq.d-1 and E.sub.2 =1 if .gamma..gtoreq.d where .gamma. is the number of continuous bits of the same binary value in the block R of the first code word, said second code word information generation means includes means for generating F.sub.2 =0 if l.ltoreq.d-1 and F.sub.2 =1 if l.gtoreq.d where l is the number of continuous bits of the same binary value in the block L, and said second code word selection 1 modification means includes means for calculating INV.sub.2 =LB.sym.(E.sub.2 .multidot.F.sub.2) and outputting the second code word in the front pattern when INV.sub.2 =0 and in the back pattern when INV.sub.2 =1.

72. A code conversion apparatus according to claim 71, wherein m.sub.i =im.sub.min and n.sub.i =in.sub.min.

73. A code conversion apparatus according to claim 72, wherein i.sub.max =6, d=5, k=18, m.sub.min =2, n.sub.min =5 and y=2.

74. A code conversion apparatus according to claim 72, wherein i.sub.max =6, d=5, k=18, m.sub.min =2 and n.sub.min =5 and y=3.

75. A code conversion apparatus according to claim 72, wherein i.sub.max =4, d=6, k=16, m.sub.min =2 and n.sub.min =6.

76. A code conversion apparatus according to claim 72, wherein i.sub.max =2, d=3, k=12, m.sub.min =8 and n.sub.min =15.

77. A code conversion apparatus according to claim 72, wherein when in.sub.min .ltoreq.MAX{k-d+1+y-n.sub.min, k-2(d-1)+1} is met, code words having in.sub.min bits of the same binary value in one of the blocks L and R are excluded from the code words having no less than (i+1)n.sub.min bits.

78. A code conversion apparatus according to claim 77, wherein i.sub.max =5, d=2, k=7, m.sub.min =2, n.sub.min =3 and y=1.

79. A code conversion apparatus according to claim 72, wherein n.sub.min -bit code words are not used when n.sub.min <d.

80. A code conversion apparatus according to claim 79, wherein i.sub.max =3, d=3, k=8, m.sub.min =1, n.sub.min =2 and y=2.

81. A code conversion apparatus according to claim 71, wherein said second code word selection/modification means includes means for calculating SC2=LB.sym.(E.sub.2 .multidot.F.sub.2), means for outputting the second code word in the front pattern when SC2=0 and in the back pattern when SC2=1, means for generating DV=0 when DSV.sub.1 .gtoreq.0 at the last bit of the first code word and DV=1 when DSV.sub.1 0, means for generating P=0 when DP=0 in the second code word and P=1 when DP.noteq.0, means for calculating SC1=P.multidot.(DV.sym.CS2), and means for selecting a code word having DP<0 for the front pattern as the second code word when SC1=1.

82. A code conversion apparatus according to claim 81, wherein i.sub.max =1, d=2, k=8, m=8 and n=14.

83. A code conversion apparatus according to claim 81, wherein i.sub.max =1, d=2, k=6, m=9 and n=16.

84. A code conversion apparatus according to claim 81, wherein when a maximum number .gamma..sub.max of continuous bits of the same binary value in the block R of the code word is smaller than k-d+1, F.sub.2 =0 is imported to the code word having d.ltoreq.l.ltoreq.k=n+y.

85. A code conversion apparatus according to claim 84, wherein i.sub.max =1, d=2, k=9, m=4 and n=8.
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BACKGROUND OF THE INVENTION

The present invention relates to method and apparatus for converting a run length limited (RLL) code for converting m-bit data words to n-bit code words while constraining the minimum number of continuous bits having the same binary value to d and the maximum number of continuous bits having the same binary value to k in a bit sequence generated by concatenation of the code words.

The RLL code is usually used in recording digital data at a high record density on a magnetic tape or a magnetic disk.

The RLL code is defined as the code in which a minimum number of continuous bits having the same binary value is constrained to d and the maximum number of continuous bits having the same binary value is constrained to k. The RLL code having such a property is generated by converting m-bit data words (each having a bit length of T) to n-bit code words, where n is larger than m.

In such an RLL code, the interval T.sub.w required to identify one bit (hereinafter referred to as a detection window) is m/nT and the minimum interval between transitions T.sub.min is d.multidot.T.sub.w.

In a recording and reproducing system, intersymbol interference usually occurs because high frequency components are cut off. In order to minimize the intersymbol interference, it is desirable for T.sub.min to be long. In order to suppress an influence by a time-axis variation such as a peak shift and jitter due to the intersymbol interference, it is desirable for the detection window T.sub.w to be long. In addition, in order to attain a self-clocking function, it is desirable for the maximum number of continuous bits k to be small.

In view of the above, various RLL codes have been developed such the 8/10 conversion code (ref. No. 1), the 8/9 conversion code (ref. No. 2), the 8/16 conversion code (ref. No. 3), the 2/3 conversion code (ref. No. 4), the 3PM code (ref. No. 5), the HDM-3 code (ref. No. 6) and the (2, 7) RLLC code (ref. No. 7). These references are identified below.

The 8/10 conversion code is an RLL code in which d=1, k=10, m=8, n=10, T.sub.w =0.8T and T.sub.min =0.8T in accordance with the above definitions.

The 8/9 conversion code is an RLL code in which d=1, k=14, m=8, n=9, T.sub.w =8/9T and T.sub.min =8/9T.

The 8/16 conversion code is an RLL code in which d=2, k=6, m=8, n=16, T.sub.w =0.5T and T.sub.min =T.

Those three RLL codes are DC free codes which do not include a D.C. component and in which T.sub.w has a larger weight than T.sub.min.

Since those RLL codes were developed primarily for a digital VTR in which low frequency components are cut off by a rotary transformer, they are DC free in nature and have a large T.sub.w because of a requirement for an extremely high recording density. On the other hand, those RLL codes have a large k.

The DC free code is defined as a code in which the difference between the number of "1"s and the number of "0"s included between any two bits in a bit sequence generated by concatenation of code words is definite. Digital Sum Variation (DSV) is referred to as the variation in the running sum of a bit sequence after conversion and the difference between the number of "1"s and the number of "0"s in the code word is referred to as disparity (DP).

On the other hand, the 2/3 conversion code is a variable length RLL code (ref. No. 7) in which d=2, k=8, m=2, n=3, T.sub.w =2/3T, and T.sub.min =4/3T in accordance with the above definitions.

The 3PM code is an RLL code in which d=3, k=12, m=3, n=6, T.sub.w =0.5T and T.sub.min =1.5T.

The HDM-3 code is an RLL code in which d=6, k=25, m=4, n=12, T.sub.w =T/3 and T.sub.min =2T.

The (2, 7) RLLC code is a variable length RLL code in which d=3, k=8, m=1, n=2, T.sub.w =T/3 and T.sub.min =2T.

A theoretical constraint of T.sub.w for any given d and k is known (except for the DC free code). The theoretical constraints T.sub.w * (ref. No. 8) for the given d and k in the 2/3 conversion code, 3PM code, HDM-3 code and (2, 7) RLLC code are shown below. ##EQU1##

This means that an RLL code having a higher performance exists. For example, k may be reduced while T.sub.w is kept unchanged or T.sub.w may be increased while k is reduced.

However, in the past, there has been no systematic coding rule to satisfying optional values of the d, k-constraint and the coding rule has been determined on a trial and repeat basis. Accordingly, it has been very difficult to generate an RLL code having a closer performance to the theoretical constraint.

The above reference Nos. 1 to 8 are as follows.

No. 1. Japanese Patent Laid-open specification No. 54-158135 "Digital Prossessor System".

No. 2. Japanese Patent Laid-open specification No. 57-176866 "Binary Signal Encoder".

No. 3. M. Artigaras, "8/16 A New Channel Coding for Digital VTR", 12th International Television Symposium and Technical Exhibition, Program of Equipment Innovations Sections, P261, 1981.

No. 4. T. Horiguchi, et. al, "An Optimization of Modulation Codes in Digital Recording", IEEE Trans. MAG., Vol. 12, No. 6, November 1976.

No. 5. G. V. Jacoby, "A New Look Ahead Code for Increased Data Density", IEEE Trans. MAG., Vol. 13, No. 5, PP. 1202-1204, September 1977.

No. 6. Japanese Patent Laid-open specification No. 55-141852 "Data Conversion System".

No. 7. P. A. Franaszek, "RUN-LENGTH-LIMITED VARIABLE LENGTH CODING WITH ERROR PROPAGATION LIMITATION", U.S. Pat. No. 3,689,899, September 1972.

No. 8. D. T. Tang and L. R. Bahl, Information & Control. 17, No. 5, P. 436, 1970.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a systematic code conversion method and apparatus which can readily generate a substantially optimum RLL code for a given d and k.

In accordance with the present invention, each of 2.sup.ni code words (1.ltoreq.i.ltoreq.i.sub.max) each consisting of n; bits is divided into three blocks: a leading block L of the code word, and end block R and an intermediate block between the block L and the block R. Usable code words are selected in accordance with a value uniquely determined for the given d and k, and a uniquely determined concatenation rule for the selected code words is introduced so that a d, k-constrained RLL code having a higher performance can be readily generated.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows the format of a code word,

FIG. 2 shows concatenation of code words,

FIG. 3 shows concatenation of code words which have maximum numbers of continuous bits of the same binary value when d=1,

FIG. 4 shows a concatenation rule of code words when d=1,

FIG. 5 shows concatenation of code words which have maximum numbers of continuous bits of the same binary value when d.gtoreq.2,

FIG. 6 shows a concatenation rule of code words when d=2,

FIG. 7 shows code words in an RLL code in which d=5, k=18, m.sub.min =2, n.sub.min =5 and i.sub.max =6,

FIG. 8 is a block diagram of an encoder for the RLL code of FIG. 7,

FIG. 9 shows a portion of an input/output table for the code converter of FIG. 8,

FIG. 10 is a timing chart for FIG. 8,

FIG. 11 is a block diagram of a decoder for the RLL code of FIG. 7,

FIG. 12 shows a portion of an input/output table for the code reverse-converter of FIG. 11,

FIG. 13 shows code words in an RLL code in which d=6, k=16, m.sub.min =2, n.sub.min =6 and i.sub.max =4,

FIG. 14 shows code words in an RLL code in which d=2, k=7, m.sub.min =2, n.sub.min =3 and i.sub.max =5,

FIG. 15 shows code words which are not used in the code of FIG. 14,

FIG. 16 shows code words in an RLL code different from that of FIG. 14, in which d=2, k=7, m.sub.min =2, n.sub.min =3 and i.sub.max =5,

FIG. 17 shows code words in an RLL code in which d=3, k=8, m.sub.min =1, n.sub.min =2 and i.sub.max =3,

FIG. 18 shows a concatenation rule for code words in a DC free RLL code in which d=1,

FIG. 19 is a block diagram of an encoder for the DC free RLL code of FIG. 18,

FIG. 20 shows code words in a DC free RLL code in which d=1, k=4, m=8 and n=10,

FIG. 21 shows number of code words usable in the DC free RLL code in which d=1, k=7 and n-10,

FIG. 22 shows the number of code words usable in the DC free RLL code in which d=1, k=6 and n=8,

FIG. 23 is a block diagram of an encoder for a 16/18 DC free code in which d=1 and k=7 and which uses two DC free codes of FIGS. 21 and 22,

FIG. 24 is a block diagram of a decoder for the RLL code of FIG 23,

FIG. 25 shows a concatenation rule for code words in the DC free RLL code in which d.gtoreq.2,

FIG. 26 shows code words in a DC free RLL code in which d=2, k=8, m=8 and n=14, and

FIG. 27 shows code words in a DC free RLL code in which d=2, k=9, m=4 and n=8.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Each n.sub.i -bits code word can be divided into three blocks as shown in FIG. 1. They are a leading block L of the code word consisting of l continuous bits of the same binary value, an end block R of the code word consisting of .gamma. continuous bits of the same binary value and an intermediate block B of the code word consisting of b bits, where b=n.sub.i -l-.gamma..gtoreq.0.

The blocks L and R will be explained later. In order to satisfy the d, k-constraint, it is apparent that at least the block B of the code word must satisfy the d, k-constraint.

A first condition on the block B of the code word for selecting the code word which satisfies the d, k-constraint is that (i) the block B of the code word consisting of b(=n.sub.i -l-.gamma..gtoreq.0) bits includes no less than d and no more than k continuous "0" bits and "1" bits alternately, except when b=0.

The blocks L and R will now be explained for the constraints on l and .gamma. when (I) d=1 and (II) d.gtoreq.2. Those constraints are imparted so that the d, k-constraint is satisfied by the concatanation of the code words. They cannot be considered separately from the concatenation rule of the code words.

The term concatenation of the code words means the concatenation of a first code word (W1) and a second code word (W2) as shown in FIG. 2, in which l.sub.j is the number of bits in the block L in the j-th code word (j=1, 2) and .gamma..sub.j is the number of bits in the block R. A concatenation portion of the code words means (.gamma..sub.1 +l.sub.2) bits of the block R of the first code word and the block L of the second code word. LB indicates the binary value of the bits in the block R of the first code word.

(I) d=1

In this case, only the K-constrint should be considered. Accordingly, in order to assure that the concatenation portion of the concatenated code word does not include more than k continuous bits of the same binary value, .gamma..sub.1 and l.sub.2 must satisfy the following relation.

.gamma..sub.1 +l.sub.2 .ltoreq.k (1)

.gamma..sub.1, l.sub.2 and x are defined as follows.

1.ltoreq..gamma..sub.1 .ltoreq.k-x, 1.ltoreq.l.sub.2 .ltoreq.x, 1.ltoreq.x<k-1 (2)

By the concatenation of the code words constrained by the equations (2), it is apparent that the number of continuous bits of the same binary value is no smaller than 1 and no larger than k. Since the equations (2) are equally applicable to .gamma..sub.2 and l.sub.1, the equations (2) are conditions for .gamma. and l, which are expressed as

1.ltoreq..gamma..ltoreq.k-x, 1.ltoreq.l.ltoreq.x, 1.ltoreq.x.ltoreq.k-1 (3)

The code words which are constrained by the condition (i) for the block B and the conditions for the blocks L and R shown by the equations (3) are expressed by {C10.sub.i }.

The concatenation of the code words contained in {C10.sub.i } always satisfies the equation (1). Accordingly, when any two code words contained in {C10.sub.i } are concatenated, the number of continuous bits of the same binary value in the concatenation portion is no smaller than 1 and no larger than k. Accordingly, the code words contained in {C10.sub.i } have one-to-one correspondence to data words.

On the other hand, when the binary value LB of the bits in the block R of the first code word and the binary value of the bits in the block L of the second code word are different from each other, it is also possible to use code words free from the equations (3). Namely two kinds of code words can be selectively used according to values of LB the such that if LB=0 the use is made of a code word whose block L is composed of the bits of the binary value "1", and if LB is "1" use is made of a code word whose block L is composed of the bits of the binary value "0".

In this manner, the code word constrained by the equations (4) on the blocks R and L may be used.

1.ltoreq..gamma..ltoreq.k-x, x+1.ltoreq.l.ltoreq.k, 1.ltoreq.x.ltoreq.k-1 (4)

The code words which are constrained by the condition (i) for the block B and the conditions shown by the equations (4) are expressed as {Cx11.sub.i }. When an equation (5) holds, a code word having n.sub.i bits of the same binary value is included in {CX11.sub.i }.

n.sub.i +x.ltoreq.k (5)

As seen from FIG. 3, when the code word having n.sub.i bits of the same binary value is used as the first code word, the maximum number of continuous bits of the same binary value in the concatenation portion is n.sub.i +x when the second code word is selected from {C10.sub.i }, l=x and the block L of the second code word has the same binary value as that of the first code word.

Accordingly, if the equation (5) is met, the k-constraint is satisfied.

As described above, the code word contained in {CX11.sub.i } starts with "1" or "0" depending on LB. Accordingly, those code words are grouped to a set (two words) and one data word is assigned to each set of code words.

Usually, the set of code words are a combination of a code word which is contained in {CX11.sub.i } and which starts with a "1" bit (hereinafter referred to as a front pattern) and a code pattern which start with a "0" bit, with "0" bits and "1" bits of the front pattern being substituted by "1" bits and "0" bits, repectively (hereinafter referred to as a back pattern). For example, when the front pattern code word is C11.sub.i ="1111", the back pattern code word is C11.sub.i ="0000".

Of the code words contained in {CX11.sub.i }, the code words starting with "1" are represented by {C11.sub.i }, and a code word consisting of a back pattern C11.sub.i of any code word C11.sub.i contained in {C11.sub.i } is represented by {C11.sub.i }.

By using the code words {C10.sub.i }, {C11.sub.i } and {C11.sub.i } constrained by the condition (i) on the block B and the conditions on the blocks L and R shown by the relations (3) and (4) and using the correspondence relation with the data words and the concatenation rule, the RLL code for any k (d=1) can be constructed.

FIG. 4 shows the relation between the data words and the code words and the concatenation rule of the code words.

As seen from FIG. 4, the code word which meets the constraint of the equation (3) has no difference between the front pattern and the back pattern. Thus, a value I.sub.NV.sbsb.1 which is "0" for the front pattern and "1" for the back pattern is represented by

I.sub.NV.sbsb.1 =F.sub.1 .multidot.LB (6)

In FIG. 4 and the equation (6), the value F.sub.1 is "0" for the code words contained in {C10.sub.i } and "1" for the {C11.sub.i } and {C11.sub.i }. The symbol ".multidot." represents a logical AND function.

Because of the systematic constraint on the blocks L and R, the switching logic for the front pattern and the back pattern can be readily constructed.

(II) d.gtoreq.2

In this case, the blocks L and R need not meet the d-constraint but the d-constraint may be not by the concatenation of the code words as shown in equation (7).

.gamma..sub.1 +l.sub.2 .gtoreq.d (7)

where

d-y.ltoreq..gamma..sub.1 <k, y.ltoreq.l.ltoreq.k, 1.ltoreq.y.ltoreq.d-1 (8)

In the concatenation of the code words constrained by the equations (8), the d-constraint should be considered if the block R of the first code word and the block L of the second code word have different binary values from each other, and the k-constraint should be considered if those blocks have the same binary value.

The problem caused by the concatenation of the code words and the solution therefor by the present invention are described below.

(II.1) The block R of the first code word comprises "0"s and the block L of the second code word comprises "1"s.

(II.1.1) If d-y.ltoreq..gamma..sub.1 .ltoreq.d-1 and y.ltoreq.l.sub.2 .ltoreq.k, the d-constraint is not met. The d-constraint is met if the second code word is inverted to the back pattern. In order to meet the k-constraint concurrently, equation (9) must be met.

.gamma..sub.1 +l.sub.2 .ltoreq.k (9)

Since maximum value of .gamma..sub.1 is d-1, the following relation is met from the equation (8)

y.ltoreq.l.sub.2 .ltoreq.k-d+1 (10)

(II.1.2) If d-y.ltoreq..gamma..sub.1 .ltoreq.k and y.ltoreq.l.sub.2 .ltoreq.d-1, the following relation is met.

d-y.ltoreq..gamma..sub.1 .ltoreq.k-d+1 (11)

(II.1.3) If d.ltoreq..gamma..sub.1 .ltoreq.k-d+1 and d.ltoreq.l.sub.2 .ltoreq.k-d+1, the d, k-constraint is met if the second code word in the front pattern is concatenated.

When the block R of the first code word comprises "1"s and the block L of the second code word comprises "0"s, the same description as that for (II.1) applies.

(II.2) The block R of the first code word and the block L of the second code word have the same binary value.

Only when d.ltoreq..gamma..sub.1, and d.ltoreq.l.sub.2, the second code word is modified to start with the binary value opposite to the binary value of the block R of the first code word.

The conditions on the blocks L and R of the code word are given by equations (12), and the RLL code which meets the condition (i) on the block B and the d, k-constraint can be constructed.

d-y.ltoreq..gamma..ltoreq.k-d+1, y.ltoreq.l.ltoreq.k-d+1, 1.ltoreq.y.ltoreq.d-1 (12)

Of the code words which meet the equations (12) and the condition (i) on the block B, the code words in which l.ltoreq.d-1 and which start with "1" are represented by {C20.sub.i }, the back patterns thereof are represented by {C20.sub.i }, the code words in which d.ltoreq.l and which start with "1" are represented by {C21.sub.i } and the back patterns thereof are represented by {C21.sub.i }.

When n.ltoreq.d and an equation (13) is met, the code word having all "1" bits is included in {C21.sub.i }, and the code word having all "0" bits is included in {C21.sub.i },

n.sub.i +2(d-1).ltoreq.k (13)

As seen from the concatenation rule and FIG. 5, when the n bits of the code word have the same binary value, the maximum number of continuous bits of the same binary value is n.sub.i +2(d-1). Accordingly, if it is no larger than k, the k-constraint is always met.

As seen from (II.1) and (II.2), the second code word is in the front pattern or the back pattern depending on whether the number of continuous bits of the same binary value in the block R of the first code word is no smaller than d or not and whether the binary value LB of the block R of the first code word is "1" or "0", and whether the number of continuous bits of the same binary value in the block L of the second code word is no smaller than d or not. Accordingly, two code words (front pattern and back pattern) are assigned to each data word.

FIG. 6 shows the concatenation rule of the code words expained in (II.1) and (II.2). In FIG. 6, E.sub.2 is "1" if the number of continuous bits of the same binary value in the block R of the first code word is no smaller than d, and E.sub.2 is "0" if the number is no larger than d-1. LB indicates the binary value in the block R of the first code word. F.sub.2 is "1" if the number of continuous bits of the same binary value in the block L of the first code word is no smaller than d and F.sub.2 is "0" if the number is no larger than d-1. INV.sub.2 is "0" if the second code word is the fron