The present invention is a method of forming conductive structures comprising the steps of providing a silicon substrate having a first surface of atomically clean (111) silicon, forming an epitaxial CaF.sub.2 insulating layer on the first surface, the insulating layer having an exposed surface opposing the first surface, positioning a metallic mask on the exposed surface, irradiating a predetermined portion of the exposed surface so as to decompose the insulating layer beneath the predetermined portion to thereby form a workpiece having a metallic Ca layer on the first surface of the (111) silicon substrate, removing the mask, annealing the workpiece at a predetermined temperature so as to form an epitaxial CaSi.sub.2 conductive structure, wherein a plane coincident with the first surface bisects the conductive structure. According to one aspect of the invention, the energetic ion beam can be a beam of ionizing radiation. According to another aspect of the invention, the energetic beam can be energetic ion beam whereby both the conductive structure and an underlying impurity region in the substrate can be formed simultaneously.

A first power semiconductor device with a semiconductor base to which an emitter wire electrode is connected through an emitter bonding pad and a gate wire electrode is connected through a gate bonding pad, wherein the gate bonding pad comprises a silicon oxide film, a silicon crystal layer and a gate wiring electrode made of aluminum containing silicon which are successively formed on the semiconductor base, and the gate wire electrode is connected to the gate wiring electrode. A second power semiconductor device wherein the emitter bonding pad is an emitter wiring electrode made of aluminum containing silicon which is directly formed on the semiconductor base, and the emitter wire electrode is bonded to the emitter wiring electrode.

The invention is directed to a chip comprising a substrate having a plurality of pads located thereon and a passivation layer located over the substrate, wherein the passivation layer has a plurality of openings and recesses formed therein and the openings expose the pads respectively. During the later performed packaging process, a molding compound can fill out the recesses on the passivation layer to provide a stronger mechanical adhesion between the molding compound and the passivation layer. Therefore, the peeling issue of the molding compound can be solved.

A flip chip type semiconductor device includes a substrate, a polyimide film and an inorganic passivation film. An opening having a rectangular configuration is formed in the inorganic passivation layer provided on an electrode pad. The polyimide film is formed within the opening and on the inorganic passivation layer only in the vicinity of the opening so that the polyimide film is not formed on a circuit element of the semiconductor device. A circular window is formed in the polyimide film within the opening. A bump structure formed in the window is electrically connected to the electrode pad.

A semiconductor device package containing a semiconductor die uses a platform mounted on an active face of the die. The platform electrically connects to at least one bond pad on the die. A package lid electrically connects to the platform on the die and a package case connection. The package case connection is also electrically connected to at least one external connector on the package. The platform and package lid thereby connect the at least one bond pad on the die to the at least one external connector on the package. Using the platform and lid for electrical connections from the semiconductor die bond pads to the external package connector reduce the number of bond fingers required to surround the perimeter of the die. The package lid and platform may, for example, be used for ground or power connections to the die bond pads.