In a data network comprising multiplexers (M/X(A) etc) connected together by data links (1,2,3), and having clock sources (MC(1) etc), each multiplexer is provided with a clock selector (CS(A) etc). Each clock selector monitors test signals to establish status of incoming clock signals, and selects one clock signal in predetermined hierarchical order to supply to its associated multiplexer. Alternatively, e.g. in the absence of all test signals, the clock selector sets its associated multiplexer to Slave to Receive mode in which it takes incoming clock signals from one of the other multiplexers as its timing source.
A method of switching from one synchronizing signal source to another in a synchronous data communication network in which a plurality of stations are connected to each other via lines and A plurality of synchronizing signal sources are provided inside or outside the stations; the when a failure occurs a synchronizing signal source is replaced by another synchronizing signal source in correspondence to the failure so that the data communication may be continued. Specifically, flag bit data, indicating whether or not the synchronizing signal transmitted via the line is available, are set in the signal including the synchronizing signal and transmitted via the line. When a failure occurs in any of the plurality of synchronizing signal sources, a table provided in each station and specifying the order of priority for selection of a synchronizing signal source is referred to, and a synchronizing signal source is selected for each station in accordance with said flag bit data. Each station switches from the currently selected synchronizing signal source to the synchronizing signal source selected.
A distributed system of this invention forms multiplexing by n computers, and permits up to f computers to fail and halt. Respective computers exchange input candidates via an internal network B, and generate lists of input candidates. Each computer repeats generation of the list until (n-f) identical input candidates appear in that list. A computer which satisfies this condition executes its process irrespective of the states of other computers. This distributed system never generates a split brain in principle, and never interrupts a process upon occurrence of a failure due to time-out since it does not perform any failure detection.
A clock source selector provides at least one set of clock signals selected from a plurality of clock sources and a synchronized transition from an old clock source to a new clock source. The clock source selector includes a gate having an output for providing the clock signals, a selector coupled between the plurality of clock sources and the gate for providing the gate with clock signals from selected ones of the clock sources responsive to selection signals, a detector for detecting a change in the selection signals from an old clock source to a new clock source, and a synchronizing circuit responsive to the detector for disabling the gate in synchronism with the old clock source and thereafter enabling the gate in synchronism with the new clock source.
A synchronizing system for a private digital exchange (1) comprising a logic control unit (4) and specialized interfaces (9, 8) whereby the exchange is connected firstly to a plurality of subscriber terminals (2) via SO accesses, and secondly to a telecommunications network (3) via TO base accesses. The exchange includes a time base (6) which associates a fixed frequency local oscillator (7) with a phase locked loop (32). The system includes clock switching means suitable for imposing the first clock signals to come from the network (3) via an active one of the TO base accesses and the associated interface (8) on the phase locked loop (32) of the time base (6) as soon as said first clock signals come close in phase to the substitute clock signals provided by the time base (6) in the absence of said first signals from the network.
In a method of synchronizing nodes of a private telecommunication network to the best available clock at all times, each node of the network is normally synchronized by externally originated clock signals which reach it via a point-to-point digital transmission link input. Two node inputs are preselected as main and backup master clock inputs and each node is selectively preselected as a potential supplier of clock signals to each of the nodes to which it is connected by one of its master clock inputs, the nodes of the private network interconnected in this way determining a synchronization tree. In the event of loss of clock signals an exchange of information is instigated between adjacent nodes to reconfigure the synchronization tree that these nodes constitute so that each of them is synchronized to the best available clock.
