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BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductive ceramic composition for a
semiconductive ceramic capacitor, and more particularly to a SrTiO.sub.3
-Y.sub.2 O.sub.3 -Nb.sub.2 O.sub.5 system semiconductive ceramic
composition suitable for use for a boundary-layer type semiconductive
ceramic capacitor and such a capacitor.
2. Background of the Invention
A semiconductive ceramic capacitor which serves as a passive electronic
circuit element is generally classified into a surface-layer type one and
a boundary-layer type one. The surface-layer type semiconductive ceramic
capacitor includes a reduction and reoxidation type semiconductive ceramic
capacitor and a barrier-layer type semiconductive ceramic capacitor.
The reduction and reoxidation type semiconductive ceramic capacitor is
generally prepared according to the following procedures. A BaTiO.sub.3 or
SrTiO.sub.3 system compact having an additive for semiconductivity added
thereto is burned or fired in an atmosphere to prepare dielectric ceramic,
which is then subjected to a heat treatment in a reducing atmosphere to
produce a semiconductive ceramic body. The so-produced semiconductive
ceramic body is subjected to a heat treatment in an atmosphere or oxygen
atmosphere, so that oxygen may be diffused into the ceramic body through a
surface thereof to fill oxygen defects. This results in a composite
ceramic body being formed wherein its surface layer acts as a dielectric
layer (reoxidation layer) and its interior serves as a semiconductor.
Thereafter, electrodes are arranged on both surfaces of the composite
ceramic body to provide a small-sized semiconductive ceramic capacitor of
large capacity which has electrostatic capacity determined depending on a
thickness of its surface layer and is capable of increasing rated voltage
by an increase in thickness.
Now, preparation of the barrier-layer type semiconductive capacitor will be
described.
A compact which is typically made of a BaTiO.sub.3 system material
containing an additive for semiconductivity is burned in an atmosphere and
a film of metal such as copper or the like is formed on a surface of the
burned compact by vapor deposition. Then, an electrode of a material such
as silver or the like of which oxide readily forms a P-type semiconductor
is applied onto the metal film and then subjected to a heat treatment in
an atmosphere to form a barrier layer of about 0.3 to 3.mu. on a surface
thereof. This results in a barrier-layer type semiconductive ceramic
capacitor in which its surface forms a barrier layer insulator on which an
external electrode is arranged and its interior forms a semiconductor. A
capacitor of this type is suitable for use as a low voltage and large
capacity capacitor, because it has large electrostatic capacity although
it is decreased in dielectric strength because of the barrier layer having
a very small thickness.
The boundary-layer type semiconductive ceramic capacitor is typically
manufactured according to the following procedures.
A BaTiO.sub.3 or SrTiO.sub.3 system compact containing an additive for
semiconductivity is subjected to burning in a reducing atmosphere to
prepare a semiconductive ceramic body. Then, metal oxide such as Bi.sub.2
O is applied onto a surface of the ceramic body and then subjected to a
heat treatment in an atmosphere, resulting in metal ion penetrating into
an interior of the ceramic body to form an insulation layer containing the
metal ion at a grain boundary of the ceramic body. An interior of each of
the crystal grains of the ceramic forms a valency-controlled semiconductor
doped with the additive for conductivity. Thus, an interior of each of
grain layers in the ceramic body is changed to the insulation layer which
surrounds the valency-controlled semiconductor. The so-formed insulation
grain boundary layers are connected together in a matrix-like shape in all
directions to form a sponge-like dielectric. Thereafter, electrodes are
baked to a boundary-layer type semiconductive ceramic capacitor.
The semiconductive ceramic capacitors described above are limited to use
for bypass because they are small-sized and have large capacity but are
inferior in voltage characteristics, dielectric loss and frequency
characteristics. However, an advance in manufacturing techniques
sufficient to improve the characteristics caused a semiconductive ceramic
capacitor of which a base material comprises a SrTiO.sub.3 system material
to be manufactured which is capable of being extensively used for various
purposes extending from coupling, signal circuits and pulse circuits to
prevention of noise of a semiconductor.
Nevertheless, the semiconductive ceramic capacitors are still inferior in
electrical characteristics as indicated in Table 1 described below,
irrespective of such an advance. More particularly, the reduction
reoxidation type capacitor is decreased in insulation resistance and
increased in dielectric loss as compared with the boundary-layer type
capacitor. Likewise the barrier-layer type capacitor has a disadvantage of
being decreased in dielectric breakdown voltage to a level as low as 60 to
80 V, decreased in insulation resistance and increased in dielectric loss.
Such disadvantages are also encountered with the valency-controlled type
capacitor.
A base material of each of such surface-layer type semiconductive ceramic
capacitors is a SrTiO.sub.3 system, resulting in a thickness of the
ceramic body causing the capacitor to fail to exhibit large capacity of
Cs.gtoreq.5 nF/mm.sup.2.
The boundary-layer type semiconductive ceramic capacitor is increased in
insulation resistance and decreased in dielectric loss as compared with
the surface layer type ones, because its base material is a SrTiO.sub.3
system different from BaTiO.sub.3. However, the capacitor has a capacity
as low as 3.0 nF/mm.sup.2 and fails to exhibit large capacity of
Cs.gtoreq.5 nF/mm.sup.2.
TABLE 1
__________________________________________________________________________
Insulation
Electrostatic
Dielectric
Insulation
Breakdown
Capacity
Loss Resistance
Voltage
.epsilon.s .times. Eb**
Type of SCC*
Cs (nF/mm.sup.2)
tan .delta. (%)
IR (M.OMEGA.)
Vb (V)
(V/mm)
__________________________________________________________________________
Reduction &
2.9 6.1 700 210 6.9 .times. 10.sup.7
Reoxidation
Type
Barrier Layer
4.2 4.4 10 80 3.8 .times. 10.sup.7
Type (A)
Barrier Layer
4.5 5.7 3 58 2.9 .times. 10.sup.7
Type (B)
Conventional
3.3 0.4 7,500 190 7.1 .times. 10.sup.7
Boundary
Layer Type
Boundary
5.3 0.6 6,000 170 10.2 .times. 10.sup.7
Layer Type
(present
invention)
__________________________________________________________________________
*SCC: Semiconductive ceramic capacitor
**.epsilon.s: Dielectric constant, Eb: Insulation breakdown voltage per
unit thickness
Cs and tan .delta. were measured under conditions of 1 kHz and 1 V rms. I
was measured at 50 V for 1 min. Vb was measurd at a D.C voltage raising
velocity of 30-50 V/sec.
In the surface layer type semiconductive ceramic capacitor, capacity C is
not inversely proportional to its thickness, accordingly, dielectric
constant s may be obtained according to the following equations.
Cs (nF/mm.sup.2)=8.85.times.10.sup.-6 .epsilon..sub.s /t (1)
Vb (V)=Eb.multidot.t (2)
Accordingly,
.epsilon..sub.s .multidot.Eb (V/mm)=1.13.times.10.sup.5 Cs.multidot.Vb
The product .epsilon..sub.s .multidot.Eb listed on Table 1 was calculated
according to the equations described above.
Formation of an electrode of each of the conventional semiconductive
ceramic capacitors described above is generally carried out by applying a
silver paste consisting of powdered silver, powdered glass and an organic
vehicle onto a surface of the ceramic body and then adhering it thereto by
baking. Alternatively, it is carried out by electroless plating of nickel.
Formation of the electrode by baking of a silver paste has an advantage of
providing not only a ceramic capacitor which exhibits desired
electrostatic capacity and dielectric loss tangent but an electrode of
sufficient tensile strength and solderability. However, this causes the
produced ceramic capacitor to be expensive because silver is noble metal
of a high cost. Also, this has another disadvantage that silver is apt to
cause metal migration.
The electroless nickel plating is generally carried out by subjecting a
surface of a ceramic body to a treatment for rendering the surface roughed
using a mixed solution of ammonium fluoride and nitric acid, subjecting
the surface to a treatment using a tin chloride solution and a palladium
chloride solution and then immersing it in an electroless nickel plating
solution to form an electroless nickel deposit on the surface. The plating
further includes the steps of applying a resist onto a portion of the
nickel deposit on which an electrode is to be formed and immersing the
ceramic body in an etching solution such as nitric acid or the like to
remove an unnecessary portion of the nickel deposit. Accordingly the
ceramic body is damaged or corroded by various kinds of the solutions
containing acid and the like during formation of the electrode to cause
decomposition of the surface of the ceramic body. Further, leaving of the
plating solution and the like on the ceramic body due to a failure in
cleaning causes deterioration of the capacity manufactured.
SUMMARY OF THE INVENTION
The present invention has been made in view of the foregoing disadvantages
of the prior art.
Accordingly, it is an object of the present invention to provide a
semiconductive ceramic composition which is increased in dielectric
constant, capable of exhibiting excellent frequency characteristics and
temperature characteristics, and decreased in dielectric loss.
It is another object of the present invention to provide a semiconductive
ceramic composition which is increased in insulation resistance.
It is another object of the present invention to provide a semiconductive
ceramic composition which is capable of enlarging an appropriate range of
a SrO/Ti02 ratio.
It is a further object of the present invention to provide a semiconductive
ceramic composition which is capable of providing a semiconductive ceramic
capacitor, particularly, a boundary-layer type semiconductive ceramic
capacitor exhibiting excellent physical and electrical characteristics
irrespective of being small-sized.
It is still another object of the present invention to provide a
semiconductive ceramic capacitor, particularly, a boundary-layer type one
which is highly increased in dielectric constant and insulation
resistance.
It is yet another object of the present invention to provide a
semiconductive ceramic capacitor, particularly, a boundary-layer type one
which includes a highly reliable electrode which is inexpensive, exhibits
excellent solderability and tensile strength and does not cause metal
migration.
It is still a further object of the present invention to provide a process
for manufacturing a semiconductive ceramic capacitor which is capable of
providing a semiconductive ceramic capacitor accomplishing the above-noted
objects.
In accordance with one aspect of tee present invention, a semiconductive
ceramic composition is provided. The composition comprises a base material
comprising SrTiO.sub.3 and an additive for semiconductivity comprising
Y.sub.2 O.sub.3 and Nb.sub.2 O.sub.5. The Y.sub.2 O.sub.3 and Nb.sub.2
O.sub.5 each are present in an amount of 0.1 to 0.4 mol % based on the
composition.
In accordance with another aspect of the present invention, a
semiconductive ceramic capacitor is provided. The capacitor includes a
semiconductive ceramic body formed of a SrTiO.sub.3 system semiconductive
ceramic composition. On a surface of the ceramic body is deposited a first
conductive layer which is formed of a material mainly consisting of metal
powder selected from the group consisting of zinc powder and aluminum
powder. The capacitor also includes a second conductive layer deposited on
the first conductive layer, which is formed of a material mainly
consisting of copper powder.
In accordance with a further aspect of the present invention a process for
manufacturing a semiconductive ceramic capacitor. In the process, a first
conductive paste is applied onto a surface of a semiconductive ceramic
body and baked to form a first conductive layer on the ceramic body. Then,
a second conductive paste is applied onto the first conductive layer and
baked to form a second conductive layer.
BRIEF DESCRIPTION OF THE DRAWINGS
These and other objects and many of the attendant advantages of the present
invention will be readily appreciated as the same becomes better
understood by reference to the following detailed description when
considered in connection with the accompanying drawings; wherein:
FIG. 1 is a front elevation view of a ceramic body of a semiconductive
ceramic capacitor according to the present invention wherein a first
conductive layer is formed on each of upper and lower surfaces of the
ceramic body; and
FIG. 2 is a front elevation view of the ceramic body shown in FIG. 1 on
which a second conductive layer is further formed on each of the first
conductive layers; and
FIG. 3 is a vertical sectional view showing an embodiment of a
semiconductive ceramic capacitor produced according to the present
invention.
DETAILED DESCRIPTION OF THE INVENTION
The present invention is directed to a semiconductive ceramic composition.
The ceramic composition of the present invention includes a base material
comprising SrTiO.sub.3 and an additive for semiconductivity comprising
Y.sub.2 O.sub.3 and Nb.sub.2 O.sub.5. The Y.sub.2 O.sub.3 and Nb.sub.2
O.sub.5 each are present in an amount of 0.1 to 0.4 mol % based on the
composition. The composition may contain MnO of 0.02 to 0.2 mol % based on
the composition. Also, it may contain SiO.sub.2 of 0.01 to 0.1 mol % based
on the composition.
The present invention is also directed to a semiconductive ceramic
capacitor. The capacitor includes a semiconductive ceramic body formed of
such a SrTiO.sub.3 system semiconductive ceramic composition as described
above. The capacitor also includes a first conductive layer deposited on a
surface of the ceramic body and a second conductive layer deposited on the
first conductive layer. The first conductive layer is formed of a material
mainly consisting of metal powder selected from the group consisting of
zinc powder and aluminum powder and the second conductive layer may be
formed of a material mainly consisting of copper powder.
Further, the present invention is directed to a process for manufacturing
such a semiconductive ceramic capacitor as described above. In the
process, a first conductive paste is applied onto a surface of a
semiconductive ceramic body and baked to form a first conductive layer on
the ceramic body. Then, a second conductive paste is applied onto the
first conductive layer and baked to form a second conductive layer
thereon.
More particularly, the semiconductive ceramic capacitor may be constructed
in such a manner as shown in FIGS. 1 to 3. The capacitor includes a
semiconductive ceramic body 10 which is formed of a semiconductive ceramic
composition consisting of a SrTiO.sub.3 base material and an additive for
semiconductivity consisting of Y.sub.2 O.sub.3 and Nb.sub.2 O.sub.5. It is
convenient that Y.sub.2 O.sub.3 and Nb.sub.2 O.sub.5 each are present in
an amount of 0.1 to 0.4 mol % based on the composition. The composition
may contain at least one of MnO and SiO.sub.2. MnO and SiO.sub.2 may be
present in an amount of 0.02 to 0.2 mol % and 0.01 to 0.1 mol % based on
the composition, respectively. In the embodiment, when the composition is
subjected to sintering, Bi may be caused to be present at a gain boundary
of the composition.
The capacitor also includes a first conductive layer 12 depositedly formed
on a surface of the ceramic body 10. In the embodiment, the first
conductive layer 12 is deposited on each of upper and lower surfaces 14
and 16 of the ceramic body 10 by baking. The first conductive layer 12 is
formed of a first conductive paste mainly consisting of zinc powder or
aluminum powder. The first conductive paste may further contain at least
one of glass powder such as frit glass powder, and an organic vehicle
acting as an organic binder. Furthermore, when the first conductive paste
mainly consists of zinc powder, it may further contain powder of at least
one material selected from the group consisting of silver, aluminum,
copper and their oxides; whereas, when it mainly consists of aluminum
powder, it may contain powder of at least one material selected from the
group consisting of silver, zinc, copper and their oxides. Addition of
such powder enhances advantages of the capacitor. The capacitor of the
illustrated embodiment further includes a second conductive layer 18
depositedly formed on each of the first conductive layers 12 by baking.
The second conductive layer 18 may be formed of a second conductive paste
mainly consisting of copper powder. It may also contain at least one of
glass powder such as frit glass powder, metal oxide powder and an organic
vehicle acting as an organic binder. In particular, addition of the metal
oxide powder causes the second conductive layer to exhibit more
performance.
The so-formed semiconductive ceramic capacitor of the present invention
exhibits excellent electrostatic capacity, dielectric loss tangent (tan
.delta.) and insulation resistance, and includes an electrode of high
tensile strength and good solderability.
Also, the capacitor is highly reliable in operation because zinc or
aluminum never causes such metal migration as seen in silver and
manufactured at a low cost because zinc and aluminum is substantially
inexpensive as compared with silver.
Formation of the second conductive layer on the first conductive layer
highly improves solderability of the capacitor because it mainly consists
of copper exhibiting excellent solderability.
The invention will be understood more readily with reference to the
following examples; however, these examples are intended to illustrate the
invention and are not to be construed to limit the scope of the invention.
EXAMPLE 1
A semiconductive ceramic composition was prepared.
SrCO.sub.3, TiO.sub.2, MnCO.sub.3 and SiO.sub.2 were used as a base
material and Y.sub.2 O.sub.3 and Nb.sub.2 O.sub.5 were used as an additive
for semiconductivity. The base material and additive for semiconductivity
were weighed so that each composition may be obtained which has a
composition ratio as shown in Tables 2 and 3. The base material and
semiconductive material were subjected to wet blending in a ball mill of
synthetic resin using water and pebbles for 20 hours while stirring to
prepare a mixture. Then, the so-obtained mixture was dewatered and dried,
and provisionally burned by heating and cooling it at rates of 200.degree.
C./hr and stabilizing it at 1200.degree. C. for 2 hours to carry out
chemical reaction of the mixture. Subsequently, the mixture was powdered
and blended in the ball mill in which water and pebbles were placed for 16
hours and then dewatered and dried, to which polyvinyl alcohol (PVA) was
added as an organic binder to carry out granulation and grading to prepare
granulated powder. The granulated powder was then formed into a disc-like
compact of 10 mm in diameter and 0.5 mm in thickness at compacting
pressure of about 3 tons/cm.sup.2. The compact was treated at 800.degree.
C. for 1 hour to remove the binder therefrom and then subjected to burning
at about 1450.degree. C. for about 2 hours in a stream of a reducing
atmosphere (H.sub.2 +N.sub.2 atmosphere) to provide the compact with
semiconductivity, resulting in a semiconductive ceramic element having a
dimensions of 8.5 mm in diameter and 0.4 mm in thickness. Thereafter, a
Bi.sub.2 O.sub.3 -CuO system frit paste was applied in an amount of 3 mg
onto both surfaces of the ceramic element by screen printing so as to act
as a diffusion material and then burned at 1150.degree. C. for 2 hours in
air, resulting in a semiconductive ceramic body of which a grain boundary
is formed with an insulating layer. Then, a silver paste was applied onto
each of the both surfaces and baked at 800.degree. C. to an electrode.
The so-prepared each specimen had electrical characteristics as shown in
Tables 2 and 3, wherein dielectric constant (.epsilon..sub.s) and
dielectric loss (tan.delta.) were measured at a frequency of 1 kHz and
insulation resistance was measured at a room temperature of 20.degree. C.
under the application of 50 V.
TABLE 2
__________________________________________________________________________
Electrical Characteristics
D.C.
Speci- Dielectric
Dielectric
Insulation
Breakdown
.epsilon.s .times. Eb
men Composition Ratio (mol %)
Constant
Loss Resistance
Voltage
(V/mm)
No. SrTiO.sub.3
Y.sub.2 O.sub.3
Nb.sub.2 O.sub.5
MnO
.epsilon.s
tan .delta. (%)
IR (m .OMEGA.)
Eb (V/mm)
(.times. 10.sup.7)
__________________________________________________________________________
1 99.90
0 0.10
0 50,000
0.33 3500 480 2.4
2 99.75
0 0.25
0 56,000
0.39 3600 470 2.6
3 99.60
0 0.40
0 65,000
0.41 3100 440 2.9
4 99.90
0.05
0.05
0 49,000
0.35 4900 640 3.1
5 99.70
0.05
0.25
0 58,000
0.41 3800 420 2.4
6 99.45
0.05
0.50
0 70,000
0.69 2000 260 2.0
7 99.90
0.10
0 0 57,000
0.34 3900 520 3.0
8 99.80
0.10
0.10
0 75,000
0.29 4400 650 4.9
9 99.65
0.10
0.25
0 88,000
0.35 4000 550 4.8
10 99.50
0.10
0.40
0 86,000
0.41 3700 480 4.1
11 99.75
0.25
0 0 50,000
0.39 3500 680 3.4
12 99.70
0.25
0.05
0 61,000
0.34 3700 650 4.0
13 99.65
0.25
0.10
0 82,000
0.32 3500 670 5.5
14 99.50
0.25
0.25
0 120,000
0.36 3300 510 6.1
15 99.49
0.25
0.25
0.01
114,000
0.43 4100 560 6.4
16 99.48
0.25
0.25
0.02
100,000
0.48 5400 600 6.0
17 99.45
0.25
0.25
0.05
87,000
0.53 6300 630 5.5
18 99.40
0.25
0.25
0.10
85,000
0.56 7600 650 5.5
19 99.30
0.25
0.25
0.20
79,000
0.72 8500 690 5.5
20 99.20
0.25
0.25
0.30
62,000
1.21 9200 820 5.1
21 99.35
0.25
0.40
0 107,000
0.38 3700 540 5.8
22 99.25
0.25
0.50
0 98,000
0.61 2300 310 3.0
23 99.60
0.40
0 0 37,000
0.66 4600 890 3.3
24 99.50
0.40
0.10
0 77,000
0.39 4000 800 6.2
25 99.35
0.40
0.25
0 105,000
0.35 4100 650 6.8
26 99.20
0.40
0.40
0 112,000
0.36 3600 580 6.5
27 99.45
0.50
0.05
0 30,000
1.03 7600 1060 3.2
28 99.25
0.50
0.25
0 48,000
0.97 5100 690 3.3
29 99.00
0.50
0.50
0 61,000
0.89 3000 370 2.3
__________________________________________________________________________
TABLE 3
__________________________________________________________________________
Electrical Characteristics
Composition Ratio (mol %) D.C.
Speci- SrO/
Dielectric
Dielectric
Insulation
Breakdown
.epsilon.s .times. Eb
men TiO.sub.2
Constant
Loss Resistance
Voltage
(V/mm)
No. SrTiO.sub.3
Y.sub.2 O.sub.3
Nb.sub.2 O.sub.5
MnO
SiO.sub.2
Ratio
.epsilon.S
tan .delta. (%)
IR (M.OMEGA.)
Eb (V/mm)
(.times. 10.sup.7)
__________________________________________________________________________
30 99.45
0.25
0.25
0.05
0 0.998
103,000
0.55 1700 250 2.6
31 99.45
0.25
0.25
0.05
0 0.999
114,000
0.51 6800 590 6.7
32 99.45
0.25
0.25
0.05
0 1.001
87,000
0.53 6300 630 5.5
33 99.45
0.25
0.25
0.05
0 1.002
39,000
1.57 7400 780 3.0
34 99.445
0.25
0.25
0.05
0.005
0.998
98,000
0.66 2300 290 2.8
35 99.445
0.25
0.25
0.05
0.005
0.999
104,000
0.61 6900 650 6.8
36 99.445
0.25
0.25
0.05
0.005
1.001
113,000
0.57 6300 640 7.2
37 99.445
0.25
0.25
0.05
0.005
1.002
35,000
1.43 7200 890 3.1
38 99.44
0.25
0.25
0.05
0.01
0.997
104,000
0.57 2700 310 3.2
39 99.44
0.25
0.25
0.05
0.01
0.998
110,000
0.46 6700 630 7.3
40 99.44
0.25
0.25
0.05
0.01
1.002
111,000
0.40 7000 650 7.2
41 99.44
0.25
0.25
0.05
0.01
1.003
52,000
1.29 7200 860 4.5
42 99.40
0.25
0.25
0.05
0.05
0.996
96,000
0.53 1800 280 2.7
43 99.40
0.25
0.25
0.05
0.05
0.997
111,000
0.40 7300 610 6.8
44 99.40
0.25
0.25
0.05
0.05
1.003
109,000
0.41 6900 710 7.7
45 99.40
0.25
0.25
0.05
0.05
1.004
44,000
1.30 7100 830 3.7
46 99.35
0.25
0.25
0.05
0.10
0.996
82,000
0.52 3100 340 2.8
47 99.35
0.25
0.25
0.05
0.10
0.997
97,000
0.49 7200 730 7.1
48 99.35
0.25
0.25
0.05
0.10
1.003
98,000
0.43 7600 770 7.5
49 99.35
0.25
0.25
0.05
0.10
1.004
33,000
1.23 8200 1000 3.3
50 99.25
0.25
0.25
0.05
0.20
0.998
41,000
0.48 9500 1110 4.6
51 99.25
0.25
0.25
0.05
0.20
1.002
39,000
0.41 8900 1070 4.2
__________________________________________________________________________
As can be seen from tables 2 and 3, the semiconductive ceramic composition
of the present invention was increased in dielectric constant
(.epsilon..sub.s) to a level as high as about 75,000 or more and highly
decreased in dielectric loss (tan .delta.) to 0.29 to 0.72%.
Also, Tables 2 and 3 indicates that addition of only one of Y.sub.2 O.sub.3
and Nb.sub.2 O.sub.5 as the additive for semiconductivity causes the
composition to fail to be increased in dielectric constant
(.epsilon..sub.s) and D.C breakdown voltage (Eb) (Specimen Nos. 1, 2, 3,
7, 11 and 23). Also, addition of both Y.sub.2 O.sub.3 and Nb.sub.2 O.sub.5
each in an amount below 0.1 mol % failed in a significant increase in
dielectric constant and D.C breakdown voltage (Specimen Nos. 4, 5, 6, 12
and 27). Further, Y.sub.2 O.sub.3 exceeding 0.4 mol % decreased the
dielectric constant (Specimen Nos. 27 to 29) and Nb.sub.2 O.sub.5
exceeding 0.4 mol % decreased D.C breakdown voltage (Specimen Nos. 6, 22
and 29).
Furthermore, MnO below 0.02 mol % failed in a significant increase in
insulation resistance IR (Specimen Nos. 14 and 15), wherein MnO exceeding
0.2 mol % caused an increase in dielectric loss and a decrease in
dielectric constant (Specimen No. 20).
In addition, Table 3 indicates that addition of SiO.sub.2 in an amount
below 0.01 mol % causes an appropriate range of a SrO/TiO.sub.2 ratio to
be narrowed to 0.002 (Specimen Nos. 30-37), whereas SiO.sub.2 above 0.10
mol % leaded to a decrease in dielectric constant (Specimen Nos. 50 and
51). On the contrary, SiO.sub.2 in an amount of 0.01 to 0.1 mol % enlarged
an appropriate range of a SrO/TiO.sub.2 to 0.004 to 0.006.
Thus, it will be noted that the semiconductive ceramic composition of the
example is capable of effectively exhibiting the above-noted advantages of
the present invention.
EXAMPLE 2
A semiconductive ceramic composition and a semiconductive ceramic capacitor
which includes electrodes formed of zinc and copper were prepared.
(1) Preparation of Semiconductive Ceramic Composition:
Example 1 was substantially repeated to obtain each composition which has a
composition ratio as shown in Table 4 and 5.
The so-prepared each specimen had electrical characteristics as shown in
Tables 4 and 5, wherein dielectric constant (.epsilon..sub.s) and
dielectric loss (tan .delta.) were measured at a frequency of 1 kHz and
insulation resistance was measured at a room temperature of 20.degree. C.
under the application of 50 V.
TABLE 4
__________________________________________________________________________
Electrical Characteristics
D.C.
Speci- Dielectric
Dielectric
Insulation
Breakdown
.epsilon.s .times. Eb
men Composition Ratio (mol %)
Constant
Loss Resistance
Voltage
(V/mm)
No. SrTiO.sub.3
Y.sub.2 O.sub.3
Nb.sub.2 O.sub.5
MnO
.epsilon.s
tan .delta. (%)
IR (m .OMEGA.)
Eb (V/mm)
(.times. 10.sup.7)
__________________________________________________________________________
1 99.90
0 0.10
0 75,000
0.40 2500 410 3.1
2 99.75
0 0.25
0 84,000
0.47 2500 400 3.4
3 99.60
0 0.40
0 97,500
0.49 2200 370 4.3
4 99.90
0.05
0.05
0 73,500
0.42 3400 540 4.7
5 99.70
0.05
0.25
0 87,000
0.49 2700 360 3.1
6 99.45
0.05
0.50
0 105,000
0.83 1400 220 2.3
7 99.90
0.10
0 0 85,500
0.41 2700 440 3.8
8 99.80
0.10
0.10
0 112,500
0.35 3100 550 6.2
9 99.65
0.10
0.25
0 122,000
0.42 2800 470 6.2
10 99.50
0.10
0.40
0 129,000
0.49 2600 410 5.3
11 99.75
0.25
0 0 75,000
0.47 2500 580 4.4
12 99.70
0.25
0.05
0 91,500
0.41 2600 550 5.0
13 99.65
0.25
0.10
0 123,000
0.38 2500 570 7.0
14 99.50
0.25
0.25
0 180,000
0.43 2300 430 7.7
15 99.49
0.25
0.25
0.01
171,000
0.52 2900 480 8.2
16 99.48
0.25
0.25
0.02
150,000
0.58 3800 510 7.7
17 99.45
0.25
0.25
0.05
130,500
0.64 4400 540 7.0
18 99.40
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