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Description  |
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The present invention concerns an improved process for making ohmic
contacts between metal and semiconductor, in particular P or N doped
silicon.
In fabricating any integrated circuit, as in the fabrication of any
semiconductor device, according to the most different techniques used for
making such devices, for example, by grown junction, by alloy junction, by
planar technology, by planox fabrication technology (registered trade mark
of SGS MICROELETTRONICA S.p.A.--Italy) etc., it is necessary to form ohmic
type contacts between the semiconductor material, for example P or N doped
silicon, and the metallic material. In other words, forming ohmic type
contacts with the material having metallic conduction, utilized to form,
for example, the necessary interconnections on the front side, or "front"
of the integrated circuit.
The material having metallic conduction used may be of various kinds.
Aluminum, tungsten, tantalum, titanium, their alloys, silicides and
heavily doped polycrystalline silicon are examples of suitable materials
used commercially.
This type of contact which is formed between the material of metallic
conduction and the semiconductor material must show an essentially linear
and symmetric about the origin current-voltage characteristic (ohmic
contact), that is it, must not bring about current "rectification"
phenomena or appreciable non-linearities at least within a certain portion
(maximum foreseeable intensity of the current) about the origin of the
axis at the working conditions (temperature, radiation, etc.) contemplated
for the device.
Furthermore the contact resistance must be the lowest possible for obvious
reasons of containing the power dissipation, for fast switching times in
"EPROM" type devices, for good discrimination of the threshold levels in
logic devices of the "GATE ARRAY" type, etc..
Commonly, according to the modern known technique, the process for making
such contacts on wafers onto which have already been made the required
diffusions thereafter having the superficial layer of oxide or of an
equivalent isolation dielectric compound, reformed includes applying a new
layer of photoresist and forming through it the appropriate "windows" by
known photolithographic masking techniques. This technique contemplates
that the removal of the layer of dielecxtric material, commonly oxide
(e.g. SiO.sub.2), in correspondence of the windows prefromed in the
photoresist layer, until exposing the semiconductor (e.g. doped silicon),
will take place under substantially anisotropic conditions, or any
controlled conditions, in order that the dimensions of the areas onto
which there will be established the ohmic contact be properly defined.
Therefore, it is a well established technique to carry out the removal of
the oxide or of the similar dielectric material, in correspondence of the
predefined windows, by means of a technique known as Reactive Ion Etching
(RIE). That is, by means of a plasma attack of the oxide by reactive ions
(radicals), typically F.sup.-. The surface of the oxide being etched
undergoes by part of ions accelerated by a radio frequency (RF) electric
field applied between an electrode acting as the support of the wafers,
and a counter-electrode, typically of larger dimensions. The electrodes
are housed in a chamber or reactor which may be evacuated and which is
provided with means for introducing and therein circulating a gas at
controlled pressure, means for maintaining a constant temperature
adjustable between 20.degree. and 30.degree. C., and means and
instrumentations for controlling the attack process.
The desired anisotropy of the attack of the oxide being determined by the
directionality of the bombardment by part of the ions which takes place,
necessarily, perpendicular to the surface of the wafer through the opening
of the window formed in the layer of photoresist. The process is conducted
until exposing the underlying single crystal semiconductor.
Subsequent to such a process for preparation of the contact areas, the
wafers are introduced in the apparatus for performing the metallization,
which is commonly made by the technique known by the term "sputtering".
According to such a technique, atoms of the selected metal or compound
having metallic conduction obtained from a solid surface of the metal or
of the compound itself bombarded by inert gas ions accelerated in an RF
electric field, deposit generally over all the surfaces of the chamber and
covering the wafers placed therein with a thin and extremely uniform
layer.
It is also known to subsequently proceed to a heat treatment of the
metallized wafers at a temperature, generally comprised between
300.degree. and 500.degree. C., and for a period of time sufficient to
favor the formation of a metallurgical alloy between the deposited metal
and the single crystal semiconductor material in correspondence of the
areas of contact.
In contacts formed in this way, without further expedients, the contact
resistance results are strongly influenced by the conditions of the
surface of the semiconductor single crystal (e. g. silicon). The presence
of residues of oxide after the attack for removing it from the areas
intended for the formation of the contacts, and/or the successive
re-oxidation of the surface of the semiconductor in coming into contact
with the atmosphere to a thickness which may easily reach about 50 .ANG.
at room temperature conditions, the presence on the surface of the
semiconductor of a film of polymeric material formed during the attack by
C.sub.X F.sub.Y or possibly C.sub.X H.sub.Y F.sub.Z groups, and
"implantation" of hydrogen atoms in the crystal structure of the
semiconductor are some of the factors which cause a relatively high
contact resistance.
Furthermore, it has been found that the contact resistance appears to be
decisively influenced by the state of the crystal lattice of the
semiconductor near the surface of contact with the metallization layer.
The step of removal of such a layer of dielectric is, as mentioned before,
almost exclusively performed by methods which contemplate the bombardment
with ions strongly accelerated in an RF electric field.
The crystal of semiconductor material, next to the surface, is noticeably
damaged by this bombardment and such a damage may be detected by RBS
(Rutherford Back Scattering) measurements. This damage due to the
impingement of high energy ions may indeed bring about an accentuated
modification of the semiconductor material which tends to be rendered
amorphous, that is to lose its characteristics to single crystallinity, in
proximity of the surface subjected to the bombardment. Such effects tend
to increase noticeably the contact resistance. Furthermore, upon exposure
to the atmosphere, on the surface of the semiconductor material thus
exposed a thin layer of oxide is rapidly formed which may reach a
thickness of about 50 .ANG.; the oxidation itself may be strongly favored
by the presence in the single crystal of semiconductor material of defects
induced by the preceding RIE attack treatment.
With the aim of reducing contact resistance caused by the various phenomena
of contamination of the exposed surface of the semiconductor material, it
has been proposed to proceed with the removal of those impurities such as
the eventual film of oxide due to the re-oxidation in air and/or of
polymeric material, by subjecting the wafers to a brief sputter etch
treatment through bombardment with non-reactive ions, commonly Argon ions
(Ar.sup.+), inside the chamber for the metal deposition itself, before
proceeding to the deposition by sputtering of the metal.
This technique, though insuing an almost total absence of oxide or of other
contaminants at the interface between the semiconductor and the
metallization layer, introduces, on the other hand, a further bombardment
damage of the crystal near the contact interface which adds to the damage
caused by the preceding RIE attack determining conditions leading to a
relatively high contact resistance.
More recently it has been proposed to perform, after the RIE attack of the
layer of dielectric material until exposing the underlying semiconductor
in CHF.sub.3 +O.sub.2 plasma, a subsequent RIE attack in NF.sub.3 +Ar
plasma, that is using a non polymerizing reagent gas, of the exposed
surface of the semiconductor material for removing the superficial portion
of the single crystal to a depth of about 500 .ANG.. Such a technique has
the drawbacks of requiring the use of a particularly toxic gas and, though
insuring the removal of the polymer and of the layer contaminated with
implanted hydrogen atoms, does not overcome the problem represented by the
other negative effects of the high energy ion bombardment of the
semiconductor.
Another known technique is that of performing after the RIE attack, that is
after the "opening of the contacts", a so-called "barrel" attack
treatment, that is an attack in oxygen plasma performed by the known
reactors having the shape of a barrel from which such a conventional name
of this known type of plasma treatment derives, in order to remove the
polymer and the residual photoresist material. After that, the wafers are
again subjected to a plasma etch treatment (that is a substantially
isotropic attack) in CF.sub.4 +O.sub.2 plasma in order to remove a small
thickness of the single crystal of semiconductor material in
correspondence of the contact areas. The disadvantage of such a technique
is the increased number of treatments and of the handling of the wafers as
well as the possibility of polymeric substance remaining on the surface of
the contacts.
A further disadvantage common more or less to all the methods of the prior
art is represented by the fact that they require the removal of a
substantial thickness of semiconductor material over the areas intended
for the formation of the ohmic contact.
It is a principal object of the present invention to provide an improved
process for making ohmic contacts of metal-semiconductor without the
drawbacks of the known processes.
The process object of the present invention makes is possible to overcome
the above mentioned disadvantages and drawbacks of the different kinds of
the processes of the prior art in a surprisingly simple and effective way.
Essentially the process of the present invention is characterized by the
fact that the RIE attack for "opening" the areas of the contacts, that is
for removing the layer of dielectric material in correspondence of the
areas suitably defined on the surface by a layer of masking photoresist,
is interrupted before exposing the underlying semiconductor material, thus
effectively preventing any amorphousness or damage by bombardment of the
crystal, the implantation of hydrogen, and other negative effects or
contamination of the semiconductor during this first step of the process
for making the aperture for the ohmic contacts.
Generally it is preferred to stop the RIE attack when a residual thickness
of dielectric material of about 800-1500 .ANG. still remains over the
surface of the crystal of semiconductor material in correspondence of the
areas intended for the realization of the contacts.
At this point, the conditions of attack are modified by substituting the
plasma gas utilized during the first step of the attack, and which
typically contain oxygen and carbon tetrafluoride (CF.sub.4) or
trifluoromethane (CHF.sub.3) or any other compounds which may be easily
polymerized under the conditions existing inside the reactor during the
attack, with non polymerizable gaseous compounds such as for example
sulphur hexafluoride (SF.sub.6) and oxygen. Moreover, the "bias", that is
the difference of potential between the plasma and the surface of the
wafer or of the wafers, is reduced preferably in a way that it results in
less than or equal to 350 V.
Under these modified conditions of attack the removal of the residual layer
of dielectric material is completed and preferably a certain thickness of
the underlying single crystal semiconductor material is also removed.
By this second step of RIE attack, conducted using plasma gas free of
hydrogen and of polymerizing compounds, contamination of the surface of
the semiconductor by polymer and by hydrogen is avoided. Moreover, by
reducing drastically the bias conditions with respect to those normally
used for the attack of the dielectric (first step), even though the
semiconductor is exposed by the attack and eventually the attack is
protracted in order to remove also a very thin superficial layer of the
semiconductor, the semiconductor itself does not appear to undergo any
noticeable damage.
The wafers thus prepared, are then treated in the usual manner, subjecting
them to a barrel treatment to remove the residual photoresist and to an
eventual acid wash to remove the eventual layer of re-oxidation and they
are then metallized by sputtering.
The ohmic contacts formed in accordance with the improved process of the
present invention show an outstandingly low resistance and a great
reliability; these characters reflecting in a decisive reduction of
production rejects.
Thus the process of the present invention provides for making ohmic
contacts between a metallic conduction material and a single crystal
semiconductor material (metal-semiconductor) of low contact resistance and
high reliability without requiring additional handling of the wafers, by
conducting the whole process of attack and of preparation of the surface
of the cocntacts in a single reactor and utilizing attack gases of
relatively low toxicity.
Further, due to the fact that during the first step of the attack of the
major portion of the layer of dielectric any damage of the underlying
semiconductor material is effectively prevented (that is of portion of the
P.sup.+ or N.sup.+ diffused regions of the semiconductor forming the
junctions of the device), it is no longer necessary, as it was instead in
the known processes, to remove a substantial thickness of semiconductor
material for insuring a complete removal of the portion strongly damaged
by the preceding RIE attack of the dielectric. On the contrary removal of
the doped semiconductor material may even be omitted or, preferably such a
removal may be advantageously minimized in a way as not to exceed 100-150
.ANG. in depth. In other words the removal of a minimum thickness (at
least 50 .ANG.) of semiconductor material is effected only for insuring
the complete exposure of the crystal over the entire surface intended for
the realization of the contact in consideration of eventual small
disuniformities of advancement of the attack through the dielectric.
This is particularly advantageous, as it may easily be understood, in
consideration of the evermore stringent dimensional limitations imposed by
increasing the degree of miniaturization (integration).
With the aim of making easier the comprehension and the practice of the
invention, the description proceeds now with the illustration of a
particularly preferred embodiment thereof in the case of wafers of single
crystal silicon with a layer of dielectric constituted substantially by
silicon oxide and with direct reference to the annexed drawing wherein:
FIG. 1 is a schematic showing of a partial microsection in correspondence
of a window defined by means of photolithographic techniques in a layer of
photosensitive material purposely applied on the surface of a wafer;
FIG. 2 is a showing of the same microsection of FIG. 1 as it presents
itself at the end of the first attack operation in RIE plasma;
FIG. 3 is a showing of the same microsection of the preceding figures as it
presents itself at the end of the second operation of attack in modified
RIE plasma according to the present invention.
As it is possible to observe in FIG. 1, the preparatory phase of the
process for making the ohmic contacts in correspondence, for example, of a
P.sup.+ diffusion region 6 in a silicon single crystal 1 covered by a
layer of dielectric material constituted, for example, by a first layer 2
of thermally grown silicon oxide having a thickness of about 1500 .ANG.
onto which there is a layer 3 of silicon oxide deposited from vapor phase
having a thickness of about 5000 .ANG. and a layer 4 of silicon oxide
doped with boron and phosphorus (BPSG for Boron Phosphorus Silicon Glass)
also deposited thereon from vapor phase and having a thickness of about
5000 .ANG., consists in the operations of masking the surface by means of
a layer of photosensitive resin (photoresist) 5 having a thickness of
about 15,000 .ANG..
By means of the known photolithographic techniques suitable windows are
defined in the layer of photoresist material in correspondence of the
areas onto which it is desired to form the ohmic contact between the
material having metallic conduction, for example aluminium or an alloy of
aluminium and silicon with a silicon content comprised between 1 and 3% by
weight which will be successively deposited on the surface of the wafer,
and the silicon, for example the P.sup.+ silicon 6 of the particular
junction shown in FIG. 1.
After eventual cleaning operations, several wafers are placed in suitable
frames of the electrode of a reactor for plasma attacks (RIE) and the
first step of attack is performed.
In the case of silicon wafers of the above mentioned characteristics it is
preferred to perform the attack under the following working conditions:
pressure: about 50 milliTorr
plasma gas and relative fluxes:
CHF.sub.3 at 60 SCCM (standard centimeters cube per minute)
O.sub.2 at 40 SCCM
temperature: regulated and comprised between 20.degree. and 25.degree. C.
power transferred to the plasma: about 1350 W
bias: comprised between 500 and 600 V.
Under these conditions of attack is obtained a ratio of selectivity between
the rate of attack of the silicon oxide and of the photoresist material of
about 1:1, that is the rate of attack of the two materials is about the
same.
Generally the volumetric ratio between CHF.sub.3 and O.sub.2 is preferably
comprised between 2.5:2 and 3.5:2 during this first step.
This latter condition, together with the particular profile of the window
preformed in the layer of photoresist, produces a desirable tapered cross
section of the cavity produced in the layer of dielectric constitued by
the distinct layers 4 and 3 of silicon oxide.
Generally, under these conditions, the rate of attack of the silicon oxide
is about 500 .ANG./min.
The attack is protracted until reaching a depth so as to correspond more or
less with the beginning of the oxide layer 2 (thermally grown oxide)
present on the surface of the silicon, that is leaving a residual
thickness of oxide of about 1000 .ANG..
Generally this first step of attack has a duration comprised between 15 and
25 minutes.
The profile of the etched cavity obtained is shown schematically in FIG. 2.
At this point power is cut off, the atmosphere of the reaction chamber is
purged and the conditions for the second operation of attack contemplated
by the process of the invention are predisposed and may be indicated as
follows:
pressure: about 50 milliTorr
plasma gas and relative fluxes:
SF.sub.6 at 25 SCCM
O.sub.2 at 3 SCCM
temperature: regulated and comprised between 20.degree. and 25.degree. C.
power transferred to the plasma: about 1350 W
bias: comprised between 300 and 400 V.
Under these conditions the rate of attack of silicon oxide results about
300-350 .ANG./min, while the eventually exposed silicon is attacked at a
rate of about 600-800 .ANG./min.
Generally the duration of this second step of attack is about 1.5-2.0
minutes.
The profile of the cross section of the "apertures" thus obtained is that
indicated in FIG. 3.
In general the volumetric ratio between SF.sub.6 and O.sub.2 may range
between 10:1 and 2:1 and may be adjusted in function of the relative
thicknesses of the photoresist and of the oxide layer(s) in order to
obtain the desired rates of attack.
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