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BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a memory card having a size
similar to that of credit card and being capable of storing a great deal
of information therein and more particularly memory card having a random
access memory and power supply therein.
2. Prior Art
Generally, a 3 Volt lithium battery is used in a memory card having a RAM.
A power source for the main body (that portion of a system which can
contain the memory card but excludes the memory card) is often 5 Volt to
drive a CPU and various control circuitries. Thus the moment the memory
card is inserted into the main body, the voltage of the power source for
the RAM in the memory card abruptly changes from 3 Volt to 5 Volt to
thereby often destroy a part or all of the data stored in the RAM. The
prior art measure to prevent this event will be described using FIG. 2
which is a circuit diagram of an embodiment of a prior art memory card. In
FIG. 2, memory card 20 is generally constituted by a RAM 21, a 3 Volt
battery 22, a resistor 23 and capacitor 24 to prevent the data
destruction. A diode 25 is for prevention of reverse flow. When the memory
card 20 is inserted the main body, power source lines, address lines 201
(A0-An), data lines 202 (D0-Dn), control lines 203 (chip enable, etc.,)
are connected electrically with the circuitries in the main body. At this
time the RAM power source voltage slowly rises up from 3 volt to 5 Volt
with a time constant of resistor 23 and capacitor 24. If a fluctuation of
the RAM power source voltage is slow with a time constant more than 1 msec
(1/1000 seconds), it is said that data destruction can be prevented, which
is actually ascertained experimentally. Thus the prior art prevents
destruction of the data stored in the RAM by inserting a resistor and
capacitor in circuit of the power source line for the memory card.
However, a problem with the prior art memory card having the above
structure is that the values of a resistor and a capacitor to render the
time constant of the RAM power source fluctuation larger than 1 msec are
limited to values to be described hereinafter. If the capacity of the
capacitor is increased, its volume also increases, so that the memory card
which is required to be thin limits the capacity of the capacitor 24 to
less than about 1 .mu.F. As a result the value of resistance of resistor
23 is required to be more than about 1K , and the impedance of the power
supply line increases. The RAM has a cell structure as shown in FIG. 3.
When the RAM is accessed to, a switch 211 opens, and electric current flow
through a road transistor 212 and a transistor 213 within the cell in the
direction of the arrow 214. A sense amplifier and a decoder also are
enable. Total current during the access to the RAM is generally around 30
to 40 mA. As a described above, when the impedance of the power supply
line is increased by inserting the resistor of more than 1K to the power
supply line, voltage fall occurs at the inserted resistor by the current
during access and voltage supplied to the RAM is below the operation
voltage thereof. In order to prevent this problem, the value of resistance
of the inserted resistor have to be small. Namely, since the value of the
resistor and capacitor are limited, it is very difficult to obtain a time
constant larger than 1 msec.
Furthermore the capacitor is charged via a protective diode within the RAM
from various signal lines depending on the state of the address lines,
data line, control lines (chip enable, etc.) on the side of the main body,
so that a desired time constant cannot be obtained.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an memory
card which is very thin.
It is another object of the present invention to provide an memory card
having very high reliability.
It is a further object of the present invention to provide an memory card
without destruction of data occurring due to the fluctuation of voltage of
the power source of the RAM when a memory card is inserted into the main
body.
It is a yet further object of the present invention to provide an memory
card having the time constant lager than 1 msec for the fluctuation of
voltage of the power source of the RAM.
An memory card having a shape similar to credit card for storing
information comprises memory means for storing information having a
plurality of terminals for receiving information from and outputting
information stored therein to said external device and two power
terminals, power supply means in said memory card connected to said two
power terminals of said memory means for energizing said memory means, a
plurality of external terminals connected to said plurality of terminals
of memory means for electrically connecting sais memort means terminals of
external device, two external power terminal connected said power
terminals respectively for electrically connecting said power terminals of
memory means and an external power source having a voltage differ from a
voltage of said power supply means in said memory card, capacitor
connected across said power terminals of said memory means, resistor
connected across one of said external power terminal and one of said power
terminal of said memory means, switching means for short-circuiting said
resistor in accordance with a signal from outside.
These and other objects of the invention will become apparent and obvious
to those skilled in the pertinent art upon referring to the following
description provided in connection with the accompanying drawings, of
which:
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a circuit diagram of an embodiment of a memory card according to
this invention.
FIG. 2 is a circuit diagram of an example of a memory card according to the
prior art.
FIG. 3 is a circuit diagram of an example of a cell in the RAM.
DESCRIPTION OF PREFERRED EMBODIMENT
FIG. 1 is a circuit diagram for an embodiment of a memory card according to
this invention. Memory card 20 includes a RAM 21 which stores information,
a battery 22, a reverse flow preventive diode 25, a capacitor 24 across a
power source for RAM 21, and a resistor 23 connected across the RAM 21
power source and an external terminal 210. As switching means for
short-circuiting resistor 23 connects the emitter and collector of
transistor 26 and an external terminal 210 connected to the base of
transistor 26. Resistors 220 are connected in series across external
terminals and corresponding addresses lines 201, data lines 202, control
lines 203 (chip enable, etc.). When memory card 20 is inserted into the
main body, the power source voltage for RAM 21 starts to rise from 3 Volt
to 5 Volt, provided that battery 22 is of 3 Volt and the power source
voltage for the main body is of 5 Volt. At this time, the base terminal of
transistor 26 is connected via external terminal 210 to the main body. The
base terminal is connected to a signal which change to "L" level within
the main body when the RAM is accessed. Namely, the base terminal of
transistor 26 is at "H" level by a signal from the inside of the main body
and transistor 26 is off. Therefore, the power source voltage of RAM 21
slowly rises up with a time constant of resistor 23 and capacitor 24. On
the other hand, when the RAM is accessed, the base terminal of transistor
26 is turned off. Therefore, when the RAM is accessed, the power source
impedance can be reduced to sufficiently low value, so that the value of
resistor 23 can be selected to provide a necessary time constant. Control
of transistor 26 can easily be realized using a control signal (chip
enable, etc.) to the RAM without addition of a special circuitry.
If any one of the address lines, data lines, and control lines of the main
body is at "H" level when memory card 20 is inserted into the main body,
capacitor 24 will be changed via the protective diode within RAM 21 to
thereby raise the power source voltage of RAM 21. However, resistors 220
are connected in series to the respective signal lines, so that the power
source voltage of RAM 21 slowly rises up on the basis of a time constant
of resistor 220 and capacitor 24. These resistors 220 can be selected to
have values which access to the RAM is hindered.
As described above, this invention employs a circuitry in which the value
of resistor 23 can be increased although the capacity of capacitor 24 can
be small, so that a time constant larger than 1 msec can easily be
obtained. Resistors 220 inserted in series in circuit of the respective
signal lines provide desired time constants although the signal lines at
the main body may be at any levels.
While the invention has been shown and described with reference to the
preferred embodiment thereof, it will be understood by those skilled in
the art that the other changes inform and detail may spirit and scope of
the invention.
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