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Cryptographic digital signal transceiver method and apparatus    
United States Patent4817146   
Link to this pagehttp://www.wikipatents.com/4817146.html
Inventor(s)Szczutkowski; Craig F. (Forest, VA); Zinser, Jr.; Richard L. (Schenectady, NY); Kappagantula; Satish (Lynchburg, VA); Peterson, III; Eugene H. (Forest, VA)
AbstractHybrid subband coding and decoding (using different encloding/decoding algorithms in at least one subband channel) and subband time delay compensation at a point of maximum digital bandwidth compression are effected so as to reduce required DSP on-chip memory requirements. At the same time a special digital signal format is employed so as to provide enhanced data frame synchronization, enhanced cryptographic synchronization and selective signalling ability within a cryptographic digital signal transceiver. The ability to successfully accomplish late entry (or to re-establish synchronization once lost) into an ongoing received message is provided.
   














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Cryptographic digital signal transceiver method and apparatus - US Patent 4817146 Drawing
Cryptographic digital signal transceiver method and apparatus
Inventor     Szczutkowski; Craig F. (Forest, VA); Zinser, Jr.; Richard L. (Schenectady, NY); Kappagantula; Satish (Lynchburg, VA); Peterson, III; Eugene H. (Forest, VA)
Owner/Assignee     General Electric Company (Lynchburg, VA)
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Publication Date     March 28, 1989
Application Number     06/661,597
PAIR File History     Application Data   Transaction History
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Filing Date     October 17, 1984
US Classification     380/261 370/509 380/28 380/269 380/274
Int'l Classification     H04K 001/04
Examiner     Cangialosi; Salvatore
Assistant Examiner    
Attorney/Law Firm     Nixon & Vanderhye
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USPTO Field of Search     370/118 380/48 380/28 380/49
Patent Tags     cryptographic digital signal transceiver
   
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 U.S. References
 
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ReferenceRelevancyCommentsReferenceRelevancyComments
4688251
Citron
380/34
Aug,1987

[0 after 0 votes]
4677671
Galand
704/212
Jun,1987

[0 after 0 votes]
4622680
Zinser
375/245
Nov,1986

[0 after 0 votes]
4455649
Esteban
370/522
Jun,1984

[0 after 0 votes]
4434323
Levine
380/260
Feb,1984

[0 after 0 votes]
4382298
Evans
714/709
May,1983

[0 after 0 votes]
4369443
Giallanza
340/7.46
Jan,1983

[0 after 0 votes]
4322576
Miller
380/29
Mar,1982

[0 after 0 votes]
4027243
Stackhouse
375/365
May,1977

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3697682
Berg
348/439.1
Oct,1972

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What is claimed is:

1. In a cryptographic digital signal transceiver including means for processing an input electrical signal having a frequency band of signal components by separating it into plural frequency subbands of signal components which subbands are separately encoded into corresponding binary-valued digital signals that are subsequently combined for transmission over a common digital communication channel, the improvement comprising:

hybrid encoding means which encodes the signal components of at least one of said subbands in accordance with a first predetermined encoding algorithm and which encodes the signal components of at least one other of said subbands in accordance with a different second predetermined encoding algorithm;

time delay means operating in at least one of said subbands to time delay said digital signals in the encoded bit-compressed digital format so as to provide time delay while reducing digital memory requirements for effecting such time delay; and

control means for formatting the digital data being transmitted over said common communication channel to include cryptographic synchronization and frame synchronization signals recurrently during an ongoing transmission, said synchronization signals facilitating late entry receipt of the transmitted digital data.

2. An improved cryptographic digital signal transceiver as in claim 1 wherein said hybrid encoding means includes APCM means for effecting adaptive pulse code modulation as said first predetermined encoding algorithm and BCPCM means for effecting block companded pulse code modulation as said second predetermined encoding algorithm.

3. An improved cryptographic digital signal transceiver as in claim 2 comprising means for defining four octave subbands covering an overall frequency band of approximately 180 to 2900 Hz and wherein the highest frequency subband is BCPCM encoded while the three lowest frequency subbands are APCM encoded.

4. An improved cryptographic digital signal transceiver as in claim 1 including:

QMF filter means for separating a digitized input signal into plural subbands of digital signals having different respective time delays therein and representing corresponding subbands of signal frequency components;

said hybrid encoding coding means separately coding the digital signals in each subband in a digitally compressed form to provide compressed coded digital signals in each of said subbands;

said time delay means time delaying said compressed coded digital signals in at least one of said subbands for a predetermined time period to provide substantially time synchronous digital signals at a predetermined point in each of said subbands; and

multiplex means for combining said substantially time synchronous digital signals into an output stream of coded compressed digital signals.

5. An improved cryptographic digital signal transceiver as in claim 1 including:

transmitter and receiver means for transmitting and/or receiving a succession of digital signals; and wherein

said control means is connected to said transmitter and receiver means and includes a digital data microprocessor system programmed so as to perform the following functions:

(a) initial synchronization acquisition wherein said received digital signals are scanned for an initial preamble portion from which frame synchronization, addressing and cryptographic synchronization signals are extracted,

(b) ongoing synchronization maintenance wherein said received digital signals are scanned for data frames succeeding said preamble portion and from which data frames at least said frame synchronization and said cryptographic synchronization signals are repeatedly extracted so as to permit maintenance of such synchronization throughout the decoding of an encrypted message comprising plural such data frames, and

(c) late entry wherein, in the event frame synchronization and/or cryptographic synchronization are lost or not acquired from said preamble, said data frames are scanned and from which synchronization, addressing and cryptographic synchronization signals are nevertheless extracted and control passed back to said ongoing synchronization maintenance function such that the remaining portion of a properly addressed encrypted message data stream is nevertheless successfully decoded.

6. An improved cryptographic digital signal transceiver as in claim 5 wherein said control means is programmed to process said digital signals occurring in substantially the following time sequence.

(A) a preamble portion having:

(1) an alternating 1,0 data pattern,

(2) 12 repeated sets of

(i) a 16 bit synchronization word including a multiple bit Barker code,

(ii) a 16 bit outside address word including a multiple bit address repeated at least once,

(iii) a 16 bit sync number code including a multiple bit number code (identifying which of the 12 repeats is involved) repeated at least once in complemented form and also including at least 1 bit of parity code,

(3) 9 repeated sets of

(i) a 64 bit guard band,

(ii) a 64 bit cryptographic initialization vector,

(iii) a 16 bit selective signalling code identifying the intended message recipient(s),

(B) successive data frames which each include

(1) a 112 bit header portion having

(i) a 16 bit synchronization word including a multiple bit Barker code,

(ii) a 16 bit outside address word including a multiple bit address repeated at least once,

(iii) a 16 bit selective signalling code identifying the intended message recipient(s),

(iv) a 64 bit cryptographic initialization vector,

(v) at least one of the bit fields in the header portion being distinguishable from the respectively corresponding field in the preamble so as to permit detection of a late entry condition,

(2) a 2040 bit string of cryptographically encoded digital data, and

(C) an end-of-message word signifying the end of a given message.

7. A transceiver for sending and receiving digitized and cryptographically encrypted data signals over a communication channel, said transceiver comprising:

receiver means for providing a sequence of received digital signals;

transmitter means for transmitting a sequence of generated digital signals; and

digital signal processing and control means connected to said receiver means and to said transmitter means for processing said received digital signals into audio output and for generating said generated digital signals from audio signals input thereto,

said digital signal processing and control means effecting hybrid subband encoding/decoding of said digital signals by dividing them into plural subbands and by using a different encoding/decoding algorithm in at least one subband than the encoding/decoding algorithm used in at least one other subband; and

wherein both said received and said generated digital signals are formatted to include

(a) an initial preamble portion which includes timing synchronization signals and cryptographic synchronization signals, and

(b) a subsequent sequence of frames of encrypted data also including embedded timing synchronization signals and embedded cryptographic synchronization signals;

said digital signal processing means for to automatically detecting and monitoring said embedded synchronization signals within said received digital signals, maintaining accurate timing and cryptographic synchronization data, and establishing accurate timing and cryptographic synchronization even after occurrence of said preamble portion in the event of belated signal reception or temporary loss of accurate synchronization data during the course of a given received message.

8. A transceiver as in claim 7 wherein said digital signal processing and control means processes digital signals which include addressing signals identifying the desired message recipient both in said initial preamble portion and embedded in said frames of encrypted data, said digital signal processing means also being adapted to automatically detect and monitor said embedded address signals so as to enable belated correctly addressed receipt of a message even after occurrence of said preamble portion in the event of belated signal reception or temporary loss of accurate address data during the course of a given received message.

9. In a subband signal processing method for processing input electrical signals having a frequency band of signal components by separation into plural frequency subbands of signal components which subbands are separately encoded into corresponding binary-valued digital signals that are subsequently combined for transmission over a common digital communication channel, the improvement comprising:

(a) encoding the signal components of at least one of said subbands in accordance with a first predetermined encoding algorithm and encoding the signal components of at least one other of said subbands in accordance with a different second predetermined encoding algorithm;

(b) time delaying said digital signals in a bit-compressed encoded digital format in at least one said subband so as to provide time delay while reducing digital memory requirements for effecting such time delay;

(c) scanning received signals for an initial preamble portion from which frame synchronization, addressing and crypto-graphic synchronization signals are extracted,

(d) scanning said received digital signals for data frames succeeding said preamble portion and from which data frames at least said frame synchronization and said cryptographic synchronization signals are repeatedly extracted so as to permit maintenance of such synchronization throughout the decoding of an encrypted message comprising plural such data frames, and

(e) in the event frame synchronization and/or cryptographic synchronization are lost or not acquired from said preamble, scanning said data frames from which synchronization, addressing and cryptographic synchronization signals are nevertheless extracted and control is passed back to said ongoing synchronization maintenance function and nevertheless successfully decoding remaining portion of a properly addressed encrypted voice message data stream.

10. A method as in claim 9 wherein said digital signals occur in substantially the following time sequence for a complete message

(A) a preamble portion having:

(1) an alternating 1,0 data pattern,

(2) 12 repeated sets of

(i) a 16 bit synchronization word including a multiple bit Barker code,

(ii) a 16 bit outside address word including a multiple bit address repeated at least once in complemented form,

(iii) a 16 bit sync number code including a multiple bit number code (identifying which of the 12 repeats is involved) repeated at least once and also including at least 1 bit of parity code,

(3) 9 repeated sets of

(i) a 64 bit guard band,

(ii) a 64 bit cryptographic initialization vector,

(iii) a 16 bit selective signalling code identifying the intended message recipient(s),

(B) successive data frames which each include

(1) a 112 bit header portion having

(i) a 16 bit synchronization word including a multiple bit Barker code,

(ii) a 16 bit outside address word including a multiple bit address repeated at least once,

(iii) a 16 bit selective signalling code identifying the intended message recipient(s),

(iv) a 64 bit cryptographic initialization vector,

(v) at least one of the bit fields in the header portion being distinguishable from the respectively corresponding field in the preamble so as to permit detection of a late entry condition,

(2) a 2040 bit string of cryptographically encoded digital data, and

(C) an end-of-message word signifying the end of a given message.

11. An improved subband signal processing method as in claim 9 wherein adaptive pulse code modulation is used as said first predetermined encoding algorithm and block companded pulse code modulation is used as said second predetermined encoding algorithm.

12. An improved subband signal processing method as in claim 11 wherein four octave subbands covering an overall frequency band of approximately 180 to 2900 Hz are utilized and wherein the highest frequency subband is BCPCM encoded while the three lowest frequency subbands are APCM encoded.

13. A method of sending and receiving digitized and cryptographically encrypted data signals over a communication channel, said method comprising:

(a) hybrid subband encoding said digital signals into plural frequency subbands wherein the subband signals are digitally band compressed using an encoding/decoding algorithm in at least one channel that is different from the encoding/decoding algorithm used in at least one other of the subbands;

(b) processing received hybrid subband encoded digital signals into audio output and generating digital signals from locally input audio signals wherein both said received and said generated digital signals are formatted to include

(1) an initial preamble portion which includes timing synchronization signals and cryptographic synchronization signals, and

(2) a subsequent sequence of frames of encrypted data also including embedded timing synchronization signals and embedded cryptographic synchronization signals; and

(3) automatically detecting and monitoring said embedded synchronization signals within said received digital signals so as to maintain accurate timing and cryptographic synchronization data and establishing accurate timing and cryptographic synchronization even after occurrence of said preamble portion in the event of belated signal reception or temporary loss of accurate synchronization data during the course of a given received message.

14. A method as in claim 13 wherein said digital signals include addressing signals identifying the desired message recipient both in said initial preamble portion and embedded in said frames of encrypted data, and automatically detecting and monitoring said embedded address signals so as to enable belated correctly addressed receipt of a message even after occurrence of said preamble portion in the event of belated signal reception or temporary loss of accurate address data during the course of a given received message.

15. A method as in claim 13 further comprising the step of time delaying said digitally band compressed signals in at least one of said subbands so as to reduce the digital memory requirements for effecting such time delay.

16. An arrangement as in claim 1 wherein said time delay means time delay compensates said digital signals in said encoded bit-compressed digital format so as to establish time synchronization of said digital signals in said subbands.

17. A method as in claim 9 wherein said time delaying step includes the step of time delay compensating said digital signals in said encoded bit-compressed digital format so as to establish time synchronization of said digital signals in said subbands.

18. A method as in claim 15 wherein said time delaying step includes the step of time delay compensating said digitally band compressed signals so as to establish time synchronization of said digital signals in said plural subbands.
 Description Submit all comments and votes
 


This invention relates generally to the field of electrical signal coding/decoding for transmission of cryptographically encoded digital signals over communication channels. More particularly, it relates to an improved type of subband coder/decoder wherein digitized signals are digitally encoded, transmitted over a communication channel and decoded so as to reconstruct the original analog or digital signals. When applied to digitized voice signals, this invention will find particular application in voice communication devices such as radios, telephones and the like. It may also be useful wherever digitized electrical signals of any type are to be band compressed to a lower bit rate for transmission over a limited bandwidth signal transmission channel. This application is related to the following commonly assigned copending application:

Ser. No. 661,598 entitled "Hybrid Subband Coder/Decoder Method and Apparatus" by Zinser, filed concurrently herewith which issued on Nov. 11, 1986 as U.S. Pat. No. 4,622,680;

Ser. No. 661,733 entitled "Method and Apparatus for transceiving Cryptographically Encoded Digital Data" by Szczutkowski et al, filed concurrently herewith; and

Ser. No. 661,740 entitled "Method and Apparatus for Efficient Digital Time Delay Compensation in Compressed Bandwidth Signal Processing" by Szczutkowski and also filed concurrently herewith.

The disclosure of these related applications is hereby expressly incorporated by reference. Each of these related applications describes and claims a different aspect of the presently described invention which represents the combination of such different features into a common apparatus or method.

Subband coders of various types, as well as many types of quantized digital signal encoding/decoding algorithms, are well known in the art. For example, the art of subband coder design for a Rayleigh fading channel including discussion of adaptive pulse code modulation (APCM) and block companded pulse code modulation (BCPCM) are discussed in "A Robust 9.6 Kb/s Subband Coder Design for the Rayleigh Fading Channel" by Zinser, Silverstein and Anderson, Proceedings of the IEEE International Conference on Communications, May 1984, Volume 3, pp. 1163-1168. A collection of prior art publications relevant to subband coder design is contained in this paper and is reproduced below (items 1-10) together with additional possibly relevant prior art publications (11-15):

1. Crochiere, R. E., Webber, S. A. and Flanagan, J. L., "Ditigal Coding of Speech in Subbands", Bell Syst. Tech. J., 55 (Oct. 1976), 1069-1085.

2. Crochiere, R. E., "On the Design of Sub-band Coders for Low-Bit-Rate Speech Communication", Bell Syst. Tech. J., 56 (May-June 1977), 747-770.

3. Crochiere, R. E., "Digital Signal Processor: Sub-band Coding", Bell Syst. Tech. J., 60 (September 1981), 1633-1653.

4. Esteban, D. and Galand, C., "Application of Quadrature Mirror Filters to Split Band Voice Coding Schemes", Proc. 1977 Int. Conf. on Acoustics, Speech and Signal Processing, Hartford, CT (May 1977), 191-195.

5. Cummiskey, P., Jayant, N. S. and Flanagan, J. L., "Adaptive Quantization in Differential PCM Coding of Speech", Bell Syst. Tech. J., 52 (September 1973), 1105-1118.

6. Goodman, D. J. and Wilkinson, R. M., "A Robust Adaptive Quantizer", IEEE Trans. Communications, COM-23 (November 1975), 1362-1365.

7. Croisier, A., "Progress in PCM and Delta Modulation: Block Companded Coding of Speech Signals", 1974 Int. Zurich Seminar, Proceedings.

8. Jonston, J. D., "A Filter Family Designed for Use in Quadrature Mirror Filter Banks", Proceedings 1980 Int. Conf. on Acoustics Speech and Signal Processing, Denver, CO (April 1977), 291-294.

9. Max, J., "Quantizing for Minimum Distortion", IRE Trans. Information Theory, IT-6 (March 1960), 7-12.

10. Jakes, W. C., "Microwave Mobile Communications", J. Wiley and Sons, New York (1974).

11. Boddie, J. R., et al, "Adaptive Differential Pulse-Code-Modulation Coding", The Bell System Technical Journal, Volume 60, No. 7, September 1981, pp. 1547-1561.

12. Crochiere, R. E., et al, "A 9.6 Kb/s DSP Speech Coder", The Bell System Technial Journal, Volume 61, No. 9, November 1982, pp. 2263-2288.

13. Smith, M. J. T., et al, "A Procedure for Designing Exact Reconstruction Filter Banks for Tree-Structured Subband Coders", Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing, March 1984, Volume 2, pp. 27.1.1-27.1.4.

14. Barnwell, T. P., et al, "A Real Time Speech Subband Coder Using the TMS32010", . . .

15. Fjallbrant, T., et al, "A Speech Signal ATC-system With Short Primary Blocklengths and Microprocessor-based Implementation", . . . , pp. 357-363.

In real time subband vocoder applications such as those generally described in the above prior art, there are at least two popular techniques for quantization and coding: (a) adaptive pulse code modulation (APCM) or the closely related adaptive differential pulse code modulation (ADPCM) and (b) block companded pulse code modulation (BCPCM). Both of these popular subband coding techniques are discussed in detail in the above-referenced Zinser et al paper which describes and compares a subband coder using the relatively high-complexity BCPCM encoding/decoding algorithm and a subband coder using the relatively low-complexity APCM encoding/decoding algorithm. This comparison reveals that an APCM subband coder gives lower subjective quality and less channel error tolerance than a BCPCM subband coder. As will be appreciated, the less complex APCM algorithm requires less memory to implement (e.g., in a digital signal processor) than does the more complex BCPCM algorithm.

As a result, it might be concluded that it would be preferable to use a BCPCM subband coder. However, the greater memory requirements for BCPCM algorithms have been discovered to exceed the available RAM capacity of some available digital signal processing (DSP) integrated circuits (e.g., the NEC 7720 integrated circuit which has only 128.times.16 bits of RAM).

Nevertheless, in accordance with the present invention, we have discovered that it is possible to use hybrid subband APCM/BCPCM algorithms to minimize required digital memory while still yielding 1 db or more improvement in the overall signal-to-noise ratio (and possibly better subjective voice quality) as compared to a conventional all APCM subband coder.

While in the past different encoding/decoding algorithms have sometimes been cascaded (e.g., see Crochiere et al "A 9.6-Kb/s DSP Speech Coder" which uses a time domain harmonic scaling algorithm prior to a subband coding algorithm which uses ADPCM in each subband), the use of different encoding/decoding algorithms in the various subbands of a subband coder is believed to be a novel technique. Within the context of a digital signal processor (DSP) integrated circuit implementation having limited digital memory capacity, such new hybrid subband coding techniques have been discovered to offer significant advantages.

For example, in the presently preferred exemplary embodiment, an audio signal bandwidth of 180 to 2900 Hz is divided into four octaves. Given that perhaps only one of those octave subbands can be handled with the more complex BCPCM algorithm, we have chosen the highest treble band (e.g, 1450-2900 Hz) as being the preferable subband for BCPCM coding. In the exemplary embodiment, so as to achieve a total output rate of 9,244 bits per second, this highest subband must be coded with no more than about 11/3 bits per sample. Accordingly, in the exemplary embodiment, the real time digital signal processor implements BCPCM by encoding a 16-sample block with 16 sign bits and 5 bits of gain magnitude data. This results in an output rate of 21/16 or 1.3125 bits per sample. Furthermore, such a technique requires only two words of computer memory in a 16-bit architecture. Namely, one 16-bit FIFO buffer for the sign bits and one 16-bit buffer in which to accumulate the gain magnitude.

We have discovered that when such a hybrid subband coder is applied to typical voice signals, the hybrid scheme yields approximately one decibel better signal-to-noise ratio (e.g., 4 db vs. 3 db and perhaps even more) as when compared to a similar all APCM subband coder (e.g., one which uses 11/3 bits per sample for the highest treble subband).

Subband coders using non-symmetrical quadrature mirror filter (QMF) filter trees are also well known in the art. For example, such a QMF filter tree used for separating digitized speech signals into four octave bands (and an inverse QMF tree for combining them back into one band at the receiver) in the context of a subband encoding/decoding technique is discussed in the above-referenced paper by Zinser et al.

As is well known in the art, non-symmetrical QMF filter trees are well suited for efficiently dividing a digitized input signal into subband channels of digital signals representing different frequency subbands of signal components. Such a QMF filter tree is particularly advantageous where programmed digital signal processors are employed to physically implement the signal processing algorithms.

It is also well known that because of the non-symmetrical tree structure of such a QMF filter bank, the various bands have different numbers of filter elements therewithin thus causing different filtering process times to be involved in the different subband channels. It is conventional practice to include compensating time delay in the various subband channels so as to keep the digital signals representing the different frequency components travelling in approximate time synchronism throughout the system. A formula for calculating the required magnitude of time delay compensation in each channel is expressly given in the above-referenced Zinser et al paper.

However, in prior art subband coded signal processing, such time delay compensation has been conventionally effected as a part of or immediately adjacent the QMF filtering function itself. When thus closely associated with the QMF filter tree, the digital memory required for time delay compensation can be rather large due to the relatively high bit rates involved.

Now, however, we have discovered that one may successfully perform the required time delay compensation upon bandwidth compressed encoded digital signals in the subband channels thereby greatly reducing the required memory for implementing such time delay compensation.

For example, on the transmitter side, time delay compensation is not introduced until after digital bandwidth compression takes place by a suitable encoding algorithm (e.g. adaptive pulse code modulation, adaptive differential pulse code modulation, block companded pulse code modulation, etc.). On the receiver side, similar required time delay compensation associated with the inverse QMF filter tree may be effected prior to the decoding step. (If desired, the total desired subband delay for any given channel may be effected totally at the transmitter side or totally at the receiver side or divided therebetween in any desired fashion.)

In the exemplary embodiment, there is an approximately 4.7:1 ratio between the number of bits per second passing through the system before encoding and after encoding. Accordingly, performing the required time delay compensation at points in the system where the signals are compressed to minimum bit rates can significantly minimize the digital memory required for implementing such time delays. In the exemplary embodiment, the conventionally required RAM (for implementing delay compensation as calculated in the Zinser et al paper) is 49 sixteen bit words whereas, using our invention, only 5 sixteen bit words of RAM are required.

The present invention includes a technique for efficient implementation of delay equalization in a subband coder/decoder (e.g. a multi-band data compression waveform encoder/decoder). It permits particularly efficient implementation (in terms of minimum digital memory requirements) of speech bandwidth compression algorithms. It may also, of course, be used to efficiently implement more generalized waveform encoder/decoder algorithms where digital signals are bandwidth compressed so as to require the transmission of fewer bits per second at some points in the system.

In particular, efficient realization of delay equalization is provided for filter elements (or for that matter any other elements) so as to bring the processed signal within the discrete subbands back into time synchronism with respect to one another before they are multiplexed and transmitted over a common communication channel and/or at least before they are decoded and recombined in proper time synchronism (i.e. "in phase"). Since some presently available DSPs (Digital Signal Processors) have only limited on-chip digital memory capacity, the more efficient time delay compensation technique of the present invention may permit all of the required signal processing functions to be implemented on a single DSP integrated circuit chip.

Transceiving digital control and message data signals over radio communication channels is also already well known in the art. For example, reference may be had to commonly-assigned U.S. Pat. No. 4,027,243 - Stackhouse et al which describes a form of digital message generator for a digitally controlled radio transmitter and receiver in a radio communication system. Provisions are made for acquiring bit synchronization as well as word synchronization (including the multiple transmission of address information in complemented and uncomplemented form) in each of a steady succession of digital command messages transmitted between radio station sites. A modem circuit capable of detecting a 2 out of 3 voted Barker code sync word for frame synchronization is included in the Stackhouse et al system.

Cryptographic encoding of digitized speech signals is also well known in the prior art. For example, the Data Encryption Standard (DES) utilized in the presently preferred exemplary embodiment of this invention is itself well known and more fully described in detail in the following printed publications:

"Federal Information Processing Standards" Publication No. 46, Data Encryption Standard, U.S. Department of Commerce, NTIS, 5285 Port Royal Road, Springfield, Virginia 22161;

"Federal Standard 1027 GSA, Telecommunications, General Security Requirements For Equipment Using DES" available from NTIS or the U.S. Government Printing Office; and

"Federal Information Processing Standards Publication No. 81, DES Modes of Operation" (the "output feedback mode" is utilized in the presently preferred embodiment of this invention), also available from NTIS or the U.S. Government Printing Office.

Typically, as in DES, encoded digital voice signals are transmitted in blocks or "frames" of fixed size along with a progressively changing encryption "vector" which, when combined with appropriate secret "key" digital data, may be used to encode or decode digitized voice data (or any other type of digital data).

It is also known to provide automatic selective signalling within radio communication networks of various types. Sometimes a separate "control" channel is utilized for achieving the desired selective signalling functions (e.g. selection of available communication channels and selection of a desired subset of message recipients within the system).

However, for various reasons, in prior voice privacy systems utilizing digitized and cryptographically encoded voice data signals, truly automatic selective signalling capability is not believed to have been previously available. Nevertheless, it is highly desirable in many radio communication environments to have such selective signalling capability. For example, it may be very useful to selectively address one of plural repeaters that may be within range of a given transceiver which is generating or relaying such an encrypted digital voice message.

It is also believed highly desirable to permit late entry and/or synchronization recovery (both word and cryptographic synchronization recovery) in the context of a digital voice privacy radio communication system having true selective signalling capability.

As explained in Stackhouse et al, a radio frequency communication channel is a relatively noisy and sometimes unreliable environment. Impulse noise, multipath interference and signal fading are typical of the expected problems that must be successfully overcome.

The present invention utilizes a unique format of control and encoded voice digital signals which provides the above set forth desired features especially well in the context of a radio frequency communication channel. It follows, of course, that the same unique format is also advantageous for any other less onerous type of communication channel such as, for example, conventional telephone channels or wire lines (perhaps also using added conventional modems on each end of the channel).

These as well as other advantages, objects and features of the invention will be better appreciated by careful study of the following detailed description of the presently preferred exemplary embodiment of this invention in conjunction with the accompanying drawings, of which:

FIG. 1 is a schematic block diagram of the hardware and overall hardware architecture which may be utilized to implement this invention;

FIG. 2 is a functional block diagram of an exemplary hybrid subband coder in accordance with this invention of the type which may be implemented by the digital signal processing or "speech coding circuits" shown in FIG. 1;

FIG. 3 is a functional block diagram of an exemplary ADPCM coder/decoder of the type depicted in FIG. 2 and which can also be implemented by proper programming of a digital signal processor (DSP) such as that shown in FIG. 1;

FIG. 4 is a functional block diagram of an exemplary BCPCM coder/decoder of the type generally depicted in FIG. 2 and which may also be implemented by properly programming the digital signal processor (DSP) circuits of FIG. 1;

FIG. 5 is a general functional flow diagram of a transmit operation in the exemplary embodiment;

FIG. 6 is a flow diagram of an exemplary receive operation in the exemplary embodiment;

FIG. 7 is a graph depicting the non-overlapping subbands utilized in the preferred exemplary embodiment so as to minimize distortion otherwise caused by the relatively coarse quantization steps necessarily utilized in the exemplary embodiment ADPCM/BCPCM hybrid subband coder/decoder;

FIG. 8 is a functional block diagram of a typical prior art time delay compensation process;

FIG. 9 is a functional block diagram of a time delay compensation process in a subband transmitter encoder in accordance with this invention;

FIG. 10 is a functional block diagram of a time delay compensation process for a subband receiver decoder in accordance with this invention;

FIG. 11 is a schematic/graphic depiction of an exemplary preferred format or time sequence of the transmitted and/or received stream of digital signals in the exemplary embodiment of FIG. 1; and

FIGS. 12-14 are simplified general flow block diagrams of exemplary computer programs that are embodied in the control program memory devices of the exemplary FIG. 1 system embodiment for the purposes of sync maintenance, acquisition and late entry.

The transceiver of FIG. 1 includes the usual radio frequency transmitter 10 and radio frequency receiver 12 (or any other communication channel transmitter and receiver such as, for example, the transmit lines and receive lines of a conventional wire line modem). As indicated in FIG. 1, the transceiver may be in communication with one or more repeaters or other transceivers or base station(s) over a radio frequency or other form of communication channel. The clear/private switches S1, S2 (typically realized as conventional solid state controlled MUX switches used to switch analog signals under control of digital switch signals) may be provided so that the transceiver can operate in a conventional "clear" mode or alternatively, in the cryptographic or "private" mode. For example, when the switches are in the "clear" mode as shown in FIG. 1, the audio input coming from a microphone and to be transmitted is simply directly connected to transmitter 10 while the output of receiver 12 is directly connected to the usual receiver audio output circuit.

However, when switches Sl, S2 are moved to the "private" mode position, then the microprocessor controlled remainder of the FIG. 1 circuitry is switched into operation between the usual receiver audio input/output circuits and the usual radio frequency transmitter/receiver circuits 10, 12. In particular, the microprocessor controlled circuitry will take conventional audio input signals (e.g. from a microphone or audio amplifier or the like) and convert those to a stream of cryptographically encoded digital signals input at switch S1 to the modulator of transmitter 10. On the receiving side, a stream of digital signals arrives via the detector output of receiver 12 and is ultimately decoded and converted into analog audio signals at the lower contact of switch S2 before being passed onto the usual receiver audio output circuits (e.g. audio amplifiers, loudspeakers, etcetera).

In the preferred embodiment, the detector output of receiver 12 is constantly connected to the "private" digital decoding circuits (as shown in FIG. 1) so that the received signal can constantly be monitored. If a switch from "clear" to "private" mode is unexpectedly effected at the transmitter (e.g. initially or in the middle of an ongoing message), then the receiver "private" circuit will automatically begin the requisite decoding process and have decoded audio signals switched to the receiver audio output circuits automatically. This arrangement also takes it possible for the receiving set to automatically switch itself into the "private" mode wherever incoming digital signals are successfully decoded and in fact, this is contemplated for the preferred embodiment.

The overall architecture of the micro-processor control circuits shown in