or
Bookmark and Share
Image display apparatus
   
Document Number
US Patent 4821031
Issued Date
April 11, 1989
Link
Inventors
Map
Abstract
Image display apparatus reads data from an image memory to produce an image on a interlaced raster-scanned display. The image can be zoomed by producing X and Y magnifications. X magnification is produced by repeating each pixel a predetermined number of times. Y magnification is produced by repeating each display line a predetermined number of times. The number of repetitions of each display line can be varied from line to line and can be different in the two frames, so as to cope with odd-number Y magnification factors. This is achieved by using a register file which holds the required line repetition counts.
Drawing
Image display apparatus - US Patent 4821031 Drawing
Drawing from US Patent 4821031
Tags:
Description:
Amusing 0%
Clever 0%
Complex 0%
Efficient 0%
Historic 0%
Important 0%
Innovative 0%
Interesting 0%
Practical 0%
Simple 0%
Number of Claims:
7
Comments:
no comments yet
Owner
Published
April 11, 1989
Application Number
07/146,219
Filed
January 20, 1988
US Classification
345/671  
Int'l Classification
G09G   5/391   (20060101)   G09G   5/36   (20060101)  
Assistant Examiner
Attorney/Law Firm
USPTO Field of Search
340/731   340/723   340/720  
Related Patents
5886682 - Method and apparatus for stretching bitmaps to non-integer multiples - Owned by Compaq Computer Corporation (Houston, TX)

The stretching of bitmap images in a computer system is accomplished by stretching each row of a source bitmap and storing the pixel information associated with the stretched row in a buffer, typically in main memory. The pixel information is transferred multiple times to the memory location associated with the destination bitmap, these memory locations generally reside in either main memory or in the frame buffer. Each time the buffer is written to the destination bitmap, an error term is adjusted by a predetermined amount. When the value of the error term meets a predefined criteria, the next row of the source bitmap is stretched and stored in the buffer and the process is repeated.

5107254 - Address producing circuit for zoom function - Owned by SamSung Electronics Co., Ltd. (Suwon,KR)

Disclosed is an address producing circuit for zoom function in which horizontal and vertical addresses are to make more free selection of a partial picture around a plurality of locations disposed on a screen of a monitor device, and image data stored in a predetermined address region according to the selection is read out to display on the screen, so that the picture of the selected partial region can be magnified to a whole screen picture.

5459484 - Display control system and method of using same - Owned by Proxima Corporation (San Diego, CA)

A new and improved display control system includes a set of low speed analog to digital converters for converting incoming, high resolution information such as workstation based information into digital information for display on a low resolution display monitor. A logic arrangement compresses the high resolution information by eliminating certain horizontal and vertical pixel image information during one frame cycle and by eliminating certain adjacent horizontal and vertical pixel image information during the next frame cycle.

5319383 - Circuit arrangement for controlling the raster-like pictured representation of information - Owned by Siemens Nixdorf Informationssysteme AG (Paderborn,DE)

For the representation of information mon a data display device with picture elements with different side ratios, the speed of readout from the picture information store is changed such that the different kinds of picture elements (A) and (A') are geometrically similar to each other.

6359600 - Matrix display device for displaying a lesser number of video lines on a greater number of display lines - Owned by Flat Panel Display Company (NL)

A matrix display device comprises a matrix display (10) with picture elements (18) arranged in a number of display lines (R). A driving circuit (3) supplies picture signals (Ds) to the picture elements (18) dependent on a video signal (V) which comprises, in a field (Fp), a number of video lines which is lower than the number of display lines (R). A line period (Tl) is defined as the duration of one of the video lines. To display video information on all display lines (R) regularly, after a number of line periods (Tl), more than one display line (R) is selected within one line period (Tl) to write video information to more than one display line (R). Therefore, a timing circuit (21) receives video timing information (S) to determine consecutive and non-overlapping select periods (Tr), each select period (Tr) completely occurring within a line period (Tl). In at least one of the line periods (Tl), at least two select periods (Tr) occur. A selecting circuit (20) successively selects the display lines (R), each display line (R) being selected during an associated one of the select periods (Tr). The timing circuit (21) according to the invention is adapted to obtain select periods (Tr) all having a substantially equal duration. Thus, the select periods (Tr) during line periods (Tl), during which only one display line (R) is selected, have the same duration as the select periods (Tr) during line periods(Tl) during which more than one display line (R) is displayed.

Claims
Description
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us