An addressable transducer interface which may be associated with a particular electrical transducer, comprises means (107) for storing correction data for the correction of errors as herein defined relating to that transducer so that on addressing of the interface by external control means, the correction data may be transmitted to the control means together with measurement data from the transducer. The storing means is arranged to store said correction data in digital form. The interface includes an analogue to digital converter circuit which comprises means (305, 306) for changing a capacitor (303) of a given value from a source of constant current of a given value, voltage comparator means (310, 311, 312) arranged to compare the value of an analogue voltage signal on an input with the charge voltage in said capacitor, a digital counter (301) arranged to start a count of cycles of a reference frequency when charging the capacitor is commenced from zero charge, a shift register (316, 317, 318) and a loading circuit arranged to cause the instantaneous count in said counter to be loaded into said shift register at the time when the charge in said capacitor is detected by said comparator as being equal to the value of the analogue signal.
An analog to digital converter for high-speed, high-accuracy conversion includes a charge storage means for storing an input analog value to be converted, means for controlling discharge of the charge storage means, a comparator means for sensing discharge level of said charge storage means and transmitting a stop signal at a precise time, a tapped delay line means which is responsive to a start signal to generate a sequence of binary values, a first register means responsive to the stop signal for capturing the binary values corresponding to a delay time between the start and the stop signal, and an encoder means coupled to the register means for converting the binary values to a digital value representative of the input analog value. In a further embodiment, a counter means and a second register means are employed in parallel with the tapped delay line means and the first register means in connection with a frequency reference to provide digital conversion over a wide dynamic range, the first register means and the tapped delay line means capturing input binary values over at least one cycle of the frequency reference which is one count of the counter.
A device and method for data transmission between a transducer and a processing unit which are coupled by one or several signal transmission lines, to selectively activate at least two different modes of operation of the transducer. The device includes a comparator unit which identifies the respectively activated mode of operation by comparing signals present on at least one signal transmission line with predetermined reference signals.
A microphone device having input terminals for receiving an input analog signal and output terminals to produce an output digital signal. The microphone device includes a converter circuit having input terminals coupled to the input terminals of the microphone device and an output terminal coupled to the output terminals of the microphone and an output terminal coupled to the output terminals of the microphone device. The device includes an analog input interface having input terminals corresponding to the input terminals of the microphone device and first and second output terminals to produce an amplified analog voltage signal, a converter circuit having first and second input terminals corresponding respectively to the first and the second output terminals of the analog input interface and an output terminal to produce a digital voltage signal and a parallel to serial digital output interface having an input terminal corresponding to the output terminal of the converter circuit and output terminals corresponding to the output terminals of the microphone device. The converter circuit desirably includes a signal modulator circuit having an input terminal coupled to the input terminals of the converter circuit and an output terminal to produce an intermediate digital voltage signal and a signal sampler circuit having an input terminal corresponding to the output terminal of the signal modulator circuit and an output terminal corresponding to the output terminal of the converter circuit.
The rotation speed of an electric motor (9) is controlled by a controller (6) which receives its setpoint from a characteristic function (23). The characteristic function (23) calculates a setpoint for the controller (6) on the basis of an originally analog variable A (2) that is converted to digital by an A/D converter AD (10), with the aid of support values of a "MEM+DATA" characteristic that are stored in a memory (4); those values not predefined by the support values are calculated by interpolation.
The rotation speed of an electric motor (9) is controlled by a controller (6) which receives its setpoint from a characteristic function (23). The characteristic function (23) calculates a setpoint for the controller (6) on the basis of an originally analog variable A (2) that is converted to digital by an A/D converter AD (10), with the aid of support values of a "MEM+DATA" characteristic that are stored in a memory (4); those values not predefined by the support values are calculated by interpolation.
