A process for the passivation of crystal defects or grain boundaries or internal grain defects or surfaces in an electrically conductive material in a plasma, where the passivation is carried out by the influence of suitable ions on the electrically conductive material to facilitate a shorter process time and lower stress on the electrically conductive material. A high-frequency gas discharge plasma is acted upon by a superimposed d.c. voltage which serves to accelerate the ions, suitable to carry out the passivation, towards the electrically conductive material.
A method for the passivation of crystal defects in polycrystalline or amorphous silicon material using a temperature treatment step in a hydrogen-containing atmosphere the method results in favorable diode properties and favorable passivation properties in amorphous or, respectively, polycrystalline silicon material in a simple manner. Hydrogen-oxygen compounds are reduced at the surface of the silicon material, creating atomic hydrogen that diffuses into the silicon material.
A process for fabricating an MOS device specifically a DRAM device, featuring passivation of defects in regions of a semiconductor substrate wherein defects left unpassivated can deleteriously influence data retention time, has been developed. A high density plasma dry etching procedure used to define the DRAM conductive gate electrode can create unwanted defects in a region near the surface of uncovered portions of the semiconductor substrate during the high density plasma procedure over etch cycle. Implantation of a group V element such as arsenic can be used to passivate the unwanted plasma etch defects, thus reducing the risk of defect related device leakage phenomena. However to insure the group V implanted species remain at or near the semiconductor surface for optimum defect passivation, the group V element implantation procedure is performed after all high temperature DRAM fabrication steps, such as selective oxidation for creation of oxide spacers on the sides of the conductive gate electrode, have been completed. A slow diffusing implanted arsenic ion is the optimum candidate for passivation while faster diffusing group V elements such as phosphorous are not as attractive for defect passivation.
The internal grain boundaries and intergranular spaces of polycrystalline semiconductor material may be passivated with an amorphous material, to substantially eliminate the dangling bonds at the internal grain boundaries. The passivated polycrystalline material of the present invention exhibits a lower electrically active defect density at the grain boundaries and intergranular space compared to unpassivated polycrystalline material. Moreover, large classes of amorphous passivating materials may be used for each known semiconductor material so that the passivating process may be readily adapted to existing process parameters and other device constraints. Passivated polycrystalline material may be employed to form the well or low energy bandgap layer of a quantum well device or superlattice, while still maintaining the required tunneling effect. By freeing quantum well devices from the requirement to use monocrystalline well material deeper wells may be produced, and a wider range of materials may be used, with high yields and low cost processes.