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Claims  |
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I claim:
1. A high voltage converter, comprising:
(a) switching and commutation means, adapted to be disposed across the
output terminals of a power supply and comprising at least two switch
means in series with each other, for switching current therethrough;
(b) capacitor means comprising two capacitors in series with each other and
across said power supply;
(c) a series capacitor and a series inductor in series with each other for
joining the common node between said two capacitors to the common node
between said two switch means;
(d) transformer means across said series capacitor for providing a high
voltage AC output; and
(e) control means, using as a voltage reference the voltage at said common
capacitor node and using a voltage controlled oscillator output signal,
for operating said switching and commutation means to maintain the current
output generally constant as load changes, said control means including:
a rectifying and doubling circuit for producing from said AC current a DC
voltage whose value is between the average value of the AC waveform and
the peak value of the AC waveform, said DC voltage being used to control
the output amplitude of said voltage controlled oscillator, whereby the
amplitude of the oscillator output is generally representative of the RMS
value of said AC current.
2. The converter of claim 1, wherein each of said two switches have a
commutation diode across it.
3. The converter of claim 1, wherein said power supply is a high voltage DC
source of power and further including comparator means, using said voltage
at said common capacitor node and a voltage derived from the output of
said power supply, for biasing the output of said control means.
4. The converter of claim 3, wherein said derived voltage has a magnitude
approximately one-half the magnitude of the voltage across said power
supply.
5. The converter of claim 4, wherein said control means further comprises:
a comparator which provides signals to drive said switching and commutation
means, said comparator having a ramp voltage at its inverting input and a
voltage at its non-inverting input which is obtained from voltage
controlled oscillator and which is clamped to a reference voltage; and
means for providing a slowly decreasing voltage and adding said decreasing
voltage to said non-inverting input, whereby said comparator output slowly
decreases and said duty cycle decreases until the voltage at said junction
is approximately equal to said one-half voltage.
6. The converter of claim 4, wherein derived voltage is obtained from two
generally equal resistors which are in series with each other and across
said power supply, said derived voltage being obtained at the common node
between said two generally equal resistors.
7. The converter of claim 6, further including two resistors of unequal
value in series with each other and across said power supply, said two
unequal resistors being joined together at a common node which is
connected to the common node between said two capacitors,
said comparator means including a voltage comparator which has at its
inverting input the voltage at said capacitor node and has at is
non-inverting input the voltage at said generally equal resistor node,
whereupon energization of said power supply the bias is at a minimum.
8. The converter of claim 1, wherein said switching and commutation means
comprises two field effect transistors which are in series with each other
and which have fast recovery diodes therein.
9. The converter of claim 1, further including overcurrent protection means
for preventing the inducement of high current in said switching and
commutation means, said overcurrent protection means including means for
disabling said oscillator in the event said current exceeds a
predetermined value.
10. The converter of claim 1, wherein said rectifying and doubling circuit
comprises:
(a) a first series circuit of a capacitor, resistor, and diode which is in
parallel with a load resistor through which said output current flows; and
(b) a second series circuit of a second capacitor, a second resistor, and a
second diode, said second series circuit being in parallel with said
resistor and diode, the voltage across said second capacitor being
representative of the RMS value of said output current.
11. The converter of claim 1, wherein said switching and commutation means
further comprises a drive transformer having two secondary windings which
are wound in opposition to each other for gating said two switch means
alternatively, and wherein said control means includes level shift means
for providing a shift in the level of the voltage used to gate each switch
means as a function of its duty cycle, said level shift means comprising
at least one capacitor in series with a secondary winding of said drive
transformer and zener diode means in parallel with the series combination
of said one capacitor and said one secondary winding.
12. The converter of claim 11, wherein each switch means is a FET whose
gate is triggered by the voltage across said zener diode means, and
wherein the primary winding of said drive transformer is operated in
response to said control means, said level shift means comprising means
for producing a voltage at said gate.
13. The converter of claim 11, further including a circuit of a resistor
joined at a node to the parallel combination of a diode and an inductor,
said circuit being in parallel with said zener diode means, the voltage
across said resistor being used to gate said switch means.
14. The converter of claim 1, further including:
(f) overcurrent protection means for protecting said switching and
commutation means in the event the current out of said transformer means
exceeds a predetermined value.
15. The converter of claim 14, wherein at least one of said two switch
means comprises at least one field effect transistor (FET), and wherein
said overcurrent protection means includes means for turning said one FET
"off" in response to said current out of said transformer exceeding said
predetermined value.
16. The converter of claim 15, wherein said overcurrent protection means
shorts the gate of said one FET to ground in response to said current out
of said transformer exceeding said predetermined value.
17. The converter of claim 14, wherein said overcurrent protection means
includes means for shutting off said voltage controlled oscillator in
response to said current out of said transformer exceeding said
predetermined value.
18. The converter of claim 17, wherein said voltage controlled oscillator
comprises a square wave oscillator and a bandpass filter for passing the
fundamental of said square wave oscillator, and wherein the output of said
oscillator is shorted to ground by said overcurrent protection means in
response to said current out of said transformer exceeding said
predetermined value.
19. The converter of claim 1, further including:
(f) an undervoltage lockout circuit for enabling said switching and
commutation means by providing a voltage thereto after the voltage from
said power supply has exceeded a predetermined value.
20. The converter of claim 19, wherein said undervoltage lockout circuit
comprises:
(a) a switch to supply a voltage to a bus;
(b) zener diode means for providing voltage from said bus to power said
switching and commutation means after said bus voltage has exceeded said
predetermined value.
21. The converter of claim 19, further including: a timing circuit of a
timing resistor connected to a timing capacitor at a timing node, said
timing resistor and timing capacitor being disposed between a ground and a
reference voltage; and shorting means, operated in response to said
voltage provided by said undervoltage lockout circuit, for shorting said
timing capacitor when said provided voltage is low, whereby when said
provided voltage goes high, the voltage at said timing node decreases from
a value generally equal to said reference voltage in accordance with the
RC time constant of said timing circuit.
22. The converter of claim 21, wherein said control means includes voltage
clamping means whose output is operatively connected to said switching and
commutation means and whose input is operatively connected to said timing
node, for providing a voltage clamping function to said switching and
commutation means.
23. The converter of claim 22, wherein the output of said control means is
also operatively connected to the input of said clamping means.
24. The converter of claim 23, wherein said control means comprises:
greater voltage reference means, across said power supply, for producing a
voltage which is greater than one-half of the voltage across said power
supply; and
comparator means, having an inverting input operatively connected to the
output of said greater voltage reference means and having a non-inverting
input operatively connected to a voltage derived from two generally equal
resistors in series with each other and operatively connected to the
output of said supply, for applying a bias voltage to said clamping means.
25. The converter of claim 19, wherein said switching and commutation means
comprises:
(a) a drive transformer;
(b) totem pole means, operated by said undervoltage lockout circuit and
said control means, for supplying a charging voltage from said power
supply to a capacitor which is in series with the primary of said drive
transformer before said control means becomes effective, said charging
voltage having a magnitude approximately one-half of said power supply
voltage.
26. The converter of claim 1, wherein said control means includes
means for supplying a false current feedback voltage to shut off said
voltage controlled oscillator in the event of an overcurrent condition and
for restarting said voltage controlled oscillator by ramping it up from a
generally off condition.
27. The converter of claim 1, said control means further including
slow start means for slowly starting said control means such that the
initial duty cycle will be approximately fifty percent and then increase
or decrease according to the voltage at said node between said two
capacitors in series with each other.
28. The converter of claim 27, wherein said switching and commutation means
further comprises:
(a) two generally equal resistors in series with each other across said
power supply;
(b) two transistors connected at a common junction in a totem pole across
said power supply with their bases joined to the node between said two
generally equal resistors and operatively connected to the output of said
control means; and
(c) a drive transformer, having one end of its primary winding joined to
said common junction of said two transistors by a capacitor, for supplying
at least two oppositely wound secondary windings, said capacitor being
charged to approximately one-half of the voltage of the power supply while
said control means is being started.
29. The converter of claim 1, wherein said switching and commutation means
includes drive transformer means for driving said two switch means, said
drive transformer means having a primary winding which has one end coupled
by a coupling capacitor to the output of said control means, said control
means including means for precharging said coupling capacitor on start-up
to avoid said two switch means being energized at the same time.
30. The converter of claim 29, wherein said switching and commutation means
comprises:
(a) two resistors in series with each other across said power supply; and
(b) two transistors connected at a common junction in a totem pole across
said power supply with their bases joined to the node between said two
resistors and operatively connected to the output of said control means,
said one end of said primary winding being joined to the said common
junction of said two transistors by said coupling capacitor.
31. The converter of claim 29, wherein said control means comprises:
a comparator which provides signals to drive said switching and commutation
means, said comparator having a ramp voltage at its inverting input and a
voltage at its non-inverting input which is clamped to a reference
voltage; and
means for providing, on a start-up of said converter, a slowly decreasing
voltage and for adding said decreasing voltage to said non-inverting
input, whereby said comparator output slowly decreases and said duty cycle
initially decreases.
32. An amplifier, comprising:
(a) a four-quadrant buck converter having switching and commutating means
for switching and commutating current to and from a common node and having
a common leg of an inductor in series with an output capacitor, one end of
said common leg being joined to said common node;
(b) one power supply for providing a positive voltage output signal and a
negative voltage output signal to the other end of said common leg and to
said means for switching and commutating current to and from a common
node;
(c) an output transformer whose primary is connected across said output
capacitor; and
(d) pulse width modulated control means for operating said switching and
commutating means to produce a predetermined voltage across said output
capacitor and for regulating the current out of said transformer, said
control means operating in response to
voltage signals from each side of said output capacitor,
a high frequency ramp voltage,
an internal oscillator voltage, and
a voltage reference signal, said internal oscillator voltage being combined
with said voltage signals from said output capacitor and said voltage
reference signal to obtain an error voltage, said error voltage being
combined with a high frequency ramp voltage to obtain a control voltage.
33. The amplifier of claim 32, wherein said control means includes
rectifying and doubling circuit means for producing, from the AC current
flowing from said output transformer, a DC control voltage whose value is
between the average value of the AC waveform and the peak value of the AC
waveform; and
wherein said internal oscillator amplitude is a function of said DC control
voltage.
34. The amplifier of claim 33, wherein said control means includes means
for sensing the current flowing through said primary of said output
transformer and supplying a false DC control voltage to said internal
oscillator to lower the amplitude of the output of said internal
oscillator in the event said current flowing through said primary of said
output transformer exceeds a predetermined value.
35. The amplifier of claim 32, wherein said control means includes
overcurrent protection means for shutting off the operation of switching
and commutation means in the event the current flowing through said
primary of said output transformer exceeds a predetermined value.
36. The amplifier of claim 35, wherein said overcurrent protection means
includes means for shutting off said internal oscillator in the event that
the current flowing through said primary of said output transformer
exceeds said predetermined value of current.
37. The amplifier of claim 36, wherein said control means includes means
for restarting said internal oscillator by ramping it up at a
predetermined rate from its shut off condition after said current flowing
through said primary of said output transformer has dropped below said
predetermined value.
38. The amplifier of claim 32, further including undervoltage lockout means
for enabling said switching and commutation means by providing a voltage
thereto after a voltage from said power supply has exceeded a
predetermined value.
39. The amplifier of claim 38, further including: a timing circuit of a
timing resistor connected to a timing capacitor at a timing node, said
timing resistor and timing capacitor being disposed between a ground and a
reference voltage; and shorting means, operated in response to said
voltage provided by said undervoltage lockout means, for shorting said
timing
means for providing on start-up of said amplifier a slowly decreasing
voltage and for adding said decreasing voltage to said non-inverting
input, whereby the duty cycle of said comparator output initially slowly
decreases.
40. The amplifier of claim 39, wherein said control means includes voltage
clamping means, whose output is operatively connected to said switching
and commutation means and whose input is operatively connected to said
timing node, for providing a voltage clamping function to said switching
and commutation means.
41. The amplifier of claim 40, wherein the output of said control means is
also operatively connected to the input of said clamping means.
42. The amplifier of claim 40, wherein said control means includes:
greater voltage reference means, across said power supply, for producing a
voltage which is greater than one-half of the voltage across said power
supply; and
comparator means, having an inverting input operatively connected to the
output of said greater voltage reference means and having a non-inverting
input operatively connected to a voltage derived from two generally equal
resistors in series with each other and operatively connected to the
output of said supply, for applying a bias voltage to said clamping means.
43. The amplifier of claim 38, wherein said switching and commutation means
comprises:
(a) a drive transformer;
(b) totem pole means, operated by said undervoltage lockout means and said
pulse width modulated control means, for supplying a charging voltage from
said power supply to a capacitor which is in series with the primary of
said drive transformer before said pulse width modulated control means
becomes effective, said charging voltage having a magnitude approximately
one-half of said power supply voltage.
44. The amplifier of claim 38, wherein said switching and commutation means
comprises:
(a) two generally equal resistors joined together at a common node to be in
series with each other across said power supply;
(b) two transistors connected at a common output junction in a totem pole
across said power supply with their bases joined to said node between said
two generally equal resistors and operatively connected to the output of
said control means; and
(c) a drive transformer, having one end of its primary winding joined to
said common output junction by a capacitor, for supplying voltage to at
least two oppositely wound secondary windings in response to the voltage
applied to said two transistor bases, said capacitor being charged to
approximately one-half of the voltage of the power supply while said
control means is being started.
45. The amplifier of claim 32, wherein said control means comprises:
a comparator which provides signals to drive said switching and commutating
means, said comparator having said ramp voltage at its inverting input and
said error voltage at its non-inverting input which is clamped to a
reference voltage; and
means for providing on start-up of said amplifier a slowly decreasing
voltage and for adding said decreasing voltage to said non-inverting
input, whereby the duty cycle of said comparator output initially slowly
decreases.
46. The converter of claim 45, wherein said control means includes slow
start means for starting said switching and commutation means with an
initial duty cycle of approximately fifty percent.
47. A high voltage amplifier, comprising:
(a) the functional equivalent of two back-to-back buck converters having a
common output filter of an inductor in series with a capacitor, having one
DC power supply and having at least two switches for switching power to
said inductor and capacitor;
(b) a transformer across said capacitor; and
(c) controller means, operating in response to the current flowing out of
said transformer and the voltage across said capacitor, for selectively
operating said switches to maintain a selected current flow, said
controller means comprising an oscillator and a high frequency ramp
voltage generator to produce a pulse width modulated control signal to
operate said switches, said capacitor and inductor comprising an averaging
filter whose resonant frequency is between the frequency of said
controller and said oscillator frequency.
48. A high voltage amplifier, comprising:
(a) the functional equivalent of two back-to-back buck converters having a
common output filter of an inductor in series with a capacitor, having one
DC power supply and having at least two switches for supplying power to
said inductor and capacitor;
(b) a transformer across said capacitor; and
(c) controller means, operating in response to the current flowing out of
said transformer and the voltage across said capacitor, for selectively
operating said switches to maintain a selected current flow, said
controller means comprising: oscillator means, operated in response to a
signal approximating the RMS value of said current flowing out of said
transformer, for producing control voltage whose amplitude is a function
of said current flowing out of said transformer; and means, combining said
control voltage and a signal representative of said voltage across said
capacitor, for producing an error voltage to control the operation of said
switches.
49. The amplifier of claim 48, wherein said controller means includes:
means for producing a ramp voltage; means, combining said ramp voltage and
said error voltage, for producing a pulse width modulated signal to
selectively operate said switches.
50. The amplifier of claim 49, further including means, adding to said
error voltage a voltage whose value decreases from a preset value to a
predetermined lower value, for initially selectively operating said
switches with a duty cycle which initially gradually decreases from
approximately fifty percent and which changes thereafter according to the
voltage across said capacitor.
51. The amplifier of claim 48, further including means for slowly starting
said oscillator means.
52. A high voltage amplifier, comprising:
(a) the functional equivalent of two back-to-back buck converters having a
common output filter of an inductor in series with a capacitor, having one
DC power supply and having at least two switches for supplying power to
said inductor and capacitor;
(b) a transformer across said capacitor; and
(c) controller means, operating in response to the current flowing out of
said transformer and the voltage across said capacitor, for selectively
operating said switches to maintain a selected current flow, said
controller means comprising: means for providing one voltage signal which
is generally equal to one-half of the voltage across said DC power supply;
means, connected to one side of said capacitor for producing another
voltage signal, which is generally greater than one-half of the voltage
across said DC power supply; and means for combining said voltage signals
to bias the operation of said converter to produce on the other of said
capacitor an output voltage whose value is generally equal to one-half of
the voltage across said DC power supply.
53. A high voltage amplifier, comprising:
(a) the functional equivalent of two back-to-back buck converters having a
common output filter of an inductor in series with a capacitor, having one
DC power supply and having at least two switches for supplying power to
said inductor and capacitor;
(b) a transformer across said capacitor; and
(c) controller means, operating in response to the current flowing out of
said transformer and the voltage across said capacitor, for selectively
operating said switches to maintain a selected current flow, said switches
being operated in response to a drive transformer whose primary winding is
coupled to the output of said controller means by a coupling capacitor,
said controller means including means for charging said coupling capacitor
to a value approximately equal to one-half of the voltage across said DC
power supply before said switches are operated. |
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Claims |
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Description |
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TECHNICAL FIELD
This invention is related to the general subject of power supplies and, in
particular, to the subject of switch-mode power converters.
BACKGROUND OF THE INVENTION
Part of the xerography copying process requires a high voltage AC power
supply provided by a switch mode power converter. Typically, a high
voltage quasi-square waveform is generated using push-pull circuitry and
then filtered by an inductor-capacitor low pass filter network (i.e., 500
Hz); U.S. Pat. No. 4,714,978 is an example. The resultant waveform is a
distorted sinusoid. Usually, the output frequency of the AC converter is
limited to around 400 Hz, due to the inherent losses in the xerography
process. A pure sinewave is preferred for low noise content. As the duty
cycle of the quasi-square waveform is varied, the distorted sinusoid
varies in amplitude; unfortunately, the distortion content also varies.
The voltage amplitude is varied by control circuitry to keep a regulated
output current. A regulated current is preferred to insure uniform copy
quality. This is all the more desirable since current is affected by the
age of the components, temperature conditions, dirt, etc.
One modern converter which operates over a 50 percent duty cycle is
described in Diaz et al U.S. Pat. No. 4,717,994 (and assigned to the
assignee of the present invention). The control and operation of
conventional switched-mode power supplies is covered in the paper
"Conceptually New High-Frequency Switched-Mode Power Amplifier Technique
Eliminates Current Ripple", by Cuk and Erickson, Proceedings of POWERCON
FIVE, May 4-6, 1978. de Sartre U.S. Pat. Nos. 4,694,386 and Murakami et al
U.S. Pat. No. 4,195,335 describe power supplies which provide automatic
start-up. Hamilton et al U.S. Pat. No. 3,879,647 describes a converter
having a soft start capability. Finally, Sutton U.S. Pat. No. 4,586,119,
describes a switching mode power supply which employs current and voltage
feedback and sensing.
SUMMARY OF THE INVENTION
In accordance with the present invention, a unique four-quadrant high
voltage DC to AC buck converter is described which is not only suitable
for use in xerography but also useful as a Class D amplifier in motor
control and in audio amplifier applications. In one basic embodiment, the
converter comprises: switching and commutation means for switching current
to a common node from a DC power supply using two switches, two capacitors
in series with each other and across the power supply, a series capacitor
and inductor for joining the common node to the junction of the two
capacitors, an output transformer in parallel with the series capacitor,
and control means for operating the switching and commutation means to
produce a predetermined voltage across the series capacitor. Preferably,
the control means produces a pulse width modulated control signal,
regulates the output current, is generally responsive to RMS current flow,
has a wide ranging duty cycle, a slow start capability, and includes
overcurrent protection, under-voltage lockout protection, and overshoot
protection on start-up.
Accordingly, one object of the present invention is to provide a high
voltage AC power supply or converter which maintains a relatively constant
current output and a uniform sinusoidal waveform over prolonged periods
and under differing machine operating conditions.
Another object of the invention is to provide a converter which is lower in
cost and does not make use of components that require large operating
margins, breakdown potentials, or ratings.
Still another object of the present invention is to provide a converter
that does not require expensive circuits to convert instantaneous current
values to RMS equivalents.
Yet another object of the present invention is to provide a converter which
includes pulse width modulation control combined with overcurrent
protection, undervoltage lockout protection, and overshoot protection on
start-up.
Another object of the present invention is to provide a converter with a
wide ranging duty cycle and a slow start capability.
Finally, it is an object of the present invention to provide a unique
four-quadrant buck converter that is adapted to pulse width modulation
control.
Other features and advantages of the invention will become clear from the
following detailed description, the accompanying drawings, and the claims.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified block diagram of the power converter that is the
subject of the present invention;
FIG. 2 is a representation of a sinusoidal waveform of the output of the
converter of FIG. 1, and the pulse train used to produce it;
FIG. 3 is a representation of the frequency performance of the converter of
FIG. 1;
FIG. 4 is a simplified schematic diagram of the power stage of the
four-quadrant buck converter of FIG. 1;
FIG. 5 is a detailed schematic diagram of the converter of FIG. 1, and the
associated control circuitry;
FIG. 6 is a schematic diagram of the Current Regulator, Oscillator, and
Band Pass Filter;
FIG. 7 is a schematic diagram of the Gate Drive;
FIGS. 8, 8A, 8B, 9A and 9B depict the operation of the Gate Drive of FIG. 7
in response to changes in duty cycle;
FIG. 10 is a schematic diagram of the Overcurrent Protection section of the
converter; and
FIG. 11 is a schematic diagram illustrating the operation of the Under
Voltage Lockout section of the converter of FIG. 1.
DETAILED DESCRIPTION
While this invention is susceptible of embodiment in many different forms,
there is shown in the drawings, and will herein be described in detail,
one specific embodiment of the invention having several specific features.
It should be understood, however, that the present disclosure is to be
considered as an exemplification of the principles of the invention and is
not intended to limit the invention to the specific embodiment illustrated
and described.
Overview
FIG. 1 shows a block diagram of the DC to high voltage AC converter 20 that
is the subject of the present invention. The power stage 22 is a four
quadrant switching amplifier. The output of the power stage is stepped up
by the output transformer "T" to the desired magnitude. The converter 20
employs a PWM Controller 24 having three feedback loops. One loop, the
Current Loop, senses the output current and modulates the amplitude of a
low frequency Oscillator 26; accordingly, this loop maintains a constant
output current. A second loop, the Voltage Loop 28, senses the voltage
waveform at the primary of the output transformer "T". This loop maintains
the input voltage waveform a pure sinusoid at all times. The third loop
(inside block 22) makes it possible to have a two transistor (or any
comparable electronic switch) four-quadrant power stage running off a
single DC input power supply. The operation of this third loop will be
explained later.
The output of the low frequency Oscillator 26 is pulse width modulated
(See. FIG. 2.) at a much higher frequency by the PWM Controller 24. The
pulse width contains both frequency and amplitude information. The high
frequency pulses are then fed to the power stage 22 for power
amplification. Demodulation is done by an averaging L-C filter (See FIG.
1) with a resonant frequency between the PWM frequency and the sinewave
oscillator frequency. Averaging the high frequency pulses extracts the
encoded sinewave while attenuating the high frequency pulses (See. FIG.
3).
FIG. 4 shows a simplified circuit diagram of the Four-Quadrant Power Stage
22. Its performance is that of two back-to-back buck converters joined
together with the output filters combined, such that the output AC
waveform appears across the capacitor C. The internal drain to source
diode in each FET is used as the commutation diode. It requires positive
and negative input voltages to operate. This converter can therefore be
used as highly efficient AC power amplifier. Since converter stability is
important when designing switching power amplifiers, feedback is used to
compensate for any distortion due to power stage non-linearity and other
variations, such as load and input voltage changes.
Power Stage
Turning to FIG. 5, the Power Stage 22 comprises of a buck type
four-quadrant converter running off a single DC input source. This is made
possible by using a unique feedback loop. FIG. 5 shows the circuitry. Two
capacitors C1 and C2 divide the input voltage essentially in half. This
half voltage point Vl, is taken as a "ground"; solid-state switches Q1,
Q2, inductor L and capacitor C form a four-quadrant buck converter. The
output of converter Vo appears across capacitor C. Note that the output Vo
equals Vq times the duty cycle D or (Vq * D) minus Vl. Voltage point Vl is
not low enough in impedance to handle much power, and will easily move up
or down. This problem is solved by adding a feedback loop to keep Vl
constant at all times. Amplifier A2 compares Vl to 1/2 Vin; if different,
an error voltage is fed into the PWM control circuitry 24 which will bring
Vl to exactly 1/2 Vin. Capacitors C1 and C2 should be chosen large enough
such that, while the loop is responding, the capacitors will keep Vl from
moving much. Thus, Vl will have a ripple which depends on the loop
response time and the size of capacitors C1 and C2.
Transistors Q1 and Q2 are driven from a common gate drive transformer Td.
When switch Q1 is "on", switch Q2 is "off" and vice versa. Current in
switches Q1 and Q2 will flow from drain to source, as well as from source
to drain (i.e., internal diode). Thus, the internal source-drain diode
must provided for fast recovery. Most new FETs now have fast recovery
diodes. In addition, when one source-drain diode is conducing and the
opposite transistor turns "on", that source-drain diode will be turned
"off" forcefully. Here a failure known as "commutating failure", found in
motor drives, can occur. Some new FETs have a "source-drain diode
commutating safe operating area" specified (i.e., Motorola's MTP-3055D).
Other manufacturers (i.e., Fairchild) are expected to have similar devices
available with guaranteed safe commutating areas.
PWM Pulse Width Modulator
A pulse width modulator (PWM) is formed by amplifier A1 and comparator
Com1. A 400 Hz input signal Vi is fed via a capacitor C4 into the
non-inverting input of A1, with Vl used as a reference. Vi is compared to
the output voltage Vo which appears across C (R4 and R5 provide proper
scaling), and an error voltage appears at the output of A1. Comparator
Com1 compares Ve to a high frequency (i.e., 100 KHz) ramp and outputs a
pulse train whose pulse width is proportional to Ve, and thus Vi. The ramp
sets the operating frequency. Its amplitude is set from 0 volts to about 5
percent above Vr. (See top of FIG. 10). Transistor Q3 (2N4401) clamps Ve
to Vr; thus, the maximum pulse width is limited to approximately 95
percent. Q3 circuitry (i.e., R8 and R9) also limits minimum Ve to
approximately 5 percent of Vr, such that the minimum duty cycle is limited
to approximately 5 percent.
The high frequency pulses are amplified by switches Q1 and Q2, and
demodulated by filter L and C, as explained before. An amplified Vi signal
appears across C and the output transformer To steps it up.
The output transformer To cannot tolerate any DC voltage. For this reason
the reference voltage for the PWM controller (i.e., amplifier A1) is
chosen as Vl (via R6). In the absence of any input signal (i.e., Vi=0),
amplifier A1 generates an error voltage if there is any difference between
Vl and Vo. Since at DC, amplifier A1 has high gain, any DC voltage across
C will generate a large error signal Ve and any DC voltage across C will
be minimized.
Amplifier A2 adds a biasing factor to amplifier A1 reference (via resistor
R3), only if Vl drifts away from 1/2 Vin. For Vin=0, the end result is
that the voltage across C is zero and Vl equals 1/2 Vin; this corresponds
to a Duty Cycle of 50 percent at the drain (i.e., Vq) of Q2. Since Vo is
the average of Vq, we have that Vo=1/2 Vin which equals Vl; this is the
loop equilibrium point. C3 and R7 provide compensation for optimum
response. R2 and C2 slow the response of amplifier A2, such that amplifier
A1 responds faster, and the effect of amplifier A2 is seen as a biasing
effect only.
Oscillator--Variable Amplitude, Fixed Frequency
FIG. 6 shows the oscillator section and the Current Control Loop. The
Oscillator 26 (See FIG. 1) consists of a Squarewave Oscillator 28 feeding
into a 400 Hz Bandpass Filter 30. The Bandpass Filter 30 passes only the
fundamental frequency and the output is a 400 Hz sinewave. T | | |
