Synthesis of load-independent switch-mode power converters

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FIELD OF THE INVENTION

This invention relates to direct voltage converters and more particularly to buck or buck-derived dc-to-dc converters using both current and voltage feedback loop to control the output voltage when load changes by making the system independent of the load.

BACKGROUND OF THE INVENTION

Previous studies show the classical approach of using only negative feedback in controlling dynamic and steady-state performance of control systems. See, for example, N. K. Sinha, "Control Systems", Holt, Rinehart and Winston, 1986, pp. 59-70, G. H. Hostetter et al, "Design of Feedback Control Systems", Holt, Rinehart and Winston, 1982, pp. 3-5, B. C. Kuo, "Automatic Control Systems", Prentice-Hall, Inc., 4th Ed., 1982, pp. 3-16.

In the field of switch-mode power converters, this classical approach is maintained as seen from K. K. Sum, "Switch Mode Power Conversion", Marcel Dekker, Inc., 1984, pp. 2-4, G. Chryssis, "High-Frequency Switching Power Supplies", McGraw Hill, 1984, pp. 133-148, 173-194, P. R. K. Chetty, "Switch-Mode Power Supply Design", TPR 1986, pp. 48-60, 60-68, 69-81.

R. Redl and N. O. Sokal, "Near-Optimum Dynamic Regulation of DC-DC Converters Using Feed-Forward of Output Current and Input Voltage with Current-Mode Control", IEEE Transactions on Power Electronics, VOL.PE-1, No. 3, July 1986, pp. 181-192, proposed near-optimum dynamic regulation of a dc-to-dc converter by adding feed-forward of output current and input voltage to a current-mode converter. However, Redl and Sokal did not disclose any algorithm to obtain complete load invariance.

J. H. Murdock discloses a current-mode control arrangement with load dependent ramp signal added to sensed current waveform in the U.S. Pat. No. 4,672,518. The reader may also find of interest the U.S. Pat. Nos. 4,293,812 of H. Kubach et al, 4,578,631 of S. Smith, and 4,686,617 of R. M. Colton, and 4,456,872 of T. A. Froeschle, the German Pat. Nos. 2625036 and 2823437, the Japan Pat. Nos. 219966 and 10816, the U.S.S.R Pat. No. 949647, as well as the references: G. A. Rudy, "Constant-Voltage Switching Regulator", IBM Technical Disclosure Bulletin, Vol. 14, No. 9, pp. 2784,5, Feb. 1972, and R. C. Yeager, "Skipping Chopper Cycles in Switching Regulator", IBM Technical Disclosure Bulletin, Vol. 18, No. 11, pp. 3737,8, April 1976. None of these patents and references, however, discloses any possible use of positive current feedback and with that in connection an algorithm to obtain complete load invariance.

SUMMARY OF THE INVENTION

It is, therefore, an object of the present invention to provide a control method and associated circuit to achieve complete load independence in dc-to-dc converters.

Another object of the present invention is to provide a control feedback circuit which is simple.

Briefly, for use with a buck or buck-derived dc-to-dc converter, the preferred embodiment of the present invention includes a positive current feedback loop within a negative voltage feedback loop, the transfer function of feedback network in current loop being synthesized as derivative and proportional where these two functions are easily realized using a differentiator circuit with a dc path.

The transfer function of feedback network in current loop, as the algorithm of this novel method, for which the system becomes load-independent is given as

H(s)=(R.sub.w +sL.sub.o)/KR (1)

or

H(s)=(1+R.sub.w T/L.sub.m)+sTL.sub.o /L.sub.m ( 2)

depending on whether the feedforward or slope compensation of input voltage has been used, respectively.

In Equations (1) and (2) R.sub.w is wire resistance of the output filter inductor, L.sub.o is inductance of the output filter inductor, K is voltage gain of the PWM control and power stage, R is transresistance of the current sense device, T is switching period, L.sub.m is transformer magnetizing inductance.

The ability to provide a load-independent dc-to-dc converter, the performance of which is invariant to the character and changes of the load, is a material advantage of the present invention.

Another advantages of the present invention include its ability to be realized in an integrated-circuit (IC) form; the provision of such a method which provides zero output impedance of the system in both transient and steady state; the provision of such a method which simplifies design of negative voltage feedback loop for optimum system performance; and the provision of such a method which provides constant output-voltage-to-source-voltage transfer function.

These and other objects and advantages of the present invention will, no doubt, be obvious to those skilled in the art after having read the following detailed description of the preferred embodiments which are illustrated in the FIGURES of the drawing.

BRIEF DESCRIPTION OF THE DRAWING

FIG. 1 is a block and schematic diagram of a first embodiment of the invention;

FIGS. 2a, 2b, 2c, 2d are schematic diagrams of a dc-to-dc converter (2a), with associated timing diagram (2b), and of circuit realizations of a slope compensation of input voltage of the dc-to-dc converter (2c, 2d);

FIGS. 3a, 3b are timing diagrams illustrating compensation of input voltage by slope of either error voltage or current sense voltage, respectively;

FIGS. 4a and 4b are block diagrams illustrating a slope compensated system and a load invariant slope compensated system, respectively;

FIG. 5 is a block and schematic diagram of another embodiment of the invention; and

FIG. 6 is a schematic circuit diagram of the presently preferred embodiment in accordance with the present invention.

DETAILED DESCRIPTION

A buck type forward converter embodying the principles of the invention is shown in FIG. 1. In FIG. 1, it is assumed that the converter input voltage V.sub.in (not illustrated) applied to the power stage 195 is constant, or that its variation is compensated by a feedforward technique. This technique is well known in the art and will not be described here except to say that it is based on adjusting a slope of a rising edge of a sawtooth waveform (inherent in a pulse-width modulation (PWM) stage 195) in proportion to the input voltage V.sub.in. Then a gain constant K characterizes transfer function of the PWM control and power stage 195. Therefore, the signal applied to lead 123 is voltage-amplified K times to appear as voltage V.sub.1 (s) at lead 104 with an associated current/power supplied by the input voltage source V.sub.in.

The converter in FIG. 1 incorporates two feedback loops: the inner positive current feedback loop and the outer negative voltage feedback loop. The inner positive current feedback loop incorporates current feedback circuit 197 which is an active network whose transfer function is H(s). The outer negative voltage feedback loop may incorporate voltage sampling network 192 which is a passive (resistive) network whose transfer function is .beta.. The purpose of the positive current feedback loop is to make the system load invariant, which it does for the transfer function H(s) synthesized as given in Eq. (1) and shown in FIG. 1 as it will be explained shortly. The purpose of the negative voltage feedback loop is to stabilize the system and control its dynamics by means of the stabilizing network 190 whose transfer function is G.sub.R (s).

In operation, the output voltage V.sub.o (s) existing at node 106 is monitored by means of voltage sampling network 192 and compared in the summing circuit 191 with the reference voltage V.sub.R (s) applied to terminal 115. The resulting error voltage V.sub..epsilon. (s) at lead 120a is processed by the stabilizing network 190 and appearing as voltage V.sub..epsilon.1 (s) at lead 120.

The current through the complex load 199 whose impedance is Z(s) is measured by current sense device 198 whose transresistance is R. For R<<.vertline.Z.vertline. the load current value is I.sub.L (s)=V.sub.o (s)/Z(s). The voltage representative of the load current RI.sub.L (s) is applied by lead 118a to current feedback circuit 197 whose transfer function is H(s) so that the voltage RI.sub.L (s)H(s) is present at the circuit's output 118. The current sense signal obtained in this manner is then added in the positive feedback manner to the voltage loop processed error signal V.sub..epsilon.1 (s) in a summing circuit 196.

The resulting control voltage is applied by lead 123 to PWM control and power stage 195 which produces controlled but unfiltered voltage V.sub.1 (s) at lead 104. Voltage V.sub.1 (s) is filtered in the lowpass filter consisting of inductor 194 and capacitor 193 and is available as the output voltage V.sub.o (s) at node 106. Inductor 194 has inductance L.sub.o and wire resistance R.sub.w while capacitor 193 has capacitance C.sub.o and equivalent series resistance ESR.

Transfer function of the system of FIG. 1 is

V.sub.o (s)/V.sub.R (s)=G.sub.R (s)[V.sub.o (s)/V.sub..epsilon.1 (s)]/{1+.beta.G.sub.R (s)[V.sub.o (s)/V.sub..epsilon.1 (s)]}(3)

where

V.sub.o (s)/V.sub..epsilon.1 (s)=K/{[1+sC.sub.o (sL.sub.o +R.sub.w)/(1+sC.sub.o ESR)]+[(sL.sub.o +R.sub.w -KH(s)R)/Z(s)]}(4)

From Equations (3) and (4) it is seen that the system representing this first embodiment of the invention becomes load independent for positive current feedback circuit synthesized such to consist of proportional and derivative component given in Eq. (1) and illustrated in FIG. 1 and repeated here

H(s)=(R.sub.w +sL.sub.o)/KR.

Another embodiment of the invention uses slope compensation to compensate for possible variation of input voltage V.sub.in. Such compensated system is then made load invariant by the synthesis method to be explained. In this embodiment of the invention the slope compensation principle is described first followed by the description of the load invariance synthesis method.

In the schematic diagram of dc-to-dc converter of FIG. 2a a semiconductor switch S illustrated in the most general form as the three-terminal device 209 is driven so as to periodically enable current flow from the source of dc input voltage V.sub.in through the primary winding 211 of the transformer 213 and through the current sense device 210. The transformer 213 has magnetizing inductance L.sub.m. The value of the primary current is I.sub.1 ; the value of the current sense voltage is V.sub.sense =RI.sub.1 where R is the transresistance of the current sense device. The induced voltage in the secondary winding 212 forces secondary current to flow through a rectifier diode 214 and inductor 261 during the on-intervals of the switch t.sub.on shown in FIG. 2b. Load current I.sub.L through a load impedance 219 of value Z is supplied by the secondary current during the interval t.sub.on and through a freewheeling diode 215 during the rest of the switching period T shown in FIG. 2b. The inductor 261, characterized by the inductance L.sub.o and wire resistance R.sub.w, and the capacitor 217, characterized by the capacitance C.sub.o and equivalent series resistance ESR, pass dc voltage component V.sub.o to the output. The error amplifier 203 produces an error voltage V.sub..epsilon. at lead 204 (and also shown in FIG. 2b) on the basis of comparison of output voltage V.sub.o supplied by lead 201 and reference voltage V.sub.R supplied by lead 202. The error voltage signal V.sub..epsilon. is applied to an inverting input 204 of a comparator circuit 205. The current sense voltage V.sub.sense (which is also shown in FIG. 2b) is applied to a noninverting input 206 of comparator 205. The output of the comparator controls the latch circuit 207 by resetting it whenever the lead connected to the reset terminal R goes high. The latch circuit 207 is in turn set (Q goes high) by a clock pulse supplied to the set terminal S from the clock oscillator 208. The clock pulse train is shown in FIG. 2b. This action makes switch 209 conductive because the Q output of the latch circuit is set high by each incoming clock pulse, as illustrated in FIG. 2b, and the switch 209 is assumed to conduct for Q set high. The switch 209 becomes nonconductive when latch 207 is reset which occurs when current through the primary I.sub.1 is greater than some predetermined value so that the current sense voltage V.sub.sense is greater than the error voltage V.sub..epsilon..

From FIGS. 2a and 2b the comparator 205 switches at V.sub..epsilon. =RI.sub.1 where primary current I.sub.1 consists of (assuming transformer turns-ratio of one)

I.sub.1 =I.sub.o +(V.sub.in -V.sub.o -V.sub.d)t.sub.on /L.sub.o +V.sub.in t.sub.on /L.sub.m

where I.sub.o is output current at the beginning of each on-interval, (V.sub.in -V.sub.o -V.sub.d)t.sub.on /L.sub.o is current increment through output filter inductor 261, and V.sub.in t.sub.on /L.sub.m is current through magnetizing inductance L.sub.m of transformer 213.

Establishing the average value of current through the load as

I.sub.L =I.sub.o +(V.sub.in -V.sub.o -V.sub.d)t.sub.on /2L.sub.o

so that the primary current can be rewritten as

I.sub.1 =I.sub.L +[(V.sub.in -V.sub.o -V.sub.d)/2L.sub.o +V.sub.in /L.sub.m ]t.sub.on

the comparator 205 switches at

V.sub..epsilon. =R{I.sub.L +[(V.sub.in -V.sub.o -V.sub.d)/2L.sub.o +V.sub.in /L.sub.m ]t.sub.on } (5)

The average value of the input voltage being switched is V.sub.1 =V.sub.in t.sub.on /T.

This average voltage can be further expressed using Eq. (5) and finding from it the required term V.sub.in t.sub.on /T as follows. From Eq. (5)

V.sub..epsilon. -RI.sub.L =V.sub.in t.sub.on [(R/2L.sub.o)+(R/L.sub.m)-(R/2L.sub.o)(V.sub.o +V.sub.d)/V.sub.in ]

which yields

V.sub.in t.sub.on =(V.sub..epsilon. -RI.sub.L)/{[(1/2L.sub.o)(1-(V.sub.o +V.sub.d)/V.sub.in)+(1/L.sub.m)]R}.

The last expression divided by T yields the average value of the input voltage being switched V.sub.1 =V.sub.in t.sub.on /T as

V.sub.1 =[(V.sub..epsilon. -RI.sub.L)/T]/{[(1/2L.sub.o)(1-(V.sub.o +V.sub.d)/V.sub.in)+(1/L.sub.m)]R} (6)

The insensitivity to input voltage variation can be achieved by varying slope of either error voltage V.sub..epsilon. or current sense voltage RI.sub.1 as it will be shown next.

The input voltage compensation method by varying the slope of the error voltage V.sub..epsilon. is illustrated in FIG. 3a. Waveform 300 represents error voltage V.sub..epsilon. ; waveform 301 represents error voltage with modified slope (V.sub..epsilon. +kt); and waveform 302 represents current sense voltage RI.sub.1.

From FIG. 3a, and neglecting output rectifier voltage drop V.sub.d, the comparator switches at

V.sub..epsilon. +kt.sub.on =R{I.sub.L +[(V.sub.in -V.sub.o)/2L.sub.o +V.sub.in /L.sub.m ]t.sub.on } (7)

where k is the slope of the error voltage.

From Eq. (7) it is seen that by setting the error voltage slope to

k=R(V.sub.in -V.sub.o)/2L.sub.o (8)

the average value of the input voltage being switched becomes insensitive to the input voltage variation. From Equations (7) and (8) the average value of the input voltage being switched V.sub.1 =V.sub.in t.sub.on /T is obtained as

V.sub.1 =L.sub.m (V.sub..epsilon. -RI.sub.L)/RT (9)

The input voltage compensation method by varying the slope of the current sense voltage RI.sub.1 is illustrated in FIG. 3b. As in FIG. 3a, the waveform 300 in FIG. 3b represents the error voltage V.sub..epsilon. while the waveform 302 represents the current sense voltage RI.sub.1 . Waveform 303 represents current sense voltage with a modified slope (RI.sub.1 -k.sub.1 t).

From FIG. 3b, and neglecting the output rectifier voltage drop V.sub.d, the comparator switches at

V.sub..epsilon. =R{I.sub.L +[(V.sub.in -V.sub.o)/2L.sub.o +V.sub.in /L.sub.m ]t.sub.on }-k.sub.i t.sub.on (10)

where k.sub.1 is the slope of the current sense voltage.

From Eq. (10) it is seen that by setting the current sense voltage slope k.sub.1 to the same value as that of the error voltage slope k given in Eq. (8), the average value of the input voltage being switched becomes insensitive to the input voltage variation and is given as in Eq. (9).

Thus, the same result is achieved using either of the two methods for the input voltage compensation.

FIGS. 2c and 2d show a circuit realization of input voltage compensation by slope of error voltage and by slope of current sense voltage, respectively. In both FIGS. 2c and 2d the turns ratio of one is assumed for simplicity for both transformer 213 and coupled inductors 261 and 262, and output rectifier voltage drop is neglected. Since the basic functioning of the circuit has been explained previously in connection with FIGS. 2a and 2b, only the functioning of the portions of circuits of FIGS. 2c and 2d pertinent to the realization of the input voltage compensation will be explained next.

In FIGS. 2c and 2d the voltage induced across the inductor 262 is equal to the voltage across the filter inductor 261, which is V.sub.in -V.sub.o, during the conduction of the power switch 209. Diode 263 and resistors 264 and 266 provide the gate-to-source bias voltage for the JFET transistor 265. The transistor 265 is off during the on-interval (conduction) of the power switch 209 due to the magnitude and polarity of the voltage induced across the inductor 262 which maintains the gate-to-source voltage more negative than the pinch-off voltage of the n-channel JFET 265 thereby cutting off its drain current. During this interval the capacitor 267 of capacitance C.sub.1 is charged through resistor 266 of resistance R.sub.1 as the charging current is supplied by the voltage induced across the inductor 262. Due to the polarity of this voltage the charging current flows in such a direction as to produce a positive voltage on a plate of capacitor 267 connected to lead 268 in FIG. 2c. In FIG. 2d, the voltage on a plate of capacitor 267 connected to lead 268 goes negative as the capacitor is charged. In either case the slope of the voltage change present on lead 268 is given by

(V.sub.in -V.sub.o)/R.sub.1 C.sub.1

but in FIG. 2c this slope is positive (voltage rising on lead 268), while in FIG. 2d the slope is negative (voltage decreasing on lead 268).

The positive slope shown in FIG. 2c is denoted as

k=(V.sub.in -V.sub.o)/R.sub.1 C.sub.1.

The negative slope shown in FIG. 2d is denoted as

-k.sub.1 =(V.sub.in -V.sub.o)/R.sub.1 C.sub.1 =k (11)

As shown previously in connection with FIGS. 3a and 3b, the condition for the average value of the input voltage being switched to become insensitive to the input voltage variation is to set either the error voltage slope k or the current sense voltage slope k.sub.1 as per Eq. (8)

k=-k.sub.1 =R(V.sub.in -V.sub.o)/2L.sub.o (12)

By equating Equations (11) and (12), the design equation for the R.sub.1 C.sub.1 time constant in both FIGS. 2c and 2d is provided as

R/2L.sub.o =1/R.sub.1 C.sub.1 (13)

In FIG. 2c, the required error voltage increment kt (of required slope k obtained by designing the R.sub.1 C.sub.1 time constant according to Eq. (13)) is added via lead 268 to the error voltage V.sub..epsilon. available on lead 204. The addition is done in summer 270 whose output then contains the voltage sum V.sub..epsilon. +kt. This sum is applied to the inverting input of the comparator 205, whose noninverting input is at current sense voltage RI.sub.1 brought by lead 206 from the current sense device 210. The comparator 205 controls the power switch 209 through the latch 207 in a manner described earlier in connection with FIG. 2a. The duration of the conduction of the power switch t.sub.on is controlled in the manner illustrated in FIG. 3a and explained earlier.

In FIG. 2d, the required current sense voltage decrement -k.sub.1 t (of required slope -k.sub.1 obtained by designing the R.sub.1 C.sub.1 time constant according to Eq. (13)) is added via lead 268 to the current sense voltage RI.sub.1 available at lead 206. The addition is done in summer 270 whose output 269 then contains the voltage algebraic sum RI.sub.1 -k.sub.1 t. This sum is applied to the noninverting input of the comparator 205, whose inverting input is at error voltage V.sub..epsilon. brought by lead 204 from the error amplifier 203. The comparator 205 controls the power switch 209 through the latch 207 in a manner described earlier in connection with FIG. 2a. The duration of the conduction of the power switch t.sub.on is controlled in the manner illustrated in FIG. 3b and explained earlier.

To complete the description of FIGS. 2c and 2d, the capacitor 267 of value C.sub.1 discharges fast at the end of each conduction interval of power switch 209. The discharging current flows through the on-resistance of the JFET 265 which is then conductive and saturated.

In any of the two cases, i.e. realizing either error voltage or current sense voltage slope compensation of the input voltage variation, the converter operates with insensitivity to the input voltage variations.

The slope compensated system, in which either error voltage or current sense voltage slope compensation is used to compensate for possible variation of the input voltage as has been explained in connection with FIGS. 2c, 2d, 3a, and 3b, can be equivalently (mathematically) represented by a block diagram shown in FIG. 4a. This mathematical representation is based on Eq. (9) which is easily verifiable by inspecting FIG. 4a and referring to Eq. (9) which provides the average value of the input voltage being switched V.sub.1 on lead 404 in FIG. 4a.

Therefore, FIG. 4a gives an equivalent representation, in a form of a block diagram, of a slope compensated system in which the slope compensation of input voltage variation is implemented using methods illustrated in either FIG. 3a or FIG. 3b and realized as shown in either FIG. 2c or FIG. 2d, respectively, and derived in the associated Equations (5) through (13). Thus, by slope compensating dc-to-dc converter of FIG. 2a (which is realized as shown in FIGS. 2c and 2d) and referring its secondary components and variables into the primary of a unity turns-ratio transformer 213, the equivalent block diagram of such a system is obtained as shown in FIG. 4a.

In FIG. 4a, voltage V.sub.1 at the output 404 of the constant gain block 403, characterized by the transfer function L.sub.m /RT, is obtained as per Eq. (9) indicating that the slope compensation of the input voltage variation has been implemented in this system. The lowpass filtering provided by the inductor 405 having inductance L.sub.o and wire resistance R.sub.w, and by the capacitor 406 having capacitance C.sub.o and equivalent series resistance ESR, yields the output voltage V.sub.o at the output terminal 407. The output voltage V.sub.o produces a load current I.sub.L through the load impedance 408 of value Z such that the load current through the current sense device 409 of transresistance R is I.sub.L =V.sub.o /Z for R<<.vertline.Z.vertline.. It should be emphasized again that, because of the mathematical equivalency expressed in connection with FIG. 4a, the lead 402 of FIG. 4a denotes a mathematical and not physical path by means of which the current sense voltage signal RI.sub.L is applied to a summing circuit 401 where the signal RI.sub.L is subtracted from the error voltage V.sub..epsilon. supplied by the lead 400. More appropriately, as it will be consequently shown, the algorithm implied by Eq. (9) and illustrated in block diagram in FIG. 4a, can be restated to say that the voltage V.sub.1 will appear at the output of the block of constant gain L.sub.m /RT by providing a difference of voltages to the input of the block of gain L.sub.m /RT, the difference of the voltages being obtained by subtracting the voltage RI.sub.L from a voltage applied to the noninverting input of the summer which provides for the voltage difference.

Again, while the block diagram of FIG. 4a is a mathematical representation of the slope compensated system, the actual circuit realization of the slope compensation has been shown in FIGS. 2c and 2d.

The transfer function of the system shown in FIG. 4a is V.sub.o (s)/V.sub..epsilon. (s). Let us denote this transfer function by G.sub.1 (s) but, for the purposes which will be evident soon, generalize transfer function G.sub.1 (s) by allowing it to be equal to the ratio of the output voltage V.sub.o (s) to the voltage applied to the noninverting input of the summer which provides the voltage difference to the input of block of gain L.sub.m /RT.

With regards to FIG. 4a the system transfer function is ##EQU1## which clearly is a function of the load impedance Z(s).

Now, the load invariance of the slope compensated system can be achieved by closing a positive current feedback loop incorporating a current feedback circuit of exactly specified transfer function H(s) synthesized as given in Eq. (2) and shown in FIG. 4b, around the slope compensated system whose transfer function is denoted as G.sub.1 (s), as it will be explained next.

FIG. 4b shows a block diagram of the load invariant slope compensated system. Since the portion of the block diagram referred to by numeral 416 and denoted by the transfer function G.sub.1 (s) has been explained in connection with FIG. 4a, only the functioning of the remaining part of the block diagram of FIG. 4b, pertinent to the implementation of the load invariance, will be explained next.

The load invariance of the slope compensated system of FIG. 4b is achieved by closing a positive current feedback loop around the slope compensated system, denoted by the transfer function G.sub.1 (s). The positive current feedback loop is closed by sensing the load current I.sub.L (s) by means of a current sense device 409 of transresistance R and providing the current sense voltage RI.sub.L (s) via lead 402 to the current feedback circuit 412, whose transfer function is H(s), and closing the loop by means of lead 414 into the summer 410, as shown in FIG. 4b. The signal on lead 414 is equal to H(s)RI.sub.L (s) in Laplace domain. From FIG. 4b and using transfer function of the slope compensated system G.sub.1 (s) in its generalized (broad) sense as explained previously, we obtain ##EQU2## which becomes load independent for current feedback circuit transfer function as shown in Eq. (2) and FIG. 4b and repeated here

H(s)=(1+R.sub.w T/L.sub.m)+sTL.sub.o /L.sub.m.

However, an outer voltage negative feedback loop has to be closed around the system shown in FIG. 4b to keep it stable. This is shown in FIG. 5.

FIG. 5 is a block and schematic diagram of a dc-to-dc converter similar to that of FIG. 1 according to another embodiment of the invention. In FIG. 5, it is assumed that the converter input voltage V.sub.in (not illustrated) applied to the power stage 595 is compensated by the slope technique which has been described in connection with FIGS. 2c, 2d, 3a, 3b, and 4a, so that the gain constant L.sub.m /RT characterizes transfer function of the PWM control and power stage 595. Therefore, the signal applied to a lead 523 is voltage amplified (L.sub.m /RT) times to appear as voltage V.sub.1 (s) on lead 504, with an associated current/power supplied by the input voltage source V.sub.in.

The slope compensated system 501 is characterized by transfer function G.sub.1 (s) as has been explained in connection with FIG. 4a. It should be stressed again that this transfer function, G.sub.1 (s), is purely a mathematical equivalent of the slope compensated system and the actual circuit realization of the slope compensation has been explained in connection with FIGS. 2c and 2d.

The converter in FIG. 5 incorporates two feedback loops: the inner positive current feedback loop, incorporating a current feedback circuit 597, and the outer negative voltage feedback loop, incorporating voltage sampling network 592. (As it has been explained in connection with FIG. 4a, the slope compensated system represented by block 501 in FIG. 5 is drawn as a mathematical equivalent of a physical circuit realized as shown in FIGS. 2c or 2d, so that the path 518b carrying signal RI.sub.L (s) should be thought of as a mathematical and not a physically connecting lead). The inner positive current feedback loop's circuit 597 is an active network whose transfer function is H(s). The outer negative voltage feedback loop's network 592 is a passive (resistive) network whose transfer function is .beta.. The purpose of the positive current feedback loop is to make the system load invariant. The purpose of the negative voltage feedback loop is to stabilize the system and control its dynamics by means of a stabilizing network (which is an active network) 590 whose transfer function is G.sub.R (s).

In operation, the output voltage V.sub.o (s) existing at node 506 is monitored by means of the voltage sampling network 592 and compared in a summing circuit 591 with a reference voltage V.sub.R (s) applied to terminal 515. The resulting error voltage V.sub..epsilon. (s) on lead 520a is processed by the stabilizing network 590 to appear as voltage V.sub..epsilon.1 (s) on lead 520. The current through a complex load 599 whose impedance is Z(s) is measured by a current sense device 598 whose transresistance is R. For R<<.vertline.Z.vertline. the load current value is I.sub.L (s)=V.sub.o (s)/Z(s). The voltage representative of the load current RI.sub.L (s) is applied by lead 518a to the current feedback circuit 597 whose transfer function is H(s) so that the voltage RI.sub.L (s)H(s) is present at the circuit's output 518. The current sense signal obtained in this manner is then added in the summing circuit 596 to the voltage loop processed signal V.sub..epsilon.1 (s). The resulting control signal voltage is applied by lead 523a to the slope compensated system 501. The slope compensated system 501 has been previously shown to be mathematically equivalent to the block within the broken line boundaries in FIG. 5. It is characterized by a transfer function G.sub.R (s) as explained earlier. As has been derived in Eq. (9), the slope compensated system produces at the output of a PWM control and the power stage voltage of an average value V.sub.1 (s). This voltage V.sub.1 (s) has been determined as a constant (L.sub.m /RT) times the difference of the two signal (signal brought via lead 523ato the noninverting input of a summer 588 minus signal RI.sub.L (s) brought via (mathematical) path 518b to the summer 588). Once more, block 595, summer 588, and the associated leads merely model a slope compensated system in a mathematical way, as per Eq. (9). The modeling provides for the gain constant of a physical WWM control and power stage 595 value of L.sub.m /RT for the case of slope compensated dc-to-dc converter. Now, voltage V.sub.1 (s) on lead 504 enters the lowpass filter consisting of inductor 594 and capacitor 593. The inductor 594 has inductance L.sub. o and wire resistance R.sub.w while capacitor 593 has capacitance C.sub.o and equivalent series resistance ESR. The output voltage V.sub.o (s) is available at the filter output, i.e. at node 506.

Transfer function of the system of FIG. 5 is

V.sub.o (s)/V.sub.R (s)=G.sub.R (s)[V.sub.o (s)/V.sub..epsilon.1 (s)]/{1+.beta.G.sub.R (s)[V.sub.o (s)/V.sub..epsilon.1 (s)]}(15)

where ##EQU3##

From Equations (15) and (16) it is seen that the system representing this second embodiment of the invention becomes load independent for positive current feedback loop incorporating a current feedback circuit synthesized such to perform a proportional and a derivative action as given by Eq. (2) and illustrated in FIG. 5 and repeated here

H(s)=(1+R.sub.w T/L.sub.m)+sTL.sub.o /L.sub.m.

The schematic circuit diagram of the presently preferred embodiment in accordance with the present invention is given in FIG. 6. The embodiment shown in FIG. 6 is a practical circuit realization of a load invariant converter shown in FIGS. 1 and 5 in block diagram forms. This is to say that either of the systems shown in FIGS. 1 and 5 is realized in the circuit diagram form as shown in FIG. 6. The system illustrated in this circuit diagram of FIG. 6 is synthesized to be load independent if either feedforward compensation (assumed in FIG. 1) or the slope compensation (assumed in FIG. 5) of the input voltage variation has been done so that the load independence is then achieved by realizing (synthesizing) the appropriate transfer function H(s) for the positive current feedback circuit 650 according to Eq. (1) (for feedforward compensated system) or Eq. (2) (for slope compensated system). (The transfer function H(s) for the positive current feedback circuit 650 of FIG. 6 is found as a ratio of voltage present on lead 655 to the voltage present on lead 642, in Laplace domain). Neither feedforward nor slope compensation circuit realization is shown in FIG. 6 because these techniques have been discussed and shown earlier (especially the slope compensation technique, while the feedforward technique was only very briefly explained because it is a standard technique frequently used in practice). Thus, even though the circuit realization of the compensation techniques used to make the system independent to the input voltage variations is not shown in FIG. 6, it is assumed that the circuit of FIG. 6 is compensated against the input voltage variations using any of the described techniques. FIG. 6 then shows the implementation of the load invariance method developed in the course of this invention.

The converter illustrated in FIG. 6 is of forward type but the load invariance method developed in the course of this invention is not limited to any particular type of converter. In FIG. 6, the load current sensing device 609 whose transresistance is R is placed before the load 612, whose impedance is Z, in order to accommodate external loads to be connected between the converter output node 606 and the zero-volt (chassis) point 000. It is easily shown that, for the same condition as applied in the analysis of FIG. 1 and FIG. 5, i.e. for R<<.vertline.Z.vertline., the load invariance is preserved for the same transfer function of the positive current feedback circu