Videotelephone apparatus for transmitting high and low resolution video signals over telephone exchange lines

Claims

What is claimed is:

1. A videotelephone apparatus comprising:

image pickup means for generating first and second high frame rate video signals representative of moving objects and objects which are standing still, respectively;

conversion means for converting said first high frame rate video signal to a low frame rate low resolution signal and converting the second high frame rate video signal to a single frame high resolution signal, each frame of said low frame rate low resolution signal having n.times.m pixels and the frame of said high resolution signal having N.times.M pixels, where N and M are respectively greater than n and m;

transmit means for transmitting said low frame rate low resolution signal and said single frame high resolution signal via a transmission medium to a destination apparatus;

receive means including a memory for receiving a low frame rate low resolution signal and a single frame high resolution signal from said destination apparatus and for storing said single frame high resolution signal into said memory and repeatedly retrieving it from the memory;

display means;

manually operated command entry means for generating a plurality of mode select signals in response to manual command inputs; and

switching means responsive to said mode select signals for selectively coupling said low rate low resolution multiframe signal and said single frame high resolution signal to said transmit means and coupling signals from said receive means to said display means.

2. A videotelephone apparatus as claimed in claim 1, wherein said conversion means comprises means for converting said second high frame rate video signal to a multiframe high resolution signal and converting same to said single frame high resolution signal, and wherein said manually operated command entry means generates a framing command signal and transmit command signal, wherein said switching means is responsive to said framing command signal for coupling said multiframe high resolution to said display means and responsive to said transmit command signal for decoupling said multiframe high resolution signal from said display means and coupling said single frame high resolution signal to said display means.

3. A videotelephone apparatus as claimed in claim 2, wherein said switching means decouples said low rate low resolution multiframe signal from said transmit means in response to said transmit command signal and recouples said low rate low resolution multiframe signal to said transmit means at the end of transmission of said single frame high resolution signal.

4. A videotelephone apparatus as claimed in claim 3, wherein said display means include a memory for storing a frame of said low frame rate low resolution multiframe signal and continuously displaying the stored frame during the transmission of said single frame high resolution signal.

5. A videotelephone apparatus as claimed in claim 1, wherein said conversion means comprises means for converting said second high frame rate video signal to a multiframe high resolution signal and converting same to said single frame high resolution signal, and wherein said manually operated command entry means generates a framing command signal, further comprising still picture detecting means responsive to said framing command signal for detecting a still picture in said multiframe high resolution signal, wherein said switching means is responsive to said framing command signal for coupling said multiframe high resolution signal to said display means and responsive to the detection of said still picture by said still picture detecting means for decoupling said multiframe high resolution signal from said display means and coupling said single high resolution signal to said display means.

6. A videotelephone apparatus as claimed in claim 5, wherein said still picture detecting means comprises:

frame delay means for introducing a delay of a frame interval to said multiframe high resolution signal;

means for detecting a difference between an output signal from said frame delay means and said multiframe high resolution signal on a per pixel basis;

means for integrating a plurality of said differences generated in each frame interval to produce a sum;

means for comparing said sum with a predetermined value to produce a logic output at one of two discrete values depending on the relative value of said sum to said predetermined value;

means for storing the logic outputs generated in each frame interval into a series of cells to produce a frame-by-frame bit patterns; and

means responsive to said framing command signal for detecting a match between said frame-by-frame bit pattern and a prescribed bit pattern and supplying a signal to said switching means as an indication that a freeze frame is detected.

7. A videotelephone apparatus as claimed in claim 6, further comprising an arm hinged at one end thereof and movable between a rest position and an upright position, wherein said image pickup means is mounted at the other end of said arm to generate said first high frame rate video signal when said arm is in said rest position and generate said second high frame rate video signal when said arm is in said upright position, and a switch means located adjacent a pivot point of said arm to generate said framing command signal when said arm is brought to said upright position.

8. A videotelephone apparatus as claimed in claim 5, further comprising an arm hinged at one end thereof and movable between a rest position and an upright position, wherein said image pickup means is mounted at the other end of said arm to generate said first high frame rate video signal when said arm is in said rest position and generate said second high frame rate video signal when said arm is in said upright position, and a switch means located adjacent a pivot point of said arm to generate said framing command signal when said arm is brought to said upright position.

9. A videotelephone apparatus as claimed in claim 1, further comprising image enlarging means for multiplying each pixel of the low frame rate low resolution signal received by said receive means by a factor N.times.M/n.times.m to enlarge the (n.times.m) pixel plane of said received signal to an (N.times.M) pixel plane, wherein said display means provides a display of the enlarged low resolution signal on an (N.times.M) pixel plane.

10. A videotelephone apparatus as claimed in claim 9, wherein said display means comprises a fist display having an (n.times.m)-pixel plane and a second display having an (N.times.M)-pixel plane, and wherein said image enlarging means is connected to said second display and said switching means includes means for coupling the low resolution signal received by said receive means to said image enlarging means.

11. A videotelephone apparatus as claimed in claim 10, wherein said first and second displays are vertically spaced from each other, and wherein said image pickup means comprises a first video camera for generating said first video output signal and a second video cameras for generating said second video output signal, said first video cameras being located between said first and second displays, said second camera being mounted on a support movable with respect to said object which is standing still.

12. A videotelephone apparatus as claimed in claim 1, further comprising:

a screen touch sensor for generating a coordinate signal indicating a point specified on said display means in a coordinate system; and

marker generating means for generating a marker code in response to said coordinate signal and applying the marker code to said transmit means and to said display means.

13. A videotelephone apparatus as claimed in claim 12, wherein each of the frames of said low frame rate low resolution signal is preceded by a header containing a first identifier and said single frame high resolution signal comprises a plurality of successive subframes each being preceded by a header containing a second identifier and said marker code.

14. A videotelephone apparatus as claimed in claim 13, wherein said image pickup means includes means for generating a sync timing signal and supplying the sync timing signal to said conversation means to permit a generation of said low frame rate low resolution signal and said single frame high resolution signal, and wherein said switching means comprises means for coupling said sync timing signal to said display means and said transmit means and coupling a sync timing signal received by said receive means to said display means.

15. A videotelephone apparatus as claimed in claim 1, wherein said display means comprises a first display having an (n.times.m)-pixel plane and a second display pixel plane, said first display is located in a position higher than said second display.

16. A videotelephone apparatus as claimed in claim 1, further comprising an arm hinged at one end thereof and movable between a rest position and an upright position, wherein said image pickup means is mounted at the other end of said arm to generate said first video output signal when said arm is in said rest position and generate said second video signal when said arm is in said upright position.

17. A videotelephone apparatus as claimed in claim 16, wherein said apparatus is housed in a housing comprising a front portion having a low profile for mounting a numeric key pad and a rear portion having a higher profile, said display means being located in said rear portion.

18. A videotelephone apparatus comprising:

image pickup means for generating first and second high frame rate video signals representative of moving objects and objects which are standing still, respectively;

first conversion means for converting said first high frame rate video signal to a multiframe low resolution display signal and converting the second high frame rate video signal to a multiframe high resolution display signal, each frame of said low resolution display signal having n.times.m pixels and each frame of said high resolution display signal having N.times.M pixels, where N and M are respectively greater than n and m;

second conversion means for converting said low resolution display signal to a low frame rate low resolution signal having a lower frame rate than the frame rate of said first video signal and converting said high resolution display signal to a single frame high resolution signal;

transmit means for transmitting said low frame rate low resolution signal and said single frame high resolution signal via a transmission medium to a destination apparatus;

receive means including a memory for receiving low frame rate low resolution signal and a single frame high resolution signal from said destination apparatus and for storing the received high resolution signal into said memory and repeatedly retrieving it from said memory;

display means;

manually operated command entry means for generating a plurality of mode select signals in response to manual command inputs; and

switching means responsive to said mode select signals for selectively coupling said low and high resolution display signals from said first conversion means to said display means and to said second conversion means and coupling output signals of said receive means to said display means.

19. A videotelephone apparatus as claimed in claim 18, wherein said manually operated command entry means generates a framing command signal and a transmit command signal, wherein said switching means is responsive to said framing command signal for coupling said high resolution display signal to said display means and responsive to said transmit command signal for decoupling said high resolution display signal from said display means and coupling said single frame high resolution signal to said display means instead of said high resolution display signal.

20. A videotelephone apparatus as claimed in claim 18, wherein said manually operated command entry means generates a framing command signal, further comprising still picture detecting means responsive to said framing command signal for detecting a still picture in said high resolution display signal, wherein said switching means is responsive to said framing command signal for coupling said high resolution display signal to said display means and responsive to the detection of said still picture by said still picture detecting means for decoupling said high resolution display signal from said display means and coupling said single frame high resolution signal to said display means instead of said high resolution display signal.

21. A videotelephone apparatus as claimed in claim 20, wherein said still picture detecting means comprises:

frame delay means for introducing a delay of a frame interval to said high resolution display signal;

means for detecting a difference between an output signal from said frame delay means and said high resolution display signal on a per pixel basis;

means for integrating a plurality of said differences generated within a frame interval to produce a sum;

means for comparing said sum with a predetermined value to produce one of two logical values depending on the relative value of said sum to said predetermined value;

means for storing the logical values over a frame interval to produce a frame-by-frame bit pattern; and

means responsive to said framing command signal for detecting a match between said frame-by-frame bit pattern with a prescribed bit pattern and supplying a signal to said switching means as an indication that a still picture is detected.

22. A videotelephone apparatus as claimed in claim 20, further comprising an arm hinged at one end thereof and movable between a rest position and an upright position, wherein said image pickup means is mounted at the other end of said arm to generate said first high frame rate video signal when said arm is in said rest position and generate said second high frame rate video signal when said arm is in said upright position, and a switch means located adjacent a pivot point of said arm to generate said framing command signal when said arm is brought to said upright position.

23. A videotelephone apparatus as claimed in claim 20, further comprising an arm hinged at one end thereof and movable between a rest position and an upright position, wherein said image pickup means is mounted at the other end of said arm to generate said first high frame rate video signal when said arm is in said rest position and generate said second high frame rate video signal when said arm is in said upright position, and a switch means located adjacent a pivot point of said arm to generate said framing command signal when said arm is brought to said upright position.

24. A videotelephone apparatus as claimed in claim 18, further comprising means for multiplying each pixel of a low frame rate low resolution signal received by said receive means by a factor N.times.M/n.times.m to enlarge the (n.times.m) pixel plane of said received signal to an (N.times.M) pixel plane, wherein said display means provides a display of the enlarged low signal on an (N.times.M) pixel plane.

25. A videotelephone apparatus as claimed in claim 24, wherein said display means comprises a first display having an (n.times.m)-pixel plane and a second display having an (N.times.M)-pixel plane, and wherein said image enlarging means is connected to said second display and said switching means includes means for coupling the low frame rate low resolution signal received by said receive means to said image enlarging means.

26. A videotelephone apparatus as claimed in claim 25, wherein said first and second displays are vertically spaced from each other, and wherein said image pickup means comprises a first video camera for generating said first video output signal and a second video camera for generating said second video output signal, said first video camera being located between first and second displays, said second camera being mounted on a support movable with respect to said object which is standing still.

27. A videotelephone apparatus as claimed in claim 18, further comprising:

a screen touch sensor for generating a coordinate signal indicating a point specified on said display means in a coordinate system; and

market generating means for generating a marker code in response to said coordinate signal and applying the marker code to said transmit means and to said display means.

28. A videotelephone apparatus as claimed in claim 27, wherein each of the frames of said low frame rate low resolution signal is preceded by a header containing a first identifier and said single frame high resolution signal comprises a plurality of successive subframes each being preceded by a header containing a second identifier and said marker code.

29. A videotelephone apparatus as claimed in claim 18, wherein said second conversion means comprises:

a frame memory having an (N.times.M)-pixel plane;

write address generator means for generating first and second write address codes for writing one of a plurality of successive frames of said low resolution display signal into an (n.times.m)-pixel plane portion of said frame memory and writing a single frame of said high resolution display signal into the full (N.times.M)-pixel plane of said memory; and

read address generator means for generating read address codes for reading the stored frame from said (n.times.m)-pixel portion of said memory at a rate lower than a rate at which stored frame is written into said memory to produce said low frame rate low resolution signal, and reading said single frame of said second display signal from said memory at a rate lower than a rate at which the stored single frame is written into said memory to produce said single frame high resolution signal.

30. A videotelephone apparatus as claimed in claim 18, further comprising an arm hinged at one end thereof and movable between a rest position and an upright position, wherein said image pickup means is mounted at the other end of said arm to generate said first high frame rate video signal when said arm is in said rest position and generate said second high frame rate video signal when said arm is in said upright position.

31. A videotelephone apparatus as claimed n claim 30, wherein said apparatus is housed in a housing comprising a front portion having a low profile for mounting a numeric key pad and a rear portion having a higher profile, said display means being located in said rear portion.

32. A videotelephone apparatus as claimed in claim 18, wherein said image pickup means includes means for generating a sync timing signal and supplying the sync timing signal to said first conversion means to permit generation of said multiframe low and high resolution signals, and wherein said switching means comprises means for coupling said sync timing signal to said display means, said second conversion means and said transmit means and for coupling a sync timing signal received by said receive means to said display means.

33. A videotelephone apparatus comprising:

image pickup means for generating first and second video output signals representative of moving objects and objects which are standing still, respectively;

data compression means for converting said first video output signal of said image pickup means to a low resolution multiframe signal according to a data compression algorithm and converting the second video output signal of said image pickup means to a high resolution single frame signal according to said data compression algorithm;

transmit means for transmitting said low resolution multiframe signal and said high resolution single frame signal via a transmission medium to a destination apparatus;

receive means including a memory for receiving a low resolution multiframe signal and a single frame high resolution signal from said destination apparatus, and for storing said single frame high resolution signal into said memory and repeatedly retrieving it from the memory;

data decompression means for respectively converting the received low resolution multiframe signal and the received high resolution single frame signal to signals identical in format to said first and second video output signals generated by said image pickup means according to a data expansion algorithm inverse to said data compression algorithm;

display means;

manually operated command entry means for generating a plurality of mode select signals in response to manual command inputs; and

switching means responsive to said mode select signals for selectively coupling said first and second video output signals from said image pickup means, coupling said low and high resolution multiframe signals from said data compression means to said display means and said transmit means, and coupling said signals converted by said data expansion means to said display means.

34. A videotelephone apparatus as claimed in claim 33, wherein said data compression means comprises first and second coding circuits having a hierarchical coding algorithm for respectively converting said first and second video output signals to said low resolution multiframe signal and said high resolution single frame signal.

35. A videotelephone apparatus as claimed in claim 33, where said data compression means includes:

a plurality of spatial frequency filters of different resolutions and passing said first and second video output signals of said image pickup means through said spatial frequency filters to develop differential video signals of different levels of resolution; and

means for successively supplying said differential video signals to said transmit means with the lowest level of resolution first and an intermediate level of resolution last for generating said low resolution multiframe signal and successively supplying said differential video signals with the lowest level of resolution first and the highest level of resolution last for generating said high resolution single frame signal.

36. A videotelephone apparatus as claimed in claim 33, wherein said data compression means comprises:

a frame memory comprising a plurality of blocks;

a write address generator for writing said first and second video output signals into said frame memory at a frame rate lower than the frame rate of said video output signals; and

a microprocessor connected to the output of said frame memory, said microprocessor being programmed to perform the steps of:

(a) performing discrete cosine transform on data stored in said frame memory on a block by block basis;

(b) performing scaler quantization on the data of step (a);

(c) performing modified Huffman coding on the data of step (b) stored in a smaller portion of each of said blocks in response to a first control signal from said switching means and repeating the steps (a) to (c) to generate said low frame rate low resolution signal; and

(d) performing said modified Huffman coding on the data of step (b) stored in a greater portion of each of said blocks in response to a second control signal from said switching means to product said single frame high resolution signal.

37. A videotelephone apparatus as claimed in claim 33, wherein each of said first and second video output signals is a triplet of primary color signals, and wherein said data compression means comprises:

first, second and third frame memories each comprising a plurality of blocks;

a write address generator for writing the primary color components of either of said first and second video output signals into said first, second and third frame memories respectively, at a frame rate lower than the frame rate of said video output signals; and

a microprocessor connected to the output of said frame memory, said microprocessor being programmed to perform the steps of:

(a) converting said primary color components stored in said frame memories into a luminance and color difference components;

(b) subsampling said color difference components;

(c) performing a discrete cosine transform on data of steps (a) and (b) on a block by block basis;

(d) performing scaler quantization on the data of step (c);

(e) performing modified Huffman coding on the data of step (d) stored in a smaller portion of each of said blocks in response to a first control signal from said switching means (703) and repeating the steps (c) to (e) to generate said low frame rate low resolution signal; and

(f) performing said modified Huffman coding on the data of step (d) stored in a greater portion of each of said blocks in response to a second control signal from said switching means to produce said single frame high resolution signal.

38. A videotelephone apparatus as claimed in claim 33, further comprising:

a screen touch sensor for generating a coordinate signal indicating a point specified on said display means in a coordinate system; and

market generating means for generating a marker code in response to said coordinate signal and applying the marker code to said transmit means and to said display means.

39. A videotelephone apparatus as claimed in claim 38, wherein each of the frame of said low frame rate low resolution signal is preceded by a header containing a first identifier and said single frame high resolution signal comprises a plurality of successive subframes each being preceded by a header containing a second identifier and said marker code.

40. A videotelephone apparatus as claimed in claim 33, further comprising an arm hinged at one end thereof and movable between a rest position and an upright position, wherein said image pickup means is mounted at the other end of said arm to generate said first video output signal when said arm is in said rest position and generate said second video signal when said arm is in said upright position.

41. A videotelephone apparatus as claimed in claim 40, wherein said apparatus is housed in a housing comprising a front portion having a low profile for mounting a numeric key pad and a rear portion having a higher profile, said display means being located in said rear portion.

BACKGROUND OF THE INVENTION

This invention relates generally to audiovisual communication systems and, in particular, to a videotelephone apparatus for transmitting low frame rate video signals over telephone exchange lines.

Bell System's "Picturephone" is a typical example of audiovisual communication system. Because of the wide bandwidth, the prior art system is intended for use with a wideband, dedicated transmission line. It has therefore been desired to implement an audiovisual communication system having a bandwidth within the range of frequencies of telephone exchange lines. It has been further desired to implement a system which simultaneously performs face-to-face communications and document transmission.

SUMMARY OF THE INVENTION

It is therefore an object of the present invention to provide a videotelephone apparatus which transmits video signals within the range of frequencies of telephone exchange lines and allows face-to-face communications and document transmission simultaneously on a single or separate displays.

Another object of the present invention is to provide a videotelephone apparatus which can be used advantageously with ISDN (Integrated Services Digital Network) exchange lines.

In accordance with the present invention, a first high frame rate video signal is derived from an image containing moving objects and a second high frame rate video signal is derived from an image containing standstill objects. The first high frame rate video signal is converted to a low frame rate low resolution multiframe signal and the second high frame rate video signal is converted to a single frame high resolution signal. In a typical example, the low frame rate low resolution signal is transmitted at a rate of five frames per second and the single frame high resolution signal is transmitted during the interval of 1 to 4 seconds. Each frame of the low resolution signal has nxm pixels, typically 80.times.60 pixels and the frame of the high resolution signal has N.times.M pixels, or 320.times.240 pixels. Because of the low frame rates, both low and high resolution signals are within the range of frequencies of a telephone exchange line. A switching matrix is provided to sequentially couple the low frame rate low resolution signal and the single frame high resolution signal to a transmission line in response to a mode select signal and couple the exchange line to a display unit. At the receiving end of the exchange line, the single frame high resolution signal is stored into a memory and repeatedly read out of the memory into a display.

Alternatively, the second high frame rate video signal that conveys the image of a document is first converted to a multiframe high resolution signal and the latter is then converted to the single frame high resolution signal. Manually operated command keys are provided to generate a framing command signal and a document transmit command signal during face-to-face communications. In response to the framing command signal, the switching matrix couples the multiframe high resolution signal to the display to allow the user to adjust the position of a document so that it comes into the field of view. In response to the transmit command signal, the low resolution signal is disconnected from the transmission line to allow transmission of the single frame high resolution signal to the distant end while switching the display input from the multiframe high resolution signal to the transmitted single frame high resolution signal to allow the source viewer to monitor the freeze frame image of the document actually transmitted. At the end of transmission of the single frame high resolution signal, the low resolution signal is reconnected to the transmission. The display unit preferably includes a frame memory to retain the frame of a received low resolution signal which has been received just prior to the reception of a single frame high resolution signal to keep the last frame on display when it is interrupted during the transmission of the single frame high resolution signal.

A still picture detector is preferably provided which responds to the framing command signal for detecting a still motion in the high resolution multiframe signal. The switching matrix responds to the detection of a still motion and couples the single frame high resolution signal to the exchange line for transmission to the other party and to the display for confirmation.

For displaying low and high resolution images, two flat panel displays respectively having nxm and N.times.M pixels are mounted on a rear, higher profile portion of a housing, with the nxm pixel display being located in a position higher than the N.times.M pixel display. Alternatively, an N.times.M pixel flat panel display may be provided instead of two displays to provide both low and high resolution images in an individual or superimposed mode. An image enlarging circuit is advantageously provided for multiplying each pixel of a received low frame rate low resolution signal by a factor N.times.M/nxm to display the received signal on the (N.times.M) pixel display.

To facilitate audiovisual communications over a transmitted document, a screen touch sensor is provided for supplying a coordinate signal indicating a point specified on the N.times.M pixel display unit in a coordinate system to a marker generator which transmits a marker code in response to the coordinate signal to the transmission line.

In a preferred embodiment, a pivoted arm is provided on the housing, the arm being movable between a rest position in the housing and an upright position. A video camera is mounted at the free end of the arm to pick up the user's own face when the arm is in the rest position and pick up a document when the arm is in the upright position. A switch is located adjacent the pivot point of the arm to generate a framing command signal when the arm is brought to the upright position to cause the switching matrix to automatically switch the input of the display to the high resolution multiframe signal for "framing" the document.

In accordance with a second aspect of the present invention, the first and second high frame rate video signals, which are representative of moving and standstill objects respectively, are converted by a data compression circuit to a low resolution multiframe signal according to a data compression algorithm and the second high rate video signal is converted to a high resolution single frame signal according to the data compression algorithm. A data expansion circuit is provided for converting a received low resolution multiframe signal and a received high resolution single frame signal to signals according to a data expansion algorithm inverse to the data compression algorithm. The data compression circuit comprises first and second coding circuits having a hierarchical coding algorithm. The data compression circuit includes a plurality of spatial frequency filters of different resolutions through which the first and second high frame rate video signals are passed to develop differential video signals of different levels of resolution. The differential video signals are successively transmitted with the lowest level of resolution first and an intermediate level of resolution last when transmitting a low resolution multiframe signal and all the differential video signals are successively transmitted with the lowest level of resolution first and the highest level of resolution last when transmitting a single frame high resolution signal.

The data compression circuit comprises a frame memory, a write address generator for writing the first and second video output signals into the frame memory at a frame rate lower than the frame rate of the video output signals. To the output of the memory is connected a microprocessor which performs discrete cosine transform (DCT) on data stored in the frame memory on a block by block basis, performs scaler quantization and performs modified Huffman coding on data stored in a smaller portion of each of the blocks in response to a first control signal from the switching circuit and repeating the previous steps to generate the low frame rate low resolution signal. The modified Huffman coding is performed on data stored in a greater portion of each of the blocks in response to a second control signal from the switching circuit to produce the single frame high resolution signal.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be described in further detail with reference to the accompanying drawings, in which:

FIG. 1 is a schematic illustration of perspective view of a videotelephone set according to a first embodiment of the invention;

FIG. 2 is a block diagram of the videotelephone set of FIG. 1;

FIG. 3 is a block diagram of the display unit of FIG. 1;

FIG. 4 is a block diagram of the video transmitter and receiver of FIG. 1;

FIG. 5 is a block diagram of the scan converter of FIG. 1;

FIG. 6 is a block diagram of the scan converter of FIG. 1;

FIG. 7 is a block diagram of the freeze frame and rate conversion circuit and the sync generator of the receiver of FIG. 1;

FIGS. 8A, 8B and 8C are views associated with the freeze frame and rate conversion circuit;

FIG. 9 is a block diagram of the image enlargement circuit of FIG. 1;

FIGS. 10A to 10E are schematic diagrams useful for describing the mode of operation of the first embodiment of the invention;

FIG. 11 is a block diagram of a modified embodiment of the invention;

FIG. 12 is a block diagram of the still picture detector of FIG. 11;

FIG. 13 is a block diagram of a pointing arrangement;

FIGS. 14 and 15 are perspective views of a videotelephone set according to a second embodiment of the invention;

FIG. 16 is a block diagram of the second embodiment;

FIG. 17 is a block diagram of the dual scan conversion circuit of FIG. 16;

FIG. 18 is a block diagram of the display unit of FIG. 16;

FIGS. 19A to 19D are schematic diagrams useful for describing the operation of the second embodiment;

FIG. 20 is a block diagram of a third embodiment of the invention;

FIG. 21 is a block diagram of a fourth embodiment of the invention;

FIG. 22 is a block diagram of the coding circuit of FIG. 21;

FIG. 23 is a block diagram of another form of the coding circuit of FIG. 21;

FIG. 24 is a flowchart describing the operation of the microprocessor of FIG. 23;

FIG. 25 is an illustration of a block of 8.times.8 cells showing a sequence in which pixels are retrieved from the cells;

FIG. 26 is a block diagram of the decoding circuit of FIG. 21; and

FIG. 27 is a flowchart of the microprocessor of FIG. 26.

DETAILED DESCRIPTION

Referring now to FIG. 1, there is shown a videotelephone set according to a first embodiment of the present invention. The videotelephone set comprises a housing 70 having a front lower portion 71 and rear upper portion 72. On the surface of front lower portion 71 are manually operated mode select keys including "Disable" key 73 which is used when one does not want to be seen, "Document" key 74 for sending a document, "Self View" key 75 to monitor the one's own view, "Face" key 77 for face-to-face communications, and "Enlarge" key 78. A (320.times.240)-pixel flat panel display 41 is mounted on the rear upper portion 72 and an (80.times.60)-pixel flat panel display 31 is located above the display 41. Between displays 31 and 41 is a camera 11 for viewing a viewer's face. A second video camera 21 is mounted on an arm 81 which is manually pulled out of the housing 70 when in use. Adjacent to the camera 21 is another manually operated key 76 designated "Framing". The "Framing" key 76 is operated when the arm 81 is pulled out to allow the position of the camera 21 to be adjusted with respect to the document to put it into the field of view. A telephone handset 83 is located on one side of the video display portion of the housing to provide audio communications.

In FIG. 2, the videotelephone set comprises an image pickup unit 1, a display unit 2, a video transmitter 3, a video receiver 4, matrix switches 6A, 6B and a switching control logic 7 which is associated with the mode select keys 74 to 77. Image pickup unit 1 includes the first and second video cameras 11 and 21. Each of the video cameras produces an analog television signal of a standard television format.

A scan converter 12 is connected to the output of video camera 11 to convert the high frame rate video signal into a high frame rate low resolution multiframe signal. Typically, the low resolution multiframe signal has a resolution of 80.times.60 pixels from which a low frame rate low resolution multiframe signal will be derived for transmission in a manner to be described. A scan converter 22 is connected to the output of video camera 21 to derive a high frame rate high resolution signal having 320.times.240 pixels from which a high resolution freeze frame signal will be derived for transmission. All the circuit components of image pickup unit 1 operate on timing signals including horizontal and vertical sync and blanking pulses supplied from a sync generator 13.

The outputs of scan converter 12 and scan converter 22 are applied to switch 6A and the output of sync generator 13 is applied to switch 6B. Each of the switches 6A and 6B is of a conventional matrix type having crosspoints at the intersections of appropriate rows and columns, which are marked with symbols "x" where switching takes place between desired row and column lines. The outputs of scan converter 22 and 12 are connected to the first and second rows 61, 62 of switch 6A each having three crosspoints which allow access to an input line 3a of transmitter 3 and to input lines 2a and 2b of display unit 2. An output line 4b of receiver 4 and an output line 3b of transmitter 3 are connected to the third and fourth rows 63, 64 of switch 6A, respectively, the crosspoints on the third row 63 allowing the receiver output line 4b to access input lines 2a, 2b and 2c of display unit 2. The fourth row 64 has only one crosspoint which establishes a connection between the transmitter output line 3b and the input line 2b of display unit 2.

The output of sync generator 13 is supplied to the first row 65 of switch 6B having crosspoints that allow access to input lines 2d and 2e of display unit 2 and an input line 3d of transmitter 3.

Receiver 4 and transmitter 3 have output lines 4a and line 3c respectively coupled to the third and fourth rows 66 and 67 of switch 6B. Crosspoints on row 66 allow access to display unit 2 via input lines 2d and 2e and a crosspoint on row 67 allows a connection to be established to display input line 2d.

Details of the scan converter 12 are shown in FIG. 5. Converter 12 includes a clock generator 123 which receives sync and control signals from the sync generator 13 to generate a 6.048-MHz clock pulse which is 384 times higher than the 15.75-kHz line frequency of the standard television signal. An analog-to-digital converter 111 is connected to the output of camera 11 and is supplied with the 6.048-MHz clock pulse from clock generator 123 to sample the analog television signal at 6.048MHz to produce 320 digital video samples, or pixels during the effective line scan period, namely, 53-microsecond duration. Each pixel is converted into a 4-bit digital video signal by A/D converter 111 so that it can represent white to black with 16 levels of grey scale, the 4-bit video signal being fed on parallel lines to the input terminals of a 5-bit adder, or averaging circuit 113, of the first of a series of resolution conversion stages, one through a direct path and the other through a one-pixel delay 112. One-pixel delay 112 comprises a set of four shift registers, for example, which are clocked with pulses from clock generator 123 to shift the 4-bit digital output from A/D converter 111 at each clock cycle and read out 4-bit digital outputs at every two clock cycles, so that the signal applied through delay 112 to adder 113 is delayed one pixel with respect to the signal directly applied to adder 119. The successively delayed 4-bit data are summed by adder 113 to produce a 5-bit output and the higher 4-bits of the output are delivered at every two clock cycles, discarding the least significant bit of the sum. In this way, the sum is divided by two and the 4-bit output of adder 113 represents an average value of two video samples each being delayed one pixel from the other, and two successive pixel outputs from the A/D converter 111 are converted to one pixel by the adder 113 at two-pixel intervals.

The output of adder 113 is connected to the input terminals of a 5-bit adder 115, identical to adder 113, of the next stage, one through a direct path and the other through a one-pixel delay 114. Delay 114 is clocked at one half the clock rate of the first delay conversion stage by the clock generator 123. In a manner similar to the first stage, two successive pixels from adder 113 and hence four successive pixels from A/D converter 111 are converted to one pixel by adder 115 which is an average of the original successive four pixels. By the first and second coarsening stages, the resolution of the original image is reduced by a factor 4/1 in the direction of horizontal scan.

The 4-bit outputs of adder 115 are applied to a scan converter 116 which is connected to receive control signals from the sync generator 13 and clock pulses from the clock generator 123 to generate an address signal for each pixel input from the second stage. Scan converter 116 includes a video memory with a capacity of 76,800 bits (=80.times.240.times.4) and a memory control circuit for writing the output of adder 115 of an odd field composed of 240 horizontal lines