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Description  |
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BACKGROUND OF THE INVENTION
The invention pertains to the field of image compression for compact,
electronic storage, and, more particularly, to the field of mapping an
input document into zones of text and zones of graphics and compressing
each zone at a different resolution in terms of bits or pixels per linear
inch.
With the growing volume of documents stored in the files of businesses all
over the world, and the rising cost of storing such paper documents, there
has arisen a need for storing such documents more compactly. Optical disk
technology has provided a medium which can store vast quantities of data
for archival purposes. However, even with optical disk technology for
storage of data, there still exists a need for efficiency in the
digitizing of input documents to avoid excess storage of data where
extreme resolution is not necessary to accurately reproduce the appearance
of the document in a particular zone.
It has been found that most documents have large quantities of blank space
at locations between lines of text, between words, in the margins, and in
the areas of the document devoted to text data as opposed to graphic data.
It has also been found that areas of text in a page may be accurately
reproduced with a storage resolution of 100 dots or pixels per linear
inch, while graphic data may be accurately reproduced at a storage density
of 200 dots per linear inch.
Thus, there has arisen a need for a system which can map an input document
into zones of text and zones of graphic data, and which can compress a bit
mapped electronic representation of the document such that zones of text
are stored at 100 pixels per linear inch while graphic zones are stored at
200 pixels per linear inch.
SUMMARY OF THE INVENTION
In accordance with the teachings of the invention, an apparatus and method
of operating same is provided which fills the above-identified need. The
apparatus of the invention includes a frame buffer for storing a
bit-mapped, raster-scanned representation of the input document. The frame
buffer stores an image of a document which has been scanned and digitized
by conventional means. The frame buffer pixel data is accessed by a
microprocessor and its associated discrimination logic for purpose of
mapping text and graphic zones in the document. Text zones are determined
in a probablistic manner by mapping the document both vertically and
horizontally to generate a profile of the document. The vertical profile
indicates which raster scan lines are probably character lines by looking
for black pixels and which scan lines are probably blank lines by looking
for an absence of black pixels. The horizontal profile of the document
indicates for those scan lines which are probably text lines which column
are "while" and which are "black". User definable thresholds are used to
make these determinations. The document is then mapped into zones of text
and zones of graphics by determinations from the horizontal and vertical
profiles the smallest inter text line space and the smallest inter
character space. The probable text line zones are then further examined to
make a determination of how many of the other blank spaces horizontally
are integer multiples of the smallest intercharacter space and how many of
the inter text blank line spaces are integer multiples of the smallest
inter text line space. If the number of violations of the integer multiple
rule exceeds a user definable threshold, then the zone is labeled a
graphics zone. If the violations of the integer multiple rule do not
exceed the threshold, the zone is labelled text. In some embodiments, the
mapping may be done by determining the number of violations in only the
vertical direction or only in the horizontal direction. The probability of
being right increases however if more passes through the horizontal and
vertical profiles are made to determine regularity or conformity with the
integer multiple rule.
The vertical profile is an array or date base containing the scan line
number of all scan lines thought to be character or text lines. Every scan
line number is in the data base with a tag appended thereto which
indicates whether it is thought to be part of a text line or a blank line.
The vertical profile is built as follows. In the preferred embodiment, the
discrimination logic examines the document in two passes. The first pass
is devoted to building the vertical profile. In the first pass, the
discrimination logic finds the first scan line which is thought to be the
top of a text line (typically a text line may encompass 15 to 35 raster
scan lines) by scanning a 16-pixel wide swath of pixels down the middle of
the document. Each group of 16 pixels in the middle of each scan line is
input to a logic block which determines the number of pixels in the 16 bit
word which are black. The output of this logic block is a binary number
indicating the number of black pixels in the word. This binary word is
compared in a comparator to a user definable threshold value to determine
if the number of black pixels exceeds the threshold. If it does, the scan
line number of the line is recorded in a register for later reading by the
microprocessor. If it does not, then the next 16 bit word from the middle
of the next scan line is accessed from the frame buffer and the number of
black pixels is compared to the threshold. This process is continued until
the first scan line with a number of black pixels which exceeds the
threshold is found. When it is found, the scan line number is stored in
the first black line storage register, and the discrimination logic
switches to a mode of looking for blank lines.
The mode of looking for the first blank line is substantially similar to
looking for the first black line. The scan line counter is incremented,
and the next 16 bit word from the middle of the next scan line is brought
into the discrimination logic. The discrimination logic then determines
whether the number of black pixels exceeds the user defined threshold. If
it does, the scan line counter is incremented, and the 16 bit word from
the middle of the next scan line is brought into the discrimination logic
to have it's number of black pixels compared to the threshold. This
process continues until the first scan line is found where the number of
black pixels is less than the user defined threshold. When this scan line
is found, an interrupt is generated to the microprocessor. The service
routine for this interrupt causes the microprocessor to read the contents
of the first black scan line number storage register (hereafter the "first
black register") and to read the current count of the scan line counter.
The microprocessor then constructs a table in a document profile memory
wherein the first text line scan line number will be written to an array
or data base as a data record and given a "possible text" label. The
current count of the scan line counter will then be written to the data
base or array with a "blank line" label. All the scan line numbers between
the first black scan line number and the first blank scan line number will
also be written to the data base with "possible text line" labels.
The process then repeats itself in that it reverts back to the mode of
looking for the next scan line where the number of black pixels exceeds
the user defined threshold. When this next "first black" scan line is
found, its scan line number is written into the first black register. The
discrimination logic then enters a mode of looking for the first blank
line following this newly found first black line. When the first following
blank line is found, another interrupt is generated, and the
microprocessor again executes the service routine described above to add
further data to the vertical profile data base.
The foregoing process is repeated until the scan line count equals the scan
line count of the last scan line on the page. In some embodiments, the
microprocessor will at this time map the document into text and graphic
zones by looking at the vertical profile and finding the smallest inter
line space (hereafter SIS). This will be the smallest grouping of all
blank scan lines in the vertical profile. Once this SIS number is found,
all the other groupings of blank line in the vertical profile are compared
to the SIS to determine if they are integer multiples of the SIS. The
number of violations of this integer multiple rule is determined and
compared to a user defined threshold. All zones where the number of
violations is less than the threshold may be labelled text. This result is
not as reliable as the result that may be obtained if a horizontal profile
is built and examined with the same sort of analysis. In the preferred
embodiment, both the horizontal and vertical profiles are examined before
a region is labelled text. The vertical profile may be analyzed either as
soon as it is completed or later after the horizontal profile is also
completed.
At this time in the preferred embodiment, the discrimination logic switches
into the horizontal scan mode to build the horizontal profile. This is
done as follows. At the time that the scan line count equals the number of
the last scan line, an interrupt is generated to the microprocessor. The
service routine for this interrupt searches the vertical profile to
determine the scan line number of the top scan line and the bottom scan
line in the first grouping of "black" lines which is labelled "possible
text". These scan line numbers are written to a storage register or
registers in the discrimination logic in the preferred embodiment, but in
other embodiments, they may be stored in the microprocessor's RAM and
supplied upon request. These scan lines define the top and bottom limits
of the plurality of columns which make up this particular text line.
The purpose of the discrimination logic on this horizontal scan of the text
line so identified to the discrimination logic is to read all the pixels
in each column in the text line and mark all boundaries between "blank"
column and "black" columns. This process is performed for each text line
identified in the vertical profile, but is done for only one text line at
a time. The scan line counter is used in this mode to count the current
column of pixels being examined and is incremented as each column of
pixels is completed. A comparison circuit compares the current column
count of the scan line counter to a value representing the number of
columns across the page. An end-of-line interrupt signal is generated when
the horizontal scan is completed as indicated by the result of said
comparison. The service routine for this interrupt causes the
microprocessor to send the scan line numbers of the top and bottom of the
next text line in the vertical profile to the discrimination logic to
define the sizes of the next columns to access from the frame buffer. A
horizontal scan of this next text line is then performed. The object of
these horizontal scans is to find all the blank spaces in the line and to
build a horizontal profile of the document such that the smallest
horizontal space may be determined. This smallest space will probably be
the space between characters in words on the line. The function of the
discrimination logic on the horizontal scan is only to generate interrupt
signals such that the color change boundaries may be marked in the
horizontal profile.
To do the mapping of the document into text and graphics zones, the
microprocessor will later analyze the horizontal profile to fine the
smallest horizontal blank space (hereafter ICS for intercharacter space)
on text lines so analyzed. The system assumes that the smallest blank
space it finds in a horizontal scan from left to right or form right to
left will be an intercharacter space. Further, the system assumes that any
larger blank spaces which are integer multiples of the intercharacter
space will be interword spaces. The microprocessor compares the blank
spaces in all the text lines so scanned to determine if the blank spaces
therein are integer multiples of the ICS. The text lines where the number
of violations, i.e., the number of horizontal blank spaces which are not
integer multiples, is less than a user definable threshold are recorded as
probable text zones. In the preferred embodiment, the vertical profile is
also examined in the same way, and when both the vertical and horizontal
profiles have been so examined, the text zones and graphics zones are
mapped out.
The discrimination logic works as follows to generate the interrupts
marking the blank spaces in the horizontal text lines. To perform this
function, the microprocessor loads the discrimination logic with the
address of the first scan line of the first text line from the vertical
profile previously developed, and the number of scan lines vertically
adjacent to each other which comprise that text line. For pica or elite
typewritten documents single-spaced at six lines per inch, each text line
will comprise approximately 33 scan lines at a 200 pixel per linear inch
data density in the frame buffer. For smaller type faces, the number of
vertically adjacent scan lines comprising a text line may be twenty or
twelve. For purposes of illustration, assume that the next line is 20
pixels high. The discrimination logic will then access the 20 bits
corresponding to the 20 vertically aligned pixels at the extreme left edge
column (or the extreme right edge column) of the line. These 20 vertically
aligned pixels will be applied to a PLA or other logic which generates a
binary number representing the number of black pixels in the column. This
binary number is then compared to a user definable threshold defining the
minimum number of black pixels that must exist in a column to label that
column a "black" column. As each column of pixels is completed, the scan
line counter is incremented and the next column of pixels is brought into
the discrimination logic for analysis. The line is processed in this
manner, column by column until the first "black" column is found. Any
column which has at least the minimum number of black pixel established by
the user definable threshold will be considered to be a column that is
within a character. The discrimination logic starts the horizontal scan by
looking for the first "black" column. When it finds it, the column number
is recorded in the same "first black" register (or a different one) used
on the vertical scan. Once the first black column is found, the
discrimination logic switches modes to begin looking for the first blank
column following this first black column.
The objective in this new mode is to find the first column which has fewer
black pixels in it than the maximum number of black pixels allowable per a
user defined threshold defining a blank column. When the first blank
column is found, an interrupt to the microprocessor is generated. This
will signify that the column just previous to the current column was
either the extreme right edge of a character or the extreme left edge of a
character, depending upon which direction the line is being scanned. The
service routine for this interrupt reads the address of the first black
column from the first black register and the count of the scan line
counter giving the current horizontal column address. The microprocessor
then writes these two column addresses to the horizontal profile data
base, and gives them the appropriate labels as black or blank. In some
embodiments, the count address read will be a pre-incrementation address
indicating that the column number next in sequence is the first blank
column. In these embodiments, the current count read from the scan line
counter is labelled as black because it is the address of the last black
column in the "black run" before the blank column was found. These two
addresses are recorded. The discrimination logic then switches modes again
to begin looking for the next column with more than the user defined
number of black pixels therein. The horizontal column counter is
incremented again, and the next column is examined. When the next black
column is found, its column address is again stored in the first black
register. The discrimination logic then returns to the mode of looking for
the next blank column. When it is found, an interrupt is again generated
and the same service routine described above is again generated. When the
text line has been completely scanned, the microprocessor will have a
complete horizontal profile of the line giving all color change addresses.
From these data records the number of columns in each black run and the
number of columns in each blank run may be determined.
In some embodiments, discrimination logic generates an interrupt on each
color change from black to white and from white to black. The direction of
the change will be a data item which is read during the interrupt service
routine. The processor keeps a separate table in the form of a linear
array for each text line identified in the vertical profile. This table of
linear arrays defines the spaces or blank runs found during horizontal
scans of text lines. This table has as its row index the text line number
from the vertical profile. Each text line number will correspond to a
number of scan lines in the vertical profile compiled by the processor. In
this horizontal profile table that the processor compiles, the text line
currently being scanned has an array appended to it. This may be a linear
array containing a plurality of numbers. The numbers signify the number of
columns n each intercharacter or interword space. Each time the
discrimination logic generates an interrupt during a horizontal scan, the
service routine for that interrupt determines if the two column addresses
define a black run or a white run. If the column addresses read during the
interrupt defines a white run, the processor subtracts the two column
addresses read during that interrupt service and places the result of the
subtraction in the linear array appended to that next line as one element
of the array defining the size of a blank horizontal space in the line.
When the horizontal scan is completed, the array will contain a plurality
of numbers having different values defining the sizes of all the blank
spaces in the line. The processor then examines these numbers and locates
the smallest one. This smallest number corresponds to the smallest
intercharacter space in that particular text line and will be so
designated as the ICS for that line. All the other numbers in the array
will then be compared to this intercharacter space to determine whether
they are multiples of the ICS. If the processor finds that the spaces in
the line are integer multiples of the smallest intercharacter space, then
the processor concludes that the text line just scanned is indeed a text
line.
Those skilled in the art will appreciate that, at the point in time just
after either the horizontal profile or the vertical profile is generated,
whether or not a group of scan lines is a text zone or a graphics zone is
not clear. This only becomes clear (in a probablistic sense) after an
examination of the regularity of the spaces in the vertical and horizontal
profiles. Any method of locating the spaces in both the vertical and
horizontal direction and determining the relative sizes of these spaces
will suffice for making this regularity determination and will allow the
invention to be practiced.
Once these text and graphic zones are mapped, the processor directs
compression logic to access the pixel data from the text zones and omit
every other bit in both the horizontal and vertical directions. The data
so compressed it then written by the compression logic onto an optical
disk or a magnetic disk, into another frame buffer or to some other
peripheral possibly by a network. The areas in the frame buffer designated
as graphic areas will be accessed by the compression logic and written
unchanged to the user apparatus.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of the system of the invention.
FIG. 2 is a block diagram of the discrimination logic.
FIG. 3 is the diagram of the rasterization of a typical text zone.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring to FIG. 1 there is shown a block diagram of the system of the
invention. The document image to be compressed is digitized and stored in
bit mapped fashion in a frame buffer 20. The data port 22 and the address
port 24 are respectively controlled by multiplexers 26 and 28. The purpose
of these multiplexers is to switch the address and data ports of the frame
buffer to connection with the proper logic in the system which needs to
control these ports at certain times. For example, during the operation of
the system, the first phase after the image of a document has been
digitized and stored in the frame buffer 20 is to do horizontal and
vertical profiles of the document image to map the image into zones of
text and zones of graphics. To do this, there is a subsystem called the
discrimination logic 30 which must control the address and data ports of
the frame buffer during this phase. After the document image has been
mapped into zones of text and zones of graphics, a microprocessor orders a
subsystem for compression of the image called the compress logic 32 to
take control of the address and data ports of the frame buffer and
compress the image such that text is converted to 100 pixels per linear
inch resolution and graphics zones remain at 200 pixels per linear inch
resolution. The compression logic does this resolution transformation by
accessing the data in text zones and deleting every other bit in each row
and deleting every other row. Any logic which can accomplish this function
may be used for the compression logic 32, and its exact design is not
critical to the invention. Those skilled in the art will appreciate
numerous designs which may be used to accomplish this function.
A microprocessor 34 controls the system including the multiplexers 26 and
28 via the microprocessor address bus 36 and a decoder 38. This decoder
decodes addresses on the address bus 36 and converts them to control
signals which are routed to various enable and select inputs on the
various logic subsystems in the system. The multiplexers 26 and 28 are
controlled by control signals SEL 2 and SEL 3 from the decoder which are
activated when the microprocessor writes the addresses assigned to control
these multiplexers on the address bus 36. When the microprocessor is
informed that a new document image to be compressed is resident in the
frame buffer, the proper addresses are written on the address bus 36 to
cause the decoder 38 to activate SEL 2 and SEL 3 to cause the multiplexers
26 and 28 to connect the discrimination logic 30 to the address and data
ports of the frame buffer 20. Those skilled in the art will appreciate
that there must be provided some logic (not shown) to maintain the
multiplexers 26 and 28 in the proper states during the document profiling
stage. Typically, this would involve separate select inputs on each
multiplexer which when activated cause the multiplexer to latch into a
particular state corresponding to the activated select line. Such a system
would work for purposes of practicing the invention, and is symbolized in
FIG. 1 by the SEL 2 and SEL 3 signal lines each of which represents two
select lines and two uniques addresses associated with activation of each
said select line.
After, the document image has been profiled, the microprocessor 34 sends
data to the compress logic via data bus 37 indicating the scan lines which
are in text zones and the scan lines which are in graphics zones. The
compress logic then begins generating addresses on address bus 42 which
are coupled through the multiplexer 28 to the address port 24 of the frame
buffer 20. These addresses cause the data in the frame buffer to be
accessed scan line by scan line. The scan line number of each group of
pixels from a line is compared to the scan line numbers that are in text
zones, and if a match occurs, every other bit in the scan line is
eliminated and every other scan line is eliminated to drop the resolution
from the 200 dots per inch in the frame buffer 20 to the 100 dots per inch
of the compressed image. The compressed scan line data is then output by
the compress logic 32 to a compressed image storage memory 44 for storage.
The scan line pixel data found to be graphic zones are passed directly to
the compressed image storage memory 44 without alteration of the
resolution.
The microprocessor functions to receive interrupts from the discrimination
logic 30 and to read data from certain data storage registers to be
described later in the discrimination logic and uses this data to build
horizontal and vertical document profile data bases in a document profile
database memory. Further, the microprocessor controls the sequence of
operational modes the system enters such as the profile mode vertical pass
and the profile mode horizontal pass and, finally, the compress mode.
Further, the microprocessor examines the final horizontal and vertical
profiles to determine regularity of blank spaces. That is, the
microprocessor examines the regularity of blank spaces between text lines
and the regularity of blank spaces in a supposed text line to determine
whether a particular zone of a document image is a text or a graphics
zone. The microprocessor also serves to transmit the data indicating which
zones are text and which are graphic to the compress logic and sends data
regarding which scan lines are in text lines to the discrimination logic
for use in performing the horizontal profiling pass.
Referring to FIG. 2, there is shown a block diagram of the discrimination
logic. This logic serves to perform the examination of the data in the bit
map of the image to be compressed and to discriminate between blank lines
and lines which have black pixels in them for building the vertical
profile. It also serves to discriminate between blank (white) and
non-black (black) columns and informs the microprocessor of the locations
of same to allow the microprocessor to build the horizontal profile.
The discrimination logic works as follows. When the microprocessor first
starts profiling a document and wishes to perform a vertical pass, it
addresses a mode control register 80 and writes a data bit or word therein
which indicates that a vertical pass is to be performed. This is done by
writing an address corresponding to the mode control register on the
address bus 36 which causes decoder 38 to activate the EN 5 signal thereby
connecting the inputs of the mode control register 80 to the
microprocessor data bus 37. The proper mode control bit etc. may be
written into the register 80. Hereafter when the microprocessor is spoken
of as reading from or writing to a particular register or other logic, the
details of writing the corresponding address such that the decoder 38
activates the appropriate enable or select line to enable the appropriate
logic will be omitted as those skilled in the art appreciate how this is
done. The microprocessor 34 then causes the multiplexers 26 and 28 to
switch to states to allow the microprocessor to access data from the frame
buffer 20 through the discrimination logic 30 and the extensions of the
microprocessor address and data buses 37A and 36A. The microprocessor then
accesses the 16 bits in the middle of the first scan line and writes them
into an input buffer/shifter register 82 (hereafter the buffer) in
parallel format.
The buffer 82 serves to receive the input pixel data to be examined and
format it to the proper form for use by a black pixel counter 84. The
buffer 82 consists of 16 or more registers each of which stores, for
example, 16 bits. More bits may be stored if a swath larger than 16 bits
is desired on the vertical pass. Further, the number of registers should
be larger than the number of scan lines expected for any text line such
that the pixels in each column of the text line may be simultaneously
stored in the buffer 82 for shifting out in a manner which is described
below. Each register has a parallel output which may be separately enabled
by the microprocessor and which are wire-or'ed to a vertical output bus 86
selectively coupled to the input of the black pixel counting logic 84
through a multiplexer 88 and a bus 90. Each serial output from a register
in the buffer 82 is gathered into a horizontal output bus 92 such that
each register in the buffer 82 may shift out one bit and there will be
presented to the black pixel counting logic 84 16 bits in parallel, one
from each register. The horizontal output bus 92 is selectively coupled to
the bus 90 by the multiplexer 88 which is controlled by the microprocessor
34. When the vertical profile is being built the multiplexer 88 is
controlled to couple the buses 86 and 90 together, and when the horizontal
profile is being built, the buses 92 and 90 are coupled together.
The black pixel counting logic may be any logic which can take the parallel
pixel data input on the bus 90 and determine the number of black pixels in
it and output a binary number which indicates the number of black pixels
on a bus 94. In the preferred embodiment a PLA. EPROM or ROM is used with
the logic relationship between the input on the bus 90 and the output on
the bus 94 being such that the above defined criteria is met. In other
embodiments, a shift register and counter could be used or any other logic
which would perform the function within an acceptable time.
The output binary number on the bus 94 is compared to another binary number
on a bus 96 which indicates a user defined maximum number of black pixels
to classify a particular scan line as a white or blank line, or in the
case of a horizontal scan, to classify a particular column as a blank
column. These two user defined numbers are stored by the microprocessor in
two registers 98 and 100. Register 98 stores the threshold defining a
blank column, while register 100 stores stores the threshold defining a
blank line. The microprocessor 34 loads these threshold numbers by
enabling each individually through use of the decoder 38 (enable signals
not shown) and the data bus 37. The contents of these two registers are
selectively coupled to the A input of a comparator 102 which has its B
input coupled to the bus 94 by a multiplexer 104. The multiplexer 104 is
controlled in its selection by the microprocessor 34 through the decoder
38 and the SEL 1 signal on line 106. When in the vertical profile mode,
the microprocessor causes the multiplexer 104 to couple the data output
108 to the comparator 102. When in the horizontal profile mode, the
microprocessor causes the multiplexer 104 to couple the data output 110 of
the register 98 to the comparator 102.
The comparator compares the number of black pixels in the incoming image
data to the number of allowable black pixels on the bus 96 and generates
two signals. The first signal on a line 112 is active when the number at
the B input is greater than the number at the A input to the comparator
102. The second signal on a line 114 is active when the number at the B
input is less than the number at the A input. Both of these signals are
coupled to a blank line interrupt generation circuit 116. The purpose of
this circuit is to generate a BLANK LINE/COL INTERRUPT signal on a bus 118
the first time a blank line or blank column is found each time after a
black line or column is found as indicated by the activation of the signal
on the line 112. The service routine for this interrupt will be described
below. The interrupt generation logic could be implemented with a flip
flop or with other logic which will be apparent to those skilled in the
art. The logic will be reset by the RESET 2 signal on the line 120 form
the decoder 38 as part of the interrupt service routine.
During a vertical pass, the discrimination logic functions to find the
first black scan line in each black "run" (collection of adjacent black
scan lines) and to then switch modes to generate an interrupt upon finding
the next white line following the first black scan line in the run. This
is done by using a counter 122 to count scan lines to generate addresses
for access of pixel data and a first black register 124 to store the scan
line number of the first black scan line found. The scan line counter is
incremented by incrementation logic 126 through a signal INCR generated
thereby on line 128. The incrementation logic 126 is coupled to the lines
112 and 114 so as to generate an incrementation pulse each time either of
the signals on line 112 or 114 becomes active in the sense of assuming a
defined state meaning a particular event has occurred or is supposed to
occur in response to the signal. At the beginning of a vertical pass, the
microprocessor causes the decoder 38 to generate the RESET 1 pulse on line
130 to reset the counter 122 to zero. The microprocessor then reads this
count output via data bus 37 and calculates the proper offset to generate
an address to access the 16 bits in the middle of this first line, scan
line 0. This data is then written into the buffer 82. The comparator 102
then compares the number of black pixels therein to the threshold on bus
108 and activates the signal on line 112 if the comparisone indicates the
number of black pixels is greater than or equal to the threshold or the
signal on line 114 if the number of black pixels is less than the
threshold. Either signal activates the incrementation logic to generate an
INCR pulse to increment the counter 122 to the count of 1 from which the
microprocessor calculates the address of the middle 16 bits in the second
scan line, scan line 1. If the GR. THAN signal on line 112 was activated,
the first black scan line or column number storage register 124 is clocked
and the data at its data input, bus 132 coupled to the count out output of
the counter 122 is loaded into the register for later reading by the
microprocessor. If not the process of reading in 16 bit swaths from the
middle of scan lines continues until the first black scan line is found.
The microprocessor in calculating addresses for access of the 16 bit
swaths from the middle of the scan lines, in the preferred embodiment,
does the calculation and enables one of the 16 registers in the buffer 82.
In other embodiments, each calculation results in an access to the frame
buffer 20.
When the first black register 124 is loaded, the signal on the line 112
also sets the logic 116 in a state such that the next activation of the
signal on the line 114 will result in generation of the interrupt signal
on line 118.
If the first black line was the top of a text line, several black scan
lines will follow before the next white scan line is found. Each of these
following black scan lines will cause the comparator 102 to activate the
GR . THAN signal on the line 112. However, the first activation of the GR.
THAN signal also sets a flip flop 134 via a line 136 coupled to the GR.
THAN signal line. The Q not output of the flip flop 134 is coupled to an
input of an AND gate 138 which has one input coupled to the GR. THAN
signal output line 112 of the comparator 102. The output of the AND gate
138 is the coupled to the clock input of the first black scan line or
column number register 124. Thus, as soon as the first black scan line or
column register 124 (hereafter the first black register) is loaded, the
flip flop 134 is set and the AND gate 138 prevents further clocking in of
the current count from the scan line/column counter 122 thereby freezing
the contents of the first black register 124 at the scan line number of
the first black scan line in the current run. The interrupt service
routine for each interrupt resets the flip flop 134 via the RESET 3 signal
on the line 140 thereby preparing the discrimination logic to find the
next black line for the next black run.
The interrupt service routine which is performed when the interrupt on line
118 is activated serves to collect the data needed to quantify the size of
the blank space in scan lines which the discrimination logic has detected.
To do this the microprocessor reads the contents of the first black
register 124 and the current count of the scan line/column counter 122 at
the time of the interrupt (and subtracts one from the current count to get
the scan line number of the first white line). When the microprocessor has
this information, for each black run, it can calculate the first and last
scan line number in each text line and the size in scan lines of the blank
space between text lines. This information is used to write the records of
the vertical profile. The interrupt service routine also resets the flip
flop 134 and the blank line/column interrupt generation logic 116 by
activating the signals REST 2 and RESET 3.
The foregoing process of finding the start and end of black runs continues
until the current count equals the scan line count of the last scan line
on the page. This condition is detected by a comparator 142 and an end of
page/line count register 144 which stores data written there | | |