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Three-terminal quantum device    
United States Patent4912531   
Link to this pagehttp://www.wikipatents.com/4912531.html
Inventor(s)Reed; Mark A. (Dallas, TX); Bate; Robert T. (Garland, TX)
AbstractA three-terminal quantum well device, which functions somewhat analogously to an MOS transistor. That is, the three terminals of the device can generally be considered as source, gate, and drain. An output contact is connected by tunneling to a number of parallel chains of quantum wells, each well being small enough that the energy levels in the well are quantized discretely. In each of these chains of wells, the second well is coupled to a common second conductor, and the first well is electronically coupled to a common first conductor.



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Drawing from US Patent 4912531
Three-terminal quantum device - US Patent 4912531 Drawing
Three-terminal quantum device
Inventor     Reed; Mark A. (Dallas, TX); Bate; Robert T. (Garland, TX)
Owner/Assignee     Texas Instruments Incorporated (Dallas, TX)
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Publication Date     March 27, 1990
Application Number     06/626,551
PAIR File History     Application Data   Transaction History
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Filing Date     June 29, 1984
US Classification     257/17 257/20 257/25 257/773 257/E21.408 257/E29.074 257/E29.075 257/E29.107 257/E29.241
Int'l Classification     H01L 029/88 H01L 029/205
Examiner     Larkins; William D.
Assistant Examiner    
Attorney/Law Firm     Melvin, Comfort; James T. Sharp; Hoel; Carlton H. ,
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USPTO Field of Search     357/4 357/12 357/16
Patent Tags     three-terminal quantum
   
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What is claimed is:

1. A three terminal semiconductor electronic device, comprising:

(a) source and gate quantum wells separated by a tunneling barrier;

(b) an output drain region separated from said gate well by a tunneling barrier;

(c) a source electrode coupled to said source well, said source well positioned between said source electrode and a ground member so that voltage applied to said source electrode adjusts the energy levels in said source well relative to ground;

(d) a gate electrode coupled to said gate well, said gate well positioned between said gate electrode and a ground member so that voltage applied to said gate electrode adjusts the energy levels in said gate well relative to ground;

(e) a drain electrode coupled to said drain region;

(f) said source well with size and shape requiring first and second momentum components of a carrier in said source well be quantized; and

(g) said gate well with size and shape requiring the same first and second momentum components of a carrier in said gate well be substantially the same as said components of a corresponding carrier in said source well; whereby sharply resonant tunneling of carriers from said source well through said gate well into said drain region is controlled by the relative voltage between said gate and source electrodes.

2. The device of claim 1, wherein:

(a) said source well with size and shape requiring first, second, and third momentum components of a carrier in said source well be quantized; and

(b) said gate well with size and shape requiring the same first, second, and third momentum components of a carrier in said gate well be substantially the same as said components of a corresponding carrier in said source well.

3. The device of claim 2, wherein:

(a) said source well is of approximately cubic shape; and

(b) said gate well is of approximately cubic shape.

4. The device of claim 1, wherein:

(a) said source well is made of Al.sub.y Ga.sub.1-y As;

(b) said gate well is made of Al.sub.z Ga.sub.1-z As; and

(c) said tunneling barriers are made of Al.sub.x Ga.sub.1-x As.

5. The device of claim 2, wherein:

(a) said source well is made of Al.sub.y Ga.sub.1-y As;

(b) said gate well is made of Al.sub.z Ga.sub.1-z As; and

(c) said tunneling barriers are made of Al.sub.x Ga.sub.1-x As.

6. The device of claim 3, wherein;

(a) said source well is made of Al.sub.y Ga.sub.1-y As;

(b) said gate well is made of Al.sub.z Ga.sub.1-z As.

(c) said tunneling barriers are made of Al.sub.x Ga.sub.1-x As.

7. The device of claim 1, wherein:

(a) said carriers are electrons.

8. The device of claim 2, wherein:

(a) said carriers are electrons.

9. The device of claim 3, wherein:

(a) said carriers are electrons.

10. The device of claim 1, wherein:

(a) said source electrode is doped semiconductor material;

(b) said gate electrode is doped semiconductor material; and

(c) said drain electrode is doped semiconductor material;

11. The device of claim 2, wherein:

(a) said source electrode is doped semiconductor material;

(b) said gate electrode is doped semiconductor material; and

(c) said drain electrode is doped semiconductor material;

12. The device of claim 3, wherein:

(a) said source electrode is doped semiconductor material;

(b) said gate electrode is doped semiconductor material; and

(c) said drain electrode is doped semiconductor material;

13. A three terminal semiconductor electronic device, comprising:

(a) a plurality of source and gate quantum wells, each of said source wells separated from a corresponding one of said gate wells by a tunneling barrier;

(b) an output drain region separated from said gate wells by tunneling barriers;

(c) a source electrode coupled to said source wells, said source wells each positioned between said source electrode and a ground member so that voltage applied to said source electrode adjusts the energy levels in each of said source wells relative to ground;

(d) a gate electrode coupled to said gate wells, said gate wells each positioned between said gate electrode and a ground member so that voltage applied to said gate electrode adjusts the energy levels in each of said gate wells relative to ground;

(e) a drain electrode coupled to said drain region;

(f) each of said source wells with size and shape requiring first and second momentum components of a carrier in said source well be quantized; and

(g) each of said corresponding gate wells with size and shape requiring the same first and second momentum components of a carrier in said gate well be substantially the same as said components of a corresponding carrier in said corresponding source well; whereby sharply resonant tunneling of carriers from said source wells through said gate wells into said drain region is controlled by the relative voltage between said gate and source electrodes.

14. The device of claim 13, wherein:

(a) said source well with size and shape requiring first, second, and third momentum components of a carrier in said source well be quantized; and

(b) said gate well with size and shape requiring the same first, second, and third momentum components of a carrier in said gate well be substantially the same as said components of a corresponding carrier in said source well.

15. The device of claim 14, wherein:

(a) said source well is of approximately cubic shape; and

(b) said gate well is of approximately cubic shape.

16. The device of claim 13, wherein:

(a) said source well is made of Al.sub.y Ga.sub.1-y As;

(b) said gate well is made of Al.sub.z Ga.sub.1-z As; and

(c) said tunneling barriers are made of Al.sub.x Ga.sub.1-x As.

17. The device of claim 14, wherein:

(a) said source well is made of Al.sub.y Ga.sub.1-y As;

(b) said gate well is made of Al.sub.z Ga.sub.1-z As; and

(c) said tunneling barriers are made of Al.sub.x Ga.sub.1-x As.

18. The device of claim 15, wherein:

(a) said source well is made of Al.sub.y Ga.sub.1-z As;

(b) said gate well is made of Al.sub.z Ga.sub.1-z As; and

(c) said tunneling barriers are made of Al.sub.x Ga.sub.1-x As.

19. The device of claim 13, wherein:

(a) said carriers are electrons.

20. The device of claim 14, wherein:

(a) said carriers are electrons.

21. The device of claim 15, wherein:

(a) said carriers are electrons.

22. The device of claim 13, wherein:

(a) said source electrode is doped semiconductor material;

(b) said gate electrode is doped semiconductor material; and

(c) said drain electrode is doped semiconductor material;

23. The device of claim 14, wherein:

(a) said source electrode is doped semiconductor material;

(b) said gate electrode is doped semiconductor material; and

(c) said drain electrode is doped semiconductor material;

24. The device of claim 15, wherein:

(a) said source electrode is doped semiconductor material;

(b) said gate electrode is doped semiconductor material; and

(c) said drain electrode is doped semiconductor material;

25. A vertical three terminal semiconductor electronic device, comprising:

(a) planar source and gate quantum wells separated by an abutting planar tunneling barrier;

(b) a planar output drain region separated from said gate well by a second abutting planar tunneling barrier;

(c) a source electrode coupled to said source well, said source well positioned between said source electrode and a ground member so that voltage applied to said source electrode adjusts the energy levels in said source well relative to ground;

(d) a gate electrode coupled to said gate well, said gate well positioned between said gate electrode and a ground member so that voltage applied to said gate electrode adjusts the energy levels in said gate well relative to ground;

(e) a drain electrode coupled to said drain region;

(f) said source well with size and shape requiring first and second momentum components of a carrier in said source well to be quantized; and

(g) said gate well with size and shape requiring said first and second momentum components of a carrier in said gate well to be substantially the same as said components of a corresponding carrier in said source well; whereby sharply resonant tunneling of carriers from said source well through said gate well into said drain region is controlled by the relative voltage between said gate and source region.

26. The device of claim 25, wherein:

(a) said source well with size and shape requiring first, second, and third momentum components of a carrier in said source well be quantized;

(b) said gate well with size and shape requiring the same first, second, and third momentum components of a carrier in said gate well be substantially the same as said components of a corresponding carrier in said source well.

27. The device of claim 26, wherein:

(a) said source well is of approximately thin rectangular solid shape; and

(b) said gate well is of approximately thin rectangular solid shape.
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CROSS-REFERENCE TO RELATED APPLICATIONS

The following copending applications disclosed related subject matter: Ser. Nos. 626,802, 626,808, 626,809, 626,342, 626,806, and 626,807, all filed June 29, 1984.

BACKGROUND AND SUMMARY OF THE INVENTION

The present invention relates to electronic devices.

It is generally recognized that conventional VLSI integrated technical technology will be prevented from further scaling by the time MOS devices get down to a quarter micron channel length, and perhaps even at much larger geometries. Since much of the advance in integrated circuit capabilities has been based on the continued progress of scaling, this near-future barrier is of substantial concern.

Thus it is an object of the present invention to provide an integrated circuit technology wherein active devices can have active regions smaller than one quarter micron in dimension.

It is further object of the present invention to provide an integrated circuit technology wherein active devices can be fabricated which occupy a total area of less than 1/4 of a square micron average for each active device.

A further inherent limitation of conventional integrated circuit technology is speed. MOS devices have inherent limits on their speed due to the channel-length transit time. Intergrable bipolar devices also have inherent speed limitations, due to the base width transit time, and are also likely to have high power dissipation.

Thus it is an object of the present invention to provide an active device having higher potential maximum speed than any MOS device.

It is a further object of the present invention to provide an active device which is potentially faster than any bipolar device.

It is a further object of the present invention to provide an active device which is potentially faster than any bipolar device and which also has a very low power dissipation.

To achieve these and other objects, the present invention provides: a new genus of electronic devices, wherein at least two closely adjacent potential wells (e.g. islands of GaAs in an AlGaAs lattice) are made small enough that at least two components of momentum of carriers within the wells are discretely quantized. This means that, when the bias between the wells is adjusted to align energy levels of the two wells, tunneling will occur very rapidly, whereas when energy levels are not aligned, tunneling will be greatly reduced. This high-gain mechanism leads to useful electronic device functions.

A difficulty in making quantum-coupled devices into functional electronic circuits is that these devices are so extremely small that it is typically necessary to run a number of them in parallel to provide macroscopic output currents. In addition, the routing of wiring to couple into and out of these multiple parallel active devices is also difficult, since the tight geometry constraints of the devices place substantial constraints on the geometry which must be used for the wiring.

Thus, it an object of the present invention to provide a device structure using quantum-coupled devices wherein input and output connections to route macroscopic currents to and from the devices are provided.

According to the present invention there is provided:

An electronic device comprising:

a plurality of first and second potential wells each comprising an island of a semiconducting material having a minimum dimension less than 500 Angstroms and another dimension less than 1000 Angstroms;

a barrier medium interposed between said first and second wells wherein the minimum potential energy of carriers is at least 50 millielectronvolts higher than the minimum potential energy of carriers within said wells, said wells being physically separated by a distance which is less than three times the smallest physical dimension of either of said wells;

a first conductor electrically coupled to each of said first wells;

a second conductor electrically coupled to each of said second wells; and

an output contact laterally separated from plural ones of said second wells by said barrier medium, said barrier medium between said output contact and said second wells having a minimum lateral width which is no more than twice the minimum lateral width separating said first and second wells;

wherein each of said wells comprises a lightly doped semiconductor, and each said conductor comprises a heavily doped semiconductor.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be described with reference to the accompanying drawings, wherein:

FIGS. 1A and 1B shown spacing and energy levels of potential wells in a simple sample embodiment;

FIG. 2 shows the structure of FIG. 1, biassed to permit resonant tunneling;

FIG. 3 shows the structure of FIG. 1, biassed at a lower voltage than shown in FIG. 2, so that resonant tunneling is forbidden;

FIG. 4 shows voltage-current characteristics of the structure of FIG. 1;

FIG. 5 shows the energy levels of an embodiment using moderately large wells, wherein the upper-lying energy levels are more closely spaced;

FIG. 6 shows the electronic structure of an embodiment including input and output contacts;

FIG. 7 shows the energy levels of an embodiment using approximately sinusoidal well boundaries, wherein the energy levels are more equally spaced;

FIG. 8 shows a three-terminal quantum-well device according to the present invention;

FIG. 9 shows another three-terminal quantum-well device according to the present invention, wherein multiple chains of quantum-well pairs are connected in parallel;

FIG. 10 shows a cross-section of the device of FIG. 9;

FIG. 11 shows a many-terminal device, which differs from the device of FIG. 9 in having multiple electrodes 208 prime for connection to multiple wells 204 prime in each chain;

FIG. 12 shows a sample set of bias conditions for the embodiment of FIG. 11 wherein resonant tunneling occurs, and FIG. 13 shows a sample set of bias conditions for the embodiment of FIG. 11 wherein resonant tunneling does not occur;

FIG. 14 shows a read-only memory according to one embodiment of the invention;

FIG. 15 shows a sample output switch configuration used in practicing the present invention, wherein quantum-well devices switch macroscopic output currents;

FIG. 16 shows the effect of the electric potential change induced by the population of well levels on the permissible tunneling transitions in a further class of embodiments;

FIG. 17 shows an AND gate configured using quantum-well logic and self-consistent tunneling restrictions, and FIG. 18 shows a more complex logic element configured using quantum-well logic with self-consistent tunneling restrictions;

FIGS. 19 and 20 show two embodiments of vertical-tunneling quantum-well device structures according to the invention; and

FIGS. 21-36 show steps in processing a sample three-terminal device according to the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention teaches active devices which are fundamentally different from the transistor and diode structures which have been used heretofore in the electronics industry to configure integrated circuits. That is, active devices taught by the present invention are neither field effect transistors nor bipolar transistors, but operate according to principles which are fundamentally and entirely different.

A key feature of many embodiments of the invention is a pair of closely coupled quantum wells which are each extremely small, so small that their electron populations are quantized, i.e. an electron in a well can only have one of a few allowable energies. The present invention teaches modes of device operation which cannot be analyzed by classical physics, but must be understood in light of quantum mechanics.

Advances in semiconductor processing now permit semiconductor structures to be patterned with exceedingly small dimensions, comparable to the Bloch wave length of an electron. (The Bloch wavelength measures the "width" of an electron in a semiconductor. The location of an electron must be measured by a probability distribution, which has a certain width.) The present invention makes use of the availability of patterned structures in dimensions which are close to the Bloch wave length to achieve new types of device structures, capable of new principles of operation of a kind not seen before in semiconductor or integrated circuit devices.

A simplified sample embodiment, which demonstrates some of the key principles of operation used in the present invention, is shown in FIG. 1. Separate wells of gallium arsenide are embedded in a matrix of aluminum gallium arsenide. As is well known in the semiconductor art, the bandgap of AlGaAs is wider than that of GaAs. (More precisely, the pseudo-binary alloys of the formula Al.sub.x Ga.sub.1-x As are all semiconductors, with a bandgap which increases as a function of x.) This different bandgap means that conduction-band electrons in the lattice see a lower potential energy in the GaAs regions than in the AlGaAs regions. A particular advantage of this material system is that the interface between GaAs and AlGaAs is a very well behaved one, that is such interfaces can be fabricated with an extremely low density of surface states (less than the Si/SiO.sub.2 interface), and can preserve lattice match almost perfectly between the GaAs and the AlGaAs sides of the interface. However, as will be discussed below, the present invention can be practiced with a wide variety of material systems, and not only semiconductors.

In the sample embodiment of FIG. 1, the wells 10 are about 125 angstroms wide, and the spacing between the wells is also about 125 angstroms. The dimensions of these wells are small enough that the energy states of electrons in the well will be quantized. That is, these wells are preferably made cubic, and the allowable energy states of an electron in a cubic well of such dimensions can be calculated easily, using the effective mass approximation for the behavior of the electron, as a simple particle in a box problem in quantum mechanics. Thus, for example, for the well dimensions given above, and an aluminum concentration of 35%, there exist four allowable energy states, and the lowest lying energy state will be above the bottom of the GaAs conduction band minimum and will be separated from the next lowest energy state by 0.070 electron volts. The next higher lying energy state will lie another 0.114 electron volts higher. Note that these energy states must be treated as quantized. That means that the energy of an electron in the well must be exactly equal to one of these permitted discrete energy levels and cannot take any other value. This is key to the present invention. Note that this is a fundamental difference from normal semiconductor devices (even from the advanced semiconductor devices projected to be achievable by scaling present semiconductor devices), in that all conventional solid state devices--by they field effect or bipolar transistors or anything else--require that the energy levels of an electron within the conduction band of the semiconductor be quasi-continuous.

It should be noted that the number of electrons which can populate each energy level in such a quantized system is strictly limited. That is, the lowest lying energy level in each well in this example can be populated by only two electrons, the next level up can be populated by only six electrons, the next level up can be populated by only ten electrons, and so on. This means that the number of carriers within a well is strictly limited. Thus, a carrier cannot tunnel to an energy state in the next well if that energy state is already completely filled. While each well can hold only a few carriers at a time, it should be noted that the transition times are expressly short (typically far less than a pico-second), and total current can be increased by operating many pairs of wells in parallel.

Now, in the sample embodiment the wells are placed sufficiently close such that the probability density of an electron in one well extends into the neighboring well; that is, the wells 10 and 12 in FIG. 1 are close enough together that electrons can tunnel between them easily. In particular, as shown in FIG. 1b, an electron in the first well can tunnel easily to a state of equal energy in the second well, but of course it cannot do this unless an unoccupied state having the same energy actually exists in the second well. However, suppose that the energy levels in the two wells do not line up. Then an electron in the first well can only tunnel to states of the second well which have a different energy than the first well, and it can only tunnel to such states if there is also some mechanism whereby the electron can lose or gain enough energy to reach the energy of the lower-lying available state in the second well.

The chief mechanism for the changing of the energy of an electron to achieve tunneling in this fashion is relaxation via surface states. That is, even the GaAs to AlGaAs interface, which is exceedingly benign as semiconductor interfaces go, will have a measurable density of surface states at the interface. Such surface states provide a scattering process which will permit an electron to transfer to higher or lower energy, if it intersects one of the available sites for scattering. That is, the interface can be described as having an areal density of scattering sites which are capable of changing the energy from an electron so that it can make the transition between wells even when the energy levels of the wells do not line up. This mode of transition is known as inelastic tunneling. The alternative mode of tunneling, wherein the electron tunnels from the first well to the second with no change in energy, is known as resonant tunneling.

Tunneling requires conservation both of energy and also of momentum. Momentum is also quantized for small potential wells. That is, in each dimension of the box which defines the boundaries of the potential well, the smaller the length of that dimension the more widely spaced the allowable values of that component of momentum will be. Thus, as reported in the Soloner et al. article cited below, resonant tunneling can occur between two very closely spaced thin sheets of lower potential. Since the potential wells are very large in two dimensions, the momentum components in those two dimensions are not quantized. That is, when one dimension of a potential well is large, the momentum components in that direction are so closely spaced that a background lattice phonon will be available to supply the momentum difference. That is, the density of phonons found in the lattice follows Bose-Einstein statics, i.e. the number of phonons found in the lattice at energy E in a background lattice temperature T varies as 1 over (EXP ((E/k T)-1)). This energy distribution of phonons also implys a distribution for the magnitude of momentum of the phonons, and, since the phonons can be treated as approximately isotropic in reasonable semiconductor materials, this same distribution also specifies the distribution of phonons having a desired value of some one particular component of momentum. Thus, the quantization of momentum in a potential well can be considered as discrete or quasi-continuous only in relation to temperature. That is, for example, a 1000 angstrom wide box will result in momentum quantization at one degree Kelvin, since the phonon population will be crowded into energetically low states, but at 300.degree. K. there would be a tremendous lattice background phonon population to bridge gaps between the allowable momentum values, and thus the separation between the allowable momentum values in this direction would not be meaningful, i.e. momentum in this direction would have to be treated as a quasi-continum value, i.e. any value of this momentum component which an incoming carrier had would still permit tunneling, since lattice phonons could adjust this momentum component to one of the allowable values. If all three components of momentum are discretely quantized, then it follows that energy must be discretely quantized also. The quantization of energy levels is (to a rough approximation) merely dependent on the volume of the potential well, so that a thin flat potential well could have quantized energy states and sharply separate discrete allowable levels for one component of momentum, whereas the allowable values of the other two momentum components will be closely spaced, so that they impose no practical constraint on tunneling.

That is, the resonant tunneling gain is enhanced in accordance with the number of parameters which must be met. In tunneling between two closely spaced cubic potential wells, all three components of momentum (and therefore energy) must match between the state which the carrier is leaving in the first well and the state which the carrier is entering in the second will. That is, if an incoming carrier does not satisfy all three momentum constraints, the chances of it finding a lattice phonon which has exactly the right components to satisfy the difference in each of the three momentum values is quite small. However, if only one component must be adjusted, the chances of accidentally doing this by interaction of the lattice phonon are much greater.

Thus, the preferred embodiments of the present invention use structures wherein all three components of momentum are quantized. However, a class of less preferred alternative embodiments of the present invention uses structures wherein only two components of momentum but not energy are quantized, i.e. closely spaced thin wires. It is easy to satisfy the momentum constraint alone by a phonon-assisted process, but the necessity for satisfying both energy and momentum conversation is what keeps the rate for inelastic tunneling background controlled. That is, if a scattering center at the metallurgical interface can change the energy of a carrier, it is easy for one of the lattice phonons to provide the appropriate adjustment in momentum.

As device dimensions are made smaller, two desirable effects are achieved: First, the separation of the quantized energy states in a well increases as the well dimension becomes smaller. Second, as the wells become closer together, the rate of tunneling is increased. That is, the probability of tunneling can be expressed as a constant times exp(-2d.times.f(E)), where d is the distance between the wells and E is the energy difference.

This exponential dependance means that the probability of resonant tunneling is tremendously increased as the distance between wells is reduced. Inelastic tunneling will not be increased comparably, since as noted above inelastic tunneling is limited, in good material, by the density of scattering centers. Thus, room temperature operation becomes possible at interwell spacing of about 125A or less.

A limitation on resonant tunneling is provided by thermal "smearing", i.e. redistribution of energy level populations caused by background thermal energy. That is, the density of states distribution within each well of the discrete energy levels is broadened somewhat by thermal smearing. At higher temperatures, the thermal smearing is greater. The problem thermal smearing causes is that the operating temperature must be low enough that thermal smearing does not populate higher energy level states. That is, the electrons should reside in the lowest energy level to eliminate accidental coincidences and bidirectional elastic tunneling. This reduces to the condition that the energy spacing must be much larger than the thermal energy of the electrons. Thus, for operation at 4.degree. K. with GaAs wells in an Al.sub.0.3 Ga.sub.0.7 As matrix, the well width (and well spacing) should be in the neighborhood of 0.1 to 0.2 microns or less. However, to increase the operating temperature to 300.degree. K., the critical dimension needs to be reduced merely to a number on the order of 125 Angstroms or less.

It should be further noted that the energy levels in adjacent wells can be made to line up or not line up simply by applying a bias, as shown in FIG. 2. In this case, a sufficient bias voltage has been applied in the direction of conduction, so that the second level in the second well is lined up with the first level in the first well. Under these conditions resonant tunneling will regularly occur, and the fast relaxation from the second level to the ground state in the second well ensures that the device is unidirectional.

If zero bias were applied to this same structure, resonant tunneling would still be possible, but would be bidirectional. That is, at zero bias the energy levels in two adjacent wells will line up, but electrons will tunnel from the first well to the second well just as fast as they tunnel from the second well to the first well. Note, however, that if half as much bias as shown in FIG. 2 is applied, resonant tunneling will be forbidden (at sufficiently low temperature) and only inelastic tunneling is permissible. In this bias condition, as shown in FIG. 3, an electron can make a transition from a state in well one to an lower lying state in well two only if a scattering event also occurs, as discussed above. Thus, at small dimensions, the frequency of inelastic transitions is limited by the density of available scattering sites. However, the density of scattering sites is in effect an areal density, since it arises primarily from surface states rather than from bulk defects or particles within the crystal lattice. Thus, since the limiting factor is a areal density of defects, the inelastic tunneling current is relatively insensitive to the distance between wells. This means that, for good quality material, as the dimensions are scaled the resonant tunneling current increases tremendously, but the inelastic tunneling current does not increase much.

The result of these phenomena is that the current/voltage graph for tunneling between two wells looks approximately as seen in FIG. 4. That is, inelastic tunneling will supply a current which increases approximately exponentially with the applied voltage. Resonant tunneling will also supply at least one current peak added on to this curve, at a bias voltage where the energy levels of the wells line up. Thus, a regime of substantial negative differential resistance is available, i.e. a millimeter diode with gain is available, as reported in Sollner et al., "Resonant Tunneling Through Quantum Wells at Frequency up to 2.5 THz," 43 Applied Physics Letters 588 (1983). (However, this article used potential wells in which only one momentum component was discrete as discussed above.) Other background reference which set forth generally known physics of resonant tunneling are Chang et al., "Resonant Tunneling in Semiconductor Double Barriers," 24 Applied Physics Letters 593 (1974); Tsu et al., "Nonlinear Optical Response of Conduction Electrons in a Super Lattice," 19 Applied Physics Letters 246 (1971); Lebwohl et al., "Electrical Transport Properties in a Super Lattice," 41 Journal of Applied Physics 2664 (1970); and Vojak et al., "Low-temperature operation of Multiple Quantum-Well Al.sub.x Ga.sub.1-x As-GaAs P-n Hetero Structure Lasers Grown by a Metal Organic Chemical Vapor Diposition," 50 Journal of Applied Physics 5830 (1979). These five references are hereby incorporated by reference. (It should be noted that portions of the foregoing discussion merely reflect generally known physics, as reflected in these articles and pressumably elsewhere, but other portions of the foregoing discussion are not generally known and do not reflect any understanding available in the prior art.)

However, the prior art has taught potential wells which are quantized only in one dimension, which implies relaxed constraints on the selection rules for elastic tunneling. The preferred embodiments of the present invention have more stringent selection rules, and should (because all 3 dimensions are quantized) have dramatically more gain than the 1-D quantized devices. This invention is significantly different from the Esaki tunnel diode or 2-dimensional electron gas structures in that all three dimensions are quantized here, which imposes a constraint on the tunneling conditions much different than other structures; that is, the momentum constraint significantly depresses other than the desired elastic resonant tunneling.

The foregoing has supposed that only a few quantum levels are found in a well, but this is not correct for the most convenient well dimensions. A more realistic energy diagram of the levels in such a structure wherein 1000 angstrom GaAs wells are incorporated in an AlGaAs lattice would be as shown in FIG. 5. Note that, in the familiar statics of the solution to the particle in a box problem, the successively higher energy levels are spaced progressively closer together. This means that, even when the bias voltage is such that the lowest few levels between the two wells do not line up, some of the higher lying levels are likely to. However, this is not a major problem, since the higher lying levels will typically be depopulated because of the temperature constraint mentioned previously. That is, the lifetime for relaxation from a higher lying state to an empty lower state will typically be much shorter than the typical time for tunneling. Thus, after a lower level has been depleted by tunneling, a higher level which has been excited in any fashion will tend to relax to the depleted lower level much faster than it will tunnel. However, this assumes that empty lower levels exist below the higher level from which tunneling is possible. This imposes a constraint on the input contact, which will now be discussed.

FIG. 6 shows the energy diagrams for a system of two coupled wells 10 and 12 plus input and output contacts 14 and 16. Note that the input and output contacts are doped, although the wells and the areas between them are preferably not. Note also that two important limitations on the well size arise from the necessities of making input contact and output contact. First, the input contact will fill all levels of the first well 10 by tunneling, up to an energy approximately equal to the Fermi level of the electrons in the doped semiconductor which provides the input contact. This means that none of the levels thus still filled up must line up with levels in the second well when tunneling is not desired. That is, if the wells are too large, they will have discrete energy states at the bottom of the well but will include densely spaced states below the Fermi level of the input contact. This means that these densely spaced states will be filled, and therefore resonant tunneling current will be seen if any of these dense states line up with states in the second well. This means that the current gain of the device will be greatly reduced. Second, all levels in the second well which are above the Fermi level of the output contact will equilibrate with the output contact, i.e. will essentially always remain filled. This is not itself a problem, since electrons can tunnel from the higher lying energy states in the second well into the continuum of states which exists in the (large) output contact, but if any level in the first well lines up with one of these filled levels in the second well, that level in the first well will also remain filled. Note that the input and output contacts are preferably both degenerately doped n-type.

The physical well shapes have been described as having perfectly sharp boundaries, but this is not quite realistic. That is, in good quality MBE material, the transitions will typically be smooth enough that the potential profile looks more precisely like that drawn in FIG. 7. This is actually advantageous, since the energy levels will tend to be more nearly equal spaced. That is, where the energy level spacings are more nearly equal, there is a wider range of bias conditions wherein a large number of the lower lying energy levels will not line up.

Of course, for the ultimately preferable small well dimensions, e.g. 125 angstroms, the number of states in each well will be small, e.g. 4 states per well. With such a small number of states, there will be bias conditions under which no actual line ups exist.

Each tunneling transition described above is a transition of only a limited number of electrons for each pair of coincidental states. That is, each of the discrete energy levels in the quantum well can be populated by only a certain definite number of electrons. In the example discussed above, wherein the energy well has the approximate physical shape of a cube, the lowest lying level can be populated by only two electrons, and no more. The next higher energy level can be populated by only six electrons, and no more. The third energy level can be populated by only 12 electrons, and no more. Most of the higher-lying levels can also be populated by only 12, although some may have a higher maximum occupancy because of accidental degeneracies. Thus, it is important to note that a carrier cannot tunnel into even an allowable energy level unless that allowable energy level is not completely populated. The multiple states at each allowable energy level are distinguished by other quantum numbers. That is, for example, the six electrons in a second energy level can have one of two possible states of spin, and can have one of three possible momentum vector directions. However, this distinction among isoenergetic states is relatively unimportant for understanding the present invention.

Thus, each tunneling transition can transport up to a dozen carriers for each pair of lined-up wells. More than one pair of wells may be lined up at the same time. Moreover, many pairs of wells may be operated in parallel. Moreover, the transit time for tunnelling can be extremely small, less than a pico second. Thus, although only a few electrons are translated in each tunneling event, a reasonable current density can be achieved nevertheless.

Thus, a basic family of embodiments is structures, as described above, wherein two quantized wells separate an input contact from an output contact. However, further aspect of the present invention provide numerous other kinds of innovative device structures.

For example, a three terminal device according to the present invention is shown in a plan view in FIG. 8. A first quantum dot 202 is coupled to a second quantum dot 204, which is coupled to an output contact 210. The dimensions of the quantum dots 202 and 204 are selected as discussed above for quantum wells, but the output contact 210 is made sufficiently large that a quasi-continuum of states is available. The quantum well 202 is coupled from beneath to an electrode 206, and the quantum well 204 is coupled from beneath an electrode 208. These are preferably degenerately doped semiconductor regions, or may be metal lines, but in any case provide the long-distance routing necessary for formation of conventional electronic circuits.

In the presently preferred version of this embodiment, the quantum wells 202 and 204 have only 2 components of momentum discretely quantized, since they are directly connected to their respective electrodes. That is, the electrodes 206 and 208 can be, for example, tungsten, with a thin layer of a conventional barrier metallization optionally provided on top. The GaAs of quantum wells 202 and 204 are formed directly on top of this conductor. Preferably the electrodes 206 and 208 are n+ GaAs. Optionally, a thin barrier of AlGaAs can be provided beneath each of the quantum wells 202 or 204 and above the respective contact 206 or 208. This barrier is sufficiently thin that it is readily tunnelled through, and therefore does not prevent DC coupling of each quantum well to its respective electrode, but even this thin a barrier would be sufficiently small to provide sufficient quantization of all 3 parameters of momentum within each of the wells 202 and 204, and thereby increase the relative resonant tunneling gain at the expense of a small increase in processing complexity and small decrease in overall current.

A larger scale version of essentially this structure is shown in FIG. 9. This 3-terminal quantum well device can be configured with multiple chains of quantum well pairs 202, 204 in parallel, for greater current flow. Note that electrode 206 can be thought of as acting as a source, electrode 208 can be thought of as a gate electrode, and electrode 210 can be thought of as a drain electrode. Pattern 213 can be used to define the well locations 202 and 204. FIG. 10 shows a cross section of this structure, including ground plane 211.

A further variation of this structure is shown in FIG. 11. Note that additional electrodes 208 prime are used to provide longer chains of wells 202, 204 prime, 204 prime, etc., wherein resonant tunneling will occur only if the voltages on all f the electrodes 206 and 208 prime jointly satisfy one single condition (or some one of a small set of conditions). That is, FIG. 12 shows a sample set of electrode bias conditions wherein resonant tunneling will not occur, and FIG. 13 shows a different set of bias conditions wherein resonant tunneling will occur.

This multiple-gate device is particularly useful for a read only memory.

In a read only memory (ROM) embodiment, information is hard-programmed simply by changing the degree of electrical coupling of a column line to underlying quantum wells. A sample of this embodiment is shown in FIG. 14. A particular advantage of this embodiment is that the patterning of the metal lines need not be exactly aligned to the pattern of the underlying quantum wells. That is, if the pitch of the metal lines can be made twice or more that of the quantum wells, and the ROM will still function.

In the sample embodiment shown, column lines 302, 304, 306, etc. are overlying metal lines. Column line 302 is electrically coupled to row 310 of quantum wells, but not coupled (or less well coupled) to row 312 of quantum wells. This differential coupling can be accomplished by holes cut in a field plate, or by a dielectric patterned in multiple thicknesses. A sample mode of operation of this structure is as follows: A background potential is defined for every column (i.e., all columns fixed at ground) such that resonant tunneling occurs through each row of quantum devices 310, 312, etc. When it is desired to read out a column of cells, the column line 302 for that column is changed to some different voltage. This different voltage will perturb resonant tunneling in any row to which that column line is electrically coupled, and thereby disrupt resonant tunneling in that row. In rows to which this column is not electrically coupled resonant tunneling will not be disrupted. Thus, by monitoring the current in a row, the information hard-programmed into the intersection of the addressed column and the read-out row will be detected.

A sample process for fabricating quantum well devices according to the present invention will now be described. In particular, fabrication of 3 terminal devices, as discussed above, will be used as an example.

The beginning material is a semi-insulating GaAs substrate with 2 epitaxial layers. The substrate is preferably chromium doped, e.g. to 10.sup.15 per cubic centimeter, although this is not necessary. The first epitaxial layer is n+ GaAs. This layer will provide connections, and is therefore fairly thick and of a fairly high conductivity, e.g. 5000 angstroms thick and doped to 10.sup.18 per cubic centimeter or more n type. On top of this is deposited the thin lightly doped n-type layer which will patterned to form the actual quantum wells. This layer is doped, e.g., about 10.sup.16 per cubic centimeter n-type, and, in a sample embodiment, is 150 angstroms thick. (The light doping is used merely so that some carriers are available. Heavier doping would increase inelastic tunnelling.) FIG. 21 shows an initial structure, having epitaxial layers 404 and 406 atop substrate 402. Optionally, as discussed above, an extremely thin layer of AlGaAs could be interposed between layers 404 and 406. This structure is preferably fab