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Emulation with display update trapping
   
Document Number
US Patent 4920481
Issued Date
April 24, 1990
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Abstract
An emulating data processor includes a host system and an emulating processor with outputs to and inputs from the host system. The emulating processor executes sequences of instructions executable by a PC being emulated, but a host processor independently executes sequences of its instructions which are different from PC instructions. Circuitry monitors the emulating processor outputs and provides information to the host system so that it can emulate the environment of the PC CPU, emulating both memory and I/O devices. The memory accesses of the emulating processor are mapped into the host system memory, so that the host processor is protected from defective PC software on the emulating processor. The display updates of the emulating processor are detected and provide information for the host processor in updating a part of its display which provides the information a PC display would provide simultaneously with the display characteristic of the host system. An input/output processor handles I/O operation requests of the emulating processor, using the host system I/O devices to emulate some of the PC I/O devices. The host system emulates the environment of the emulating processor while emulating the user interface of the PC.
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Emulation with display update trapping - US Patent 4920481 Drawing
Drawing from US Patent 4920481
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Number of Claims:
15
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Owner
Xerox Corporation (Stamford, CT)
Published
April 24, 1990
Application Number
07/130,369
Filed
December 8, 1987
US Classification
703/26  
Int'l Classification
G06F   13/10   (20060101)  
Examiner
Attorney/Law Firm
Parent Case
This is a division of application Ser. No. 856,526, filed Apr. 28, 1986.
USPTO Field of Search
364/2MSFile   364/9MSFile  
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Description
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