High speed digital path for successive approximation analog-to-digital converters wherein the successive approximation registers and the switch drivers are combined in set-reset latches having the switch drivers as latch outputs. This reduces the time of each successive approximation by reducing the ripple through time of each stage, thereby increasing the speed of operation of the analog-to-digital converters. As an option, the set-reset latches having the switch drivers as latch outputs may also incorporate level shifting to combine each stage of the successive approximation register, associated switch drivers and level shifters into a single circuit for each stage of the analog-to-digital converter. Various embodiments are disclosed.

The present invention relates generally to a detection device for a spectrophotometer system, and in particular to a light detection device with an analogue input and a digital output. The object of the present invention is to provide a more accurate detection device, which requires substantially less space for accommodating the detection device in a spectrophotometer. This object is solved by using a successive approximation A/D converter (16) which has internal sample and hold circuits, and which heretofore has been used in the audio industry. This will increase the accuracy of the detection device and make it more resistant against disturbances. It will also decrease the space required for such detection device, down to one third compared to conventional detection devices.

A track and hold circuit for use with an analog signal quantizer, comprising a multiple of four superconductor-insulator-superconductor (SIS) junctions arranged in a bridge. A storage inductance is connected to opposite nodes of the bridge, with an analog signal input being orthogonally injected into the bridge. The SIS junctions are magnetically suppressed from reaching a superconducting, zero-voltage state, limiting switching of the SIS junctions between a subgap voltage, high differential resistive behavior and a low differential resistive behavior exhibited when a gap voltage is attained. Preferably, each SIS junction includes a magnet that suppresses the superconductivity. Alternatively, a control wire may be used to provide a magnetic field to suppress superconductivity.

In an analog-to-digital converter, a circuit for sampling an analog input signal that has a signal range above and below a ground reference voltage includes a divider circuit scaling the analog input signal down to a lower magnitude such that all values of the scaled analog input signal are above the ground reference voltage. The scaled down analog input signal is applied to a source electrode of a sampling MOSFET. A body-to-source voltage of the sampling MOSFET is maintained at approximately zero volts by applying the scaled down signal to a non-inverting input of a first operational amplifier and applying an output voltage produced by the first operational amplifier to its inverting input and a body electrode of the sampling MOSFET. A gate-to-source voltage of the sampling MOSFET is maintained at approximately 1.5 volts by applying the scaled down analog input signal to a non-inverting input of a second operational amplifier, an output of which is applied to a gate electrode of the sampling MOSFET and to a gate electrode of a first MOSFET. A constant current is forced through the first MOSFET, producing therein a constant gate-to-source voltage independent of variation in the analog input signal. The resulting voltage on the source of the first MOSFET is applied to an inverting input of the second operational amplifier, so the constant gate-to-source voltage of the first MOSFET is imposed between the gate and source of the sampling MOSFET.

An A/D conversion reference level is applied to an input of a variable offset comparator (i.e. VOC). A binary number that corresponds to the A/D conversion reference level is determined by changing a binary variable that is applied to vary the offset of the VOC until the VOC output changes states. The same procedure is applied to determine corresponding reference, binary numbers for all of the other A/D conversion reference levels. A successive approximation procedure (binary search) is then performed for a reference window in which an input analog level (to be converted into digital form) would fall, by successively applying the reference binary numbers to vary the VOC offset.