A method for making files compatible between different computers having different binary structures while using the same operating system by keeping all files in a standardized canonical order when they move to or from external data storage or communication means. The method includes converting all binary data accessed from a file or communications channel from the canonical order to the natural order of the host computer before using the binary data in the host computer and converting all binary data which is to be sent to a file or communications channel from the natural order of the host computer to the canonical order before sending the binary data.
This application is a continuation, of application Ser. No. 934,341, filed 11/24/86, which is itself a continuation-in-part of application Ser. No. 391,223, filed June 23, 1982, now abandoned.
Traditionally, it has been difficult to share data among diverse computer applications and platforms because of underlying differences in data formats. Although the meaning or purpose of the data may be similar or identical (for example, two appointments entered using separate computer applications), the differences in data formats required by the various computer applications and platforms renders such sharing difficult. A method is disclosed for the translation of dissimilarly-formatted data between disparate computer applications and platforms. The method also provides for the dynamic reconciliation of conflicts in the data (for example, two appointments scheduled at the same time) based on both the content of the data and on specific preferences indicated by the user of the translation facility. First, the data is translated to a common format based on the user-specified mapping of data fields (identifying handheld and desktop fields to be translated) and considering the characteristics of the handheld or desktop computer application. Then, if the specific data item (such as an appointment, telephone book entry, or memo entry) already exists on the desktop computer application or platform, the user is optionally notified of the conflict and given the opportunity to replace the existing data, ignore the incoming data, or modify the incoming data. The criteria for determining the existence of conflicts is disclosed for updating schedule information and keyed databases.
A byte swapping circuit which selectively orders the bytes of a 16 or 32 bit word to enable proper transmission of data between an AT computer and a VMEbus. The byte swapping circuit generally includes first, second, third and fourth groups of buffers which are disposed in parallel along an internal bus of the circuit. The first group of buffers swaps the bytes of a word having bytes A, B, C and D into the order D, C, B and A. The second group of buffers transmits a word having bytes A, B, C and D in the same order without any byte swapping. The third group of buffers swaps the bytes A and B of a 16 bit word into the order B, A. The fourth group of buffers shifts the C and D bytes of a 32 bit word, which would normally occupy bit positions 16-31, into bit positions 0-15. A control register selectively enables one group of buffers at a time to effect the needed byte swapping.
A method and apparatus for translating source code written in one computer language to source code written in another language wherein translated static fragments are generated in the face of textual inconsistencies. Exactly one target language definition of each source language static fragment is generated and the differences are encapsulated in new parameters.
A method and system are disclosed for efficiently translating data from one known data sequencing arrangement to an alternative sequencing arrangement. The method consists of the steps of generating a source sequence signal which identifies the ordering of units within the source sequence, generating a destination sequence signal which identifies the ordering of units within the destination sequence, and combining the source signal and destination signal to produce a permutation signal which defines the relationship between the source sequence and the destination sequence. Once the permutation signal has been defined, this permutation signal is applied to the source sequence to allow the reordering of the source sequence into the desired destination sequence. A reordering circuit is used to rearrange the source sequence units into the desired destination sequence units utilizing the permutation signal generated in the present invention. The reordering circuit consists of an array of ordered swap units which contain inputs for source sequence signals and permutation signals, and outputs which propagate destination sequences.
A method and apparatus for performing bi-endian byte and short accesses in a single endian microprocessor. The present invention is used in a microprocessor or in a microprocessor in a computer system. The present invention provides a single endian microprocessor that promotes sub-word accesses to word accesses with a means for manipulating the two least significant bits of the access address to point to the correct sub-word data returned during an access to bi-endian external memory. The method for manipulating the address bits is also used to allow a single endian data cache to operate with the bi-endian external memory. The two LSBs of the address are manipulated such that the pointer values are A1# and A0# for word promoted byte accesses or cacheable accesses. For word promoted short accesses or cacheable accesses, the pointer values are A1# and A0. The present invention offers increased flexibility in interfacing a single-endian microprocessor with bi-endian systems. The present invention provides easy interfacing without undue or overly complex modifications to existing circuits.
