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Method for writing data into an image repetition memory of a data display terminal
   
Document Number
US Patent 4970501
Issued Date
November 13, 1990
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Abstract
With a data display terminal having an electron beam tube, an image repetition memory serves for cyclically regenerating the display. With a change of the display, a complete overwriting can be necessary. However, the overwriting of the image repetition memory cannot interrupt the regeneration operation. The beam flyback times during an image cycle do not suffice in order to overwrite the entire image repetition memory. Therefore, data are written into the image repetition memory during a forward line scan and are simultaneously written into a line buffer designed as a clock interface. With this technique, an entire image repetition memory can be written during an image cycle.
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Method for writing data into an image repetition memory of a data display terminal - US Patent 4970501 Drawing
Drawing from US Patent 4970501
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Number of Claims:
1
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Owner
Siemens Aktiengesellschaft (Berlin and Munich,DE)
Published
November 13, 1990
Application Number
06/833,420
Filed
February 21, 1986
US Classification
345/560   345/531
Int'l Classification
G09G   5/22   (20060101)   G09G   1/16   (20060101)  
Assistant Examiner
Parent Case
This is a continuation, of application Ser. No. 418,437, filed Sept. 15, 1982, now abandoned.
Priority Data
Sep 30, 1981 [DE] 3138930
USPTO Field of Search
340/750   340/798   340/799  
Related Patents
5526025 - Method and apparatus for performing run length tagging for increased bandwidth in dynamic data repetitive memory systems - Owned by Chips and Technolgies, Inc. (San Jose, CA)

A method and apparatus for improving bandwidth of sequential access to a display data memory. Display data and tag information related to consecutive data repetitions are stored. No display memory access is needed to output data to the CRT during the time periods when data is being repeated, thus increasing display memory bandwidth. Display data from a location in display memory is stored in a latch, and is output from the latch until the tag information indicates no more data repetitions occur.

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Description
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