A recorder for recording and playing back information. The recorder is particularly useful in vehicles such as aircraft and space vehicles. The recorder has no moving parts and has a plurality of power levels. The recorder has the capability of detecting errors in its memory and to avoid using portions of the memory that have errors. The recorder has multiple channels that can be programmed for input or output use. On demand memory assignment capability permits maximum use of the memory array.
A semiconductor integrated circuit device comprises, on a semiconductor chip, a large-scale memory as a main memory, a controller for controlling at least inputting data from the outside of the chip to the large-scale memory, and outputting data from the large-scale memory to the outside of the chip, and a self-test circuit for testing the large-scale memory. The self-test circuit includes a rewritable EEPROM, into which a self-test sequence is written. The self-test circuit tests the large-scale memory in accordance with the self-test sequence written in the EEPROM.
A modular solid-state mass data storage device providing high-density, high-capacity storage of data employs a modular pipeline architecture in which a distributed array of controller/memory modules is arranged in parallel controller/memory channels on one or more controller/memory cards, each controller/memory channel having first and last controller/memory modules. The modular storage device also includes a data format module, and first and second busses connecting outputs of the data format module to inputs of each of the first and last controller/memory modules. The first bus also connects outputs of the last controller/memory module in each channel back to an input of the data format modules. The modular pipeline architecture allows the number of controller/memory modules in each channel to be easily configured to accommodate any required storage size, while the number of controller/memory channels can be configured to accommodate any required storage size and transfer rate, without increasing latency time. The modular pipeline architecture also greatly simplifies the complexity of the memory controllers, and high-density packaging of the controller/memory modules provides compact storage for large amounts of data. The mass data storage device may be used as a random access memory (RAM) disk or for any other application requiring high-density, high-capacity mass data storage devices.
A fault-tolerating memory system has a data memory with a large number (M+N) of data storage words each having a length greater than the length of user data to be stored in that word; the extra word length is used for at least an error-detecting-and-correcting (EDAC) code. The user data is stored in a smaller number (N) of the words, with the remaining number (M) of words being used to store a map of which portions, if any, of each word are not usable. The N words of user data storage can include S normal storage words and (N-S) spare words, each for use if one of the normal storage words has too many unusable portions. A portion of each word length can contain at least one spare word portion, to which a block of data can be moved if any bit of a like-sized portion of the normal storage word is unusable. The reliability of storage is greatly improved by extension of each word to add EDAC encoding and spare-bit portions, as well as by extension of depth to allow spare words to be present, along with high-reliability storage of word maps.
One or more small self-contained reentry breakup recorders are disposed within a spacecraft and each includes a sensor suite for collecting and recording collected and recorded sensory data during reentry breakup of the spacecraft, and includes a communications system for broadcasting the collected and recorded sensory data after breakup and before impact with the surface of the earth to a remote communication system for preserving the sensory data of the breakup as well as data relating to critical events occurring prior to breakup. An internal GPS receiver provides sensory positional data of the reentry and breakup positions.
In a read only memory protected against erasure in processor-controlled apparatus, the loading occurs via a wireless data transmission interface. The processor-controlled apparatus is a mobile apparatus in which a loader provided for loading the read only memory is installed. This loader controls the communication of the data transmission interface as well as the erasing and reprogramming of the read only memory. The processor control program or program parts thereof to be reloaded are requested by the processor-controlled apparatus in blocks from a reloading station which likewise has a wireless data transmission interface and are written into the read only memory. The individual program blocks are protected by check sums in the block-by-block transmission. After the end of the programming, the processor control program that has been reloaded is checked by length comparison and check sum comparison to ensure that the data transmission was error-free.
