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Vertical contour enhancement suppression circuit
   
Document Number
US Patent 4979024
Issued Date
December 18, 1990
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Abstract
In an arrangement wherein vertical contour enhancement is performed by subtracting a video signal between horizontal scanning lines and applying a white- or black-level signal before or after the contour (edge portion) of an image based on the result of the subtraction operation, the application of the black-level signal is selectively suppressed to diminish unattractive black borders. In another embodiment, application of the black-level signal to portions having a strong red-signal component is selectively suppressed, thereby diminishing unattractive black borders which appear at red portions of a display image. In still another embodiment, application of the black-level signal to portions where the level of an R-Y signal is high is selectively suppressed, thereby diminishing unattractive black borders which appear at red portions of a display image.
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Vertical contour enhancement suppression circuit - US Patent 4979024 Drawing
Drawing from US Patent 4979024
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Number of Claims:
3
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Owner
Published
December 18, 1990
Application Number
07/405,226
Filed
September 11, 1989
US Classification
348/253  
Int'l Classification
H04N   9/64   (20060101)   H04N   5/208   (20060101)  
Priority Data
Sep 19, 1988 [JP] 63-232217 Sep 19, 1988 [JP] 63-232218 Sep 19, 1988 [JP] 63-232219
USPTO Field of Search
358/37   358/96   358/162  
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Description
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