A digital PLL's stability and immunity to jitter are improved by deriving the correction to the state machine count from an average over several computations of the phase error. The PLL stability is improved by retaining all of the phase errors measured during a succession of plural phase measurement intervals. The plurality of phase errors thus obtained are averaged together, and the state machine internal count is corrected (updated) in accordance with this average, rather than according to an instantaneous phase error. As a result, the performance of the PLL is less susceptible to jitter-induced temporary excursions in the phase error, a significant advantage.

A direct digital synthesizer of the phase-accumulator type, constructed entirely of binary-radix digital hardware, generates signals with decimally-defined frequency resolution. The synthesizer is supplied with a clock signal which is also decimally-defined. The usual decimal-binary incompatibility problems of such a combination are overcome by the use of a phase accumulator which is partitioned into two segments. The first segment is assigned the most significant portion of the desired frequency, and the other segment is assigned the remaining portion of the desired frequency. The two segments have different arithmetic moduli. Typically, the modulus of the first segment is a power of two, while that of the second segment is an integer other than a power of two. A procedure is given for determining both the point of partition and the second arithmetic modulus.

A process for intramolecularly condensing a polyamic acid composition containing an NLO compound to form a polyimide host matrix composition containing as a guest the NLO compound, which process includes the step of uniformly heating the polyamic acid composition, in the absence of a solvent or diluent, to a temperature at which the intramolecular condensation will occur without thermal degradation of the NLO compound, so that the temperature differential within the polyamic acid is below that which will produce localized thermal degradation temperatures, until the intramolecular condensation of the polyamic acid composition to the polyimide host matrix composition is substantially complete. Polyimide host matrix compositions containing guest NLO compounds prepared by the inventive process are also disclosed, wherein the NLO compounds have external field-induced molecular alignments.

A method and apparatus for low power clock generation for high speed applications includes a divider for receiving a high frequency input signal and producing a low frequency input signal controlled to a high resolution. A numerically controlled oscillator (NCO) is coupled to the divider and receives a frequency word and the input signal and produces a phase advance command. The phase advance command is used to produce an output transition command. The output transition command is executed in a phase shifter in response to a phase advance/retard polarity input and a high frequency clock input signal. The phase shifter produces a low-frequency output clock signal.

Adaptive clock generator including a master clock. A control means detects the current operating mode and, in response, provides a corresponding integer output N. A programmable pulse generator provides an output clock signal comprising a "high" pulse having a predetermined width followed by a "low" pulse having a width of N master clock periods. A dithered clock signal may be provided when the control means provides an integer output N selected from a set of integer values. Preferably, N is selected in a random or pseudo-random manner.