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Computer and telephone apparatus with user friendly computer interface and enhanced integrity features    
United States Patent4991199   
Link to this pagehttp://www.wikipatents.com/4991199.html
Inventor(s)Parekh; Dilip J. (Los Angeles, CA); Samulon; Alfred S. (Malibu, CA); Takata; Melvin M. (Hermosa Beach, CA); Tucci; Morris L. (Van Nuys, CA); Vollmer; Jim R. (Encino, CA); Weiss; Lawrence D. (New York, NY); Caruthers; Douglas W. (Redondo Beach, CA); Inatomi; Charles T. (Los Angeles, CA); Kawan; Joseph C. (Hollywood, CA); Lee; Shan (Rowland Heights, CA); Marks; Harvey (Canoga Park, CA); Meguerdijian; Sarkis A. (Glendale, CA)
AbstractThe present invention relates to a programmable microcomputer or microprocessor device with associated memory designed to be operated in most circumstances through a standard telephone 12-key keypad input as augmented by four programmable function keys. The microcomputer device of the present invention, which includes the primary microprocessor operated in conjunction with other computer elements, including memory, has the overall appearance of a telephone. The primary microprocessor of the invention consists of a central processing unit and associated memory and includes enhanced integrity features.



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Drawing from US Patent 4991199
Computer and telephone apparatus with user friendly computer interface

     and enhanced integrity features - US Patent 4991199 Drawing
Computer and telephone apparatus with user friendly computer interface and enhanced integrity features
Inventor     Parekh; Dilip J. (Los Angeles, CA); Samulon; Alfred S. (Malibu, CA); Takata; Melvin M. (Hermosa Beach, CA); Tucci; Morris L. (Van Nuys, CA); Vollmer; Jim R. (Encino, CA); Weiss; Lawrence D. (New York, NY); Caruthers; Douglas W. (Redondo Beach, CA); Inatomi; Charles T. (Los Angeles, CA); Kawan; Joseph C. (Hollywood, CA); Lee; Shan (Rowland Heights, CA); Marks; Harvey (Canoga Park, CA); Meguerdijian; Sarkis A. (Glendale, CA)
Owner/Assignee     Transaction Technology, Inc. (Santa Monica, CA)
Patent assignment
All assignments
Publication Date     February 5, 1991
Application Number     07/190,440
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     May 5, 1988
US Classification     379/93.01 379/93.17 379/110.01
Int'l Classification     H04M 011/00 G06F 011/00
Examiner     Anderson; Lawrence E.
Assistant Examiner    
Attorney/Law Firm     Pennie & Edmonds
Address
Parent Case    
Priority Data    
USPTO Field of Search     379/110 379/96 379/97 379/98 379/201 364/200 MS File 364/900 MS File
Patent Tags     computer telephone user friendly computer interface enhanced integrity features
   
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 References Submit all comments and votes
 
*references marked with an asterisk below are user-added references
 U.S. References
 
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ReferenceRelevancyCommentsReferenceRelevancyComments
4885764
Miwa
379/70
Dec,1989

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4860342
Danner
379/93.28
Aug,1989

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4748656
Gibbs
379/93.05
May,1988

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Dahlquist
379/247
May,1988

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Curtin
379/93.18
Apr,1988

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Maser
200/314
Jul,1987

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4674115
Kaleita
379/216.01
Jun,1987

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Sullivan
379/93.19
Apr,1987

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Hasegawa
200/5A
Apr,1987

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Franklin
200/5A
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Laube
379/93.19
Mar,1987

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Furuta
714/45
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Carson
379/207.06
Dec,1986

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Pommer, II
379/354
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Smith
379/93.18
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Glaser
379/112.02
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Read
379/93.17
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Nakayama
379/93.18
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Costello
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Kessler
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Cottrell
379/214.01
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Samuel
379/114.26
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May
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Walser
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Blades
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Cecil
379/93.05
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Eventoff
200/5A
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Anderson
379/93.17
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Densmore
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Wilson
379/110.01
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Larson
200/5A
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Hoff
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Bender
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Irwin
707/3
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Faggin
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Market Size
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$5B - $10B
$2B - $5B
$500M - $2B
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$10M - $100M
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$0
 
$0   $2.5B   $5B   $7.5B   $10B
Market Share
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75% - 100%
50% - 74.99%
25% - 49.99%
10 - 24.99%
5 - 9.99%
2 - 4.99%
1 - 1.99%
< 1%
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0.0%
 
0%   25%   50%   75%   100%
Reasonable Royalty
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75% - 100%
50% - 74.99%
25% - 49.99%
10 - 24.99%
5 - 9.99%
2 - 4.99%
1 - 1.99%
< 1%
[No votes]
0.0%
 
0%   25%   50%   75%   100%
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 Technical Review Submit all comments and votes
 Claims Submit all comments and votes
 


What we claim is:

1. A microcomputer with simplified user interface comprising a microprocessor computing unit and associated memory;

said microprocessor computing unit and said memory being mounted in a housing configured as a conventional telephone unit including an upper mounting structure and a base structure, a telephone handset mounted in a craddle on said upper mounting structure, a conventional twelve-key telephone keypad mounted on said upper mounting structure of said housing and a keyboard input device mounted in a concealed position within said base structure of said housing and movable to an open position for use by the operator of the microcomputer;

said microprocessor computing unit cooperating with and being responsive to instructions maintained in said memory and other instructions and data inputs received through a keyboard/keypad processor and a modem to perform computing and control functions, said keyboard/keypad processor processing data inputs for said microprocessor computing unit received from said conventional telephone keypad, said keyboard input device and telephone electronics in said housing:

said instructions maintained in said memory of said microprocessor computing unit being received and updated through said modem from an external host computer over a telephone line, said keyboard/keypad processor also functioning to detect and evaluate telephone tone signals relating to telephone events received by said telephone electronics from the telephone line for said microprocessor computing unit;

said keyboard/keypad processor functioning to provide serial data inputs from said conventional telephone keypad, said keyboard input device and said telephone electronics to said microprocessor computing unit through a serial interface, said serial interface between said keyboard/keypad processor and said microprocessing computing unit being the data interface between the operator of said microcomputer and said microprocessor computing unit;

said conventional twelve-key telephone keypad also providing output to a telephone dialer;

said telephone electronics mounted in said housing being responsive to said telephone dialer when a switch means disconnects said microprocessor computing unit from said telephone electronics; and

said switch means also automatically connecting said telephone electronics to telephone line power to provide standard telephone functioning in the absence of power to or input from said microprocessor computing unit and said memory.

2. A microcomputer as claimed in claim 1 wherein the microprocessor computing unit is responsive to inputs provided from the telephone electronics mounted in the microcomputer housing and provides control of said telephone electronics and the associated memory of said microprocessor computing unit incorporates both volatile and non-volatile elements so that said microprocessor computing unit and said associated memory of said microprocessor computing unit may be programmed as a general purpose computer.

3. A microcomputer as claimed in claim 1 further including a lapse timer means reset by output from the microprocessor computing unit, said lapse timer means providing an interrupt to said microprocessor computing unit unless reset by said microprocessor computing unit within a first predetermined time interval, said microprocessor computing unit being rebooted and removing power from said telephone electronics and said lapse timer means being disabled unless said lapse timer means is reset within a second predetermined time.

4. A microcomputer as claimed in claim 1 further including an off-hook detector means for detecting an off-hook condition of the handset mounted on the housing for said microcomputer, an off-hook timer means responsive to said off-hook detector means and said microprocessor computing unit to reboot said microprocessor computing unit and remove power from the telephone electronics if said off-hook timer means is not reset by said microprocessor computing unit within a predetermined time interval.

5. A microcomputer as claimed in claim 2 further including a parity check means for at least a part of the memory in the microprocessor computing unit of said microprocessor and logic means responsive to said parity check means to provide an interrupt to said microprocessor computing unit when said parity check means provides an error detection.

6. A microcomputer as claimed in claim 1 further including an output device for the conventional twelve-key telephone keypad for providing simultaneous outputs to a telephone dialer and the keyboard/keypad processor through a dual output element mounted below said conventional telephone keypad.

7. A microcomputer as claimed in claim 2 wherein the associated memory of the microprocessor computing unit includes a removable memory element configured for permanent data storage.
 Description Submit all comments and votes
 


BACKGROUND OF THE INVENTION

FIELD OF INVENTION

The present invention relates to a programmable microcomputer or microprocessor device with associated memory designed to be operated in most circumstances through a standard telephone 12-key keypad input as augmented by four programmable function keys. The microcomputer device of the present invention, which includes the primary microprocessor operated in conjunction with other computer elements, including memory, has the overall appearance of a telephone. The primary microprocessor of the invention consists of a central processing unit and associated memory and includes enhanced integrity features.

The microcomputer device also includes standard telephone apparatus which may be operated either separately or in conjunction with the primary microprocessor. The telephone elements of the device are operated from a conventional 12-key telephone keypad through the telephone electronics of the device and perform normal telephone functions. The telephone electronics may also provide inputs through a keyboard microprocessor to the central processing unit of the primary microprocessor and its extensive memory. An additional 52-key keyboard in the QWERTY format, normally hidden in the telephone housing, provides additional inputs to the central processing unit of the primary microprocessor through the telephone electronics. Inputs to the primary microprocessor are also provided by four programmable function keys.

The primary microprocessor in conjunction with a multipurpose graphics display controller provides an output to a small cathode-ray tube display device mounted in the housing of the device for viewing by the operator. The primary microprocessor is also connected to a modem which permits the transfer of data from the primary microprocessor over the telephone line.

The 12-key telephone keypad includes a split-pill output feature which provides isolated electrical signal outputs both to the primary microprocessor and to the telephone line through a telephone dialer. The primary microprocessor has the capability of deactivating, under various conditions, the output of the telephone dialer to the telephone line so that data input by the user over the 12-key keypad does not interfere with standard telephone operations. One function key is used to change the primary microprocessor's control over the telephone from a monitoring mode to a controlling mode. The feature provides computer enhanced telephone operation before or during telephone connection to the network. The application, in response to this function key, typically provides a menu of microprocessor services, eliminates power to the telephone dialer (preventing unwanted dial tones from being transmitted to the network) and provides for transition of the telephone network to computer control.

The invention's support circuitry provides a number of integrity features. These include the following error detection or failure prevention features: (1) a determination as to whether the microprocessor software is functioning properly when the telephone is taken off-hook, (2) a watchdog timer to ensure that the computer software is not malfunctioning, (3) a parity check for the microprocessor's 512K byte volatile random access memory (RAM), (4) battery power for the microprocessor's l92K byte non-volatile RAM, (5) circuitry to provide write protection for that memory, (6) power failure detection which interrupts the microprocessor when certain voltage thresholds are crossed, (7) battery low warning and (8) independent operation of the telephone electronics from the telephone line power so that when the A/C power fails, the telephone will continue to operate.

The integrity features provide the following protections. The telephone hardware will force the telephone electronics into a manual mode when an off-hook sensor/timer senses a malfunction. A malfunction indication will appear as a service light on the telephone console. The device includes its own diagnostic elements which provide a power-on self test. An independent power failure detection element provides an indication to the primary microprocessor that it is not properly powered. Detection of power failure provides an indication to the microprocessor software that certain power limits have been crossed, permits the software to clean up and disconnect the primary microprocessor when such limits are exceeded, and permits continued use of the standard telephone features of the device. The power failure detection feature of the microprocessor provide adequate thresholds to ensure the microprocessor will run without problems through brown out conditions.

The device of this invention includes a separate microprocessor to organize keyboard inputs to the primary microprocessor. The keyboard processing unit organizes real time data to the primary microprocessor presented by either keypad, keyboard or related elements of the telephone electronics. The keyboard processing unit also includes tone detecting hardware and software which can distinguish (1) busy or fast busy, (2) call-waiting, (3) ringing and (4) dial tone and passes this information to the primary microprocessor.

BACKGROUND ART

It is well-known in the art that microprocessors can be used for telecommunications applications as shown by Subhash Bal, "New Generation Microprocessor for Telecommunication Applications." Proceedings 1980-International Conference on Communications, Seattle, Washington, (June 8-12, 1980) pages 11.5.1-11.5.4. Additionally, microprocessors have been used as control apparatus for a number of communication system administration functions and in switching systems as shown in U.S. Pat. No. 4,580,011 to Robert E. Glazer, issued Apr. 1, 1986 and U.S. Pat. No. 4,629,832 to Robert A. Carson et al, issued Dec. 6, 1986. It is known that, to increase system integrity, the administration functions in a telephone network can be controlled by a microprocessor to facilitate the interaction of a private branch exchange or similar telephone network with a telephone central office. It is also known that telephone protection functions can be performed through a microprocessor. Operation of computers with simple interfaces and the connection of several computers to a host computer in a network through modems is also known in the prior art. However, the prior art does not teach the use of a microprocessor controlled primarily through a 12-key keypad of a normal telephone device where the keypad also operates a stand-alone telephone unit and additionally provides user interface to the microprocessor.

SUMMARY OF INVENTION

The microcomputer with simplified user interface of the present invention is incorporated in a small desk-top housing which has the general appearance of a s