Disclosed herein is a chip type directional coupler comprising a laminated structure of a plurality of dielectric substrates, each dielectric substrate having a pair of stripline electrodes nonlinearly formed on its one major surface in parallel with each other, and a plurality of ground electrode substrates, each ground electrode substrate being provided with a ground electrode on its one major surface, the dielectric and ground electrode substrates being so alternately stacked that uppermost and lowermost layers are defined by the ground electrodes, and a plurality of external electrodes which are formed on side surfaces of the laminated structure. The pairs of stripline electrodes formed on the respective dielectric substrates are connected in series with each other through the intervening dielectric substrates, to define stripline electrodes of quarter wavelengths in overall length. Both ends of the quarter-wavelength stripline electrodes and the ground electrodes are electrically connected to different ones of the external electrodes.

A directional coupler has a multi-layered low temperature co-fired ceramic substrate. A circuit line is located on one of the layers and is connected to an input port and an output port. Another circuit line is located on a different layer and is connected to a forward coupled port and a reverse coupled port. The circuit lines are located close to each other such that they are electromagnetically coupled. Ground planes are located on the top and bottom surfaces of the substrate.

Pre-fired ceramic substrates are elected according to the desired electrical performance of the filter. If necessary for enhanced performance, the surfaces of the substrate may be lapped to assure that their top and bottom surfaces are parallel and their surface finish is smooth. The top surface of a lower layer is coated with a conductive film using thick film techniques then patterned to define the filter trace pattern. For precise dimensional control, photolithographic techniques may be used. The bottom and the sides of the lower layer are coated with the same conductive film. A seal glass which has a coefficient of thermal expansion which is matched as closely as possible to that of the ceramic substrate is screen printed onto the top surface of the lower layer. The top of the upper layer is screen printed with the conductive film and the bottom of the upper layer is coated with the seal glass. The upper and lower layers are bonded together by clamping them together and firing the seal glass. The sides of the assembly are then coated with a conductive film to provide groundplane connection.

A delay line device having first and second substrates. The first substrate has a signal line centrally formed on one of main surfaces of a ceramic substrate, bonding electrodes formed in a peripheral portion of the main surface and a ground electrode formed over substantially the entire region of the other main surface thereof. The second substrate has bonding electrodes formed on one of main surfaces of the ceramic substrate identical in thickness and material to the ceramic substrate and a ground electrode formed over substantially the entire region of the other main surface thereof. The delay line device is formed by superimposing the first and second substrates on one another so that the bonding electrodes of the first substrate face those of the second substrate and bonding the bonding electrodes of both substrates to one another. Such delay line devices can be manufactured using mother substrates and mother dummy substrates.

A coplanar waveguide directional coupler (116,134) may be formed on a surface (102a,106a) of a substrate (102) and/or a microwave monolithic integrated circuit (MMIC) chip (106), with the MMIC chip (106) being flip-chip mounted on the substrate (102). The directional coupler (116,134) includes an input port (114,136), a coupled port (126,154), a direct port (122,152) and an isolation port (1118,150) formed on the surface (102a,106a). At least two parallel first striplines (24,26) are formed on the surface (102a,106a), having first ends connected to the input port (114,136) and second ends connected to the direct port (122,152). At least two parallel second striplines (36,38) are formed on the surface (102a,106a), having first ends connected to the coupled port (126,154) and second ends connected to the isolation port (118,150). The second striplines (36,38) are interdigitated with the first striplines (24,26) to provide tight signal coupling therebetween. First and second main ground planes (52,54) are formed on the surface (102a,106a) and extend parallel to and on opposite respective sides of the interdigitated first and second striplines (24,26,36,38). The input port (114,136), coupled port (126,154), direct port (122,152) and isolation port (118,150) each include a coplanar waveguide section having a center conductor (14a,16a,18a,20a) connected to the ends of the respective striplines (24,26,36,38), and first and second ground planes (14b,14c), (16c,16c), (18b,18c, (20b,20c) which extend parallel to the center conductor (14a,16a,18a,20a) on opposite sides thereof and are connected in circuit to the main ground planes (52,54).