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Claims  |
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We claim:
1. A biomedical mapping simulator for generating a pattern of simulated
electrophysiological impulses corresponding to a two-dimensional timing
map for application to an electrophysiological impulse display device,
comprising:
(a) programmable means for generating a succession of digital signals,
(b) circuit means for receiving said succession of digital signals and in
response generating a succession of output signals on predetermined
outputs thereof, said outputs being arranged to form a two-dimensional
array, and
(c) means for shaping said output signals to resemble said
electrophysiological impulses and applying the shaped output signals to
said display device, said shaped output signals representing isochronal
lines on said timing map.
2. An apparatus as defined in claim 1, wherein said programmable means
further comprises a microprocessor programmed for generating said digital
signals.
3. An apparatus as defined in claim 2, wherein said circuit means further
comprises:
(a) a plurality of latches for receiving and latching said succession of
digital signals, and
(b) means for enabling respective ones of said plurality of latches
according to a predetermined sequence for generating said succession of
output signals.
4. An apparatus as defined in claim 3, wherein respective ones of said
latches correspond to respective rows in said array and successive outputs
of each said latches correspond to respective column elements in
corresponding ones of said rows.
5. An apparatus as defined in claim 3, wherein said means for enabling
further comprises a decoder for receiving predetermined additional digital
signals from said programmable means and in response generating
predetermined select signals for enabling said respective ones of said
plurality of latches.
6. An apparatus as defined in claim 1, wherein said means for shaping
further comprises a plurality of RC networks for filtering said output
signals and in response generating respective bipolar pulses resembling
said electrophysiological impulses.
7. An apparatus as defined in claim 1, further comprising means for
applying operating power to said programmable means and said circuit means
for a predetermined length of time sufficient to generate said output
signals, and thereafter ceasing application of said operating power to
said programmable means and said circuit means.
8. An apparatus as defined in claim 1, wherein said circuit means further
comprises seven 8-bit latches for generating said output signals
associated with seven respective rows of said array, each of said rows
comprising eight elements corresponding to respective outputs of said
latches.
9. A method for generating a pattern of simulated electrophysiological
impulses corresponding to a two-dimensional timing map, comprising the
steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array, and
(c) shaping said digital signals to resemble electrophysiological impulses,
said shaped digital signals representing isochronal lines on said timing
map.
10. A method as defined in claim 9, further comprising the step of loading
a sequence of logic high digital signals into each bit location of each of
said latches, whereby a pattern of logic high impulses is generated within
said array.
11. A method as defined in claim 9, further comprising the step of
arranging said latches into seven rows of eight bit locations each.
12. A method for generating a series of simulated electrophysiological
impulses in two dimensions, comprising the steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array,
(c) shaping said digital signals to resemble electrophysiological impulses,
whereby said sequences of digital signals form a two-dimensional pattern
of said simulated electrophysiological impulses,
(d) loading a sequence of logic high digital signals into a least
significant bit location of each of said latches, and loading a sequence
of logic low digital signals into remaining ones of said bit locations,
and
(e) successively loading said sequence of logic high digital signals into
successively more significant bit location of each of said latches, and
loading said sequence of logic low digital signals into the remaining ones
of bit locations, whereby a moving vertical pattern of said impulses is
generated within said array.
13. A method for generating a series of simulated electrophysiological
impulses in two dimensions, comprising the steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array,
(c) shaping said digital signals to resemble electrophysiological impulses,
whereby said sequences of digital signals form a two-dimensional patter of
said simulated electrophysiological impulses,
(d) loading a sequence of logic high digital signals into a first one of
said latches, and loading a sequence of logic low level signals into
remaining ones of said latches, and
(e) successively loading said sequence of logic high digital signals into
successive ones of said latches, and loading said sequence of logic low
digital signals into the remaining ones of said latches, whereby a moving
horizontal pattern of said impulses is generated within said array.
14. A method for generating a series of simulated electrophysiological
impulses in two dimensions, comprising the steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array,
(c) shaping said digital signals to resemble electrophysiological impulses,
whereby said sequences of digital signals form a two-dimensional pattern
of said simulated electrophysiological impulses,
(d) arranging said latches into seven rows of eight bit locations each,
(e) loading a first one of said latches corresponding to the fourth one of
said rows with a digital signal having a value of 04 hex,
(f) loading second and third ones of said latches corresponding to the
third and fifth ones of said rows with a digital signal having a value of
03 hex,
(g) loading said first one of said latches with a digital signal having a
value of 04 hex,
(h) loading fourth and fifth ones of said latches corresponding to the
second and sixth ones of said rows with a digital signal having a value of
7E hex,
(i) loading said first, second and third latches with a digital signal
having a value of 42 hex,
(j) loading sixth and seventh ones of said latches corresponding to the
first and seventh ones of said rows with a digital signal having a value
of FF hex, and
(k) loading said first, second, third, fourth and fifth latches with a
digital signal having a value of 81 hex, whereby a moving square pattern
of said impulses is generated within said array.
15. A method for generating a series of simulated electrophysiological
impulses in two dimensions, comprising the steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array,
(c) shaping said digital signals to resemble electrophysiological impulses,
whereby said sequences of digital signals form a two-dimensional pattern
of said simulated electrophysiological impulses,
(d) arranging said latches into seven rows of eight bit locations each, and
(e) successively loading progressively more significant bit locations of
respective ones of said latches with a logic high digital signal, and
loading a sequence of logic low digital signals into remaining ones of
said bit locations, whereby a moving signal impulse pattern is generated
across successive elements of said array.
16. A method for generating a series of simulated electrophysiological
impulses in two dimensions, comprising the steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array,
(c) shaping said digital signals to resemble electrophysiological impulses,
whereby said sequences of digital signals form a two-dimensional pattern
of said simulated electrophysiological impulses,
(d) arranging said latches into seven rows of eight bit locations each,
(e) loading first and second ones of said latches corresponding to the
first and seventh ones of said rows with a digital signal having a value
of 00 hex,
(f) loading a third one of said latches corresponding to the second one of
said rows with a digital signal having a value of 26 hex,
(g) loading fourth, fifth and sixth ones of said latches corresponding to
the third, fourth and fifth ones of said rows respectively with a digital
signal having a value of 2A hex,
(h) loading a seventh one of said latches corresponding to the sixth one of
said rows with a digital signal having a value of 66 hex,
(i) loading said first and second ones of said latches with a digital
signal having a value of FF hex,
(j) loading said third one of said latches with a digital signal having a
value of D9 hex,
(k) loading said fourth, fifth and sixth ones of said latches with a
digital signal having a value of D5 hex, and
(l) loading said seventh one of said latches with a digital signal having a
value of 99 hex, whereby a two-dimensional pattern of said impulses
resembling the letters DL is generated within said array.
17. A method for generating a series of simulated electrophysiological
impulses in two dimensions, comprising the steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array,
(c) shaping said digital signals to resemble electrophysiological impulses,
whereby said sequences of digital signals form a two-dimensional pattern
of said simulated electrophysiological impulses,
(d) arranging said latches into seven rows of eight bit locations each,
(e) loading first, second, third and fourth ones of said latches
corresponding to the first, third, fifth and seventh ones of said rows
respectively with a digital signal having a value of 55 hex,
(f) loading fifth, sixth and seventh ones of said latches corresponding to
the second, fourth and sixth ones of said rows respectively with a digital
signal having a value of AA hex,
(g) loading said first, second, third and fourth ones of said latches with
a digital signal having a value of AA hex, and
(h) loading said fifth, sixth and seventh latches with a digital signal
having a value of 55 hex, whereby a moving checker board pattern of said
impulses is generated within said array.
18. A method for generating a series of simulated electrophysiological
impulses in two dimensions, comprising the steps of:
(a) generating one or more sequences of digital signals,
(b) loading said one or more sequences of digital signals into
predetermined bit locations of a plurality of latches, said bit locations
of respective ones of said latches being arranged to form a
two-dimensional array,
(c) shaping said digital signals to resemble electrophysiological impulses,
whereby said sequences of digital signals form a two-dimensional pattern
of said simulated electrophysiological impulses,
(d) arranging said latches into seven rows of eight bit locations each,
(e) loading first, second, third, fourth, fifth and sixth ones of said
latches corresponding to the first, second, third, fifth, sixth and
seventh ones of said rows respectively with a digital signal having a
value of 18 hex,
(f) loading a seventh one of said latches corresponding to the fourth one
of said rows with a digital signal having a value of FF hex,
(g) loading said first, second, fifth and sixth latches with a digital
signal having a value of 24 hex,
(h) loading said third and fourth latches with a digital signal having a
value of E7 hex,
(i) loading said seventh latch with a digital signal having a value of 00
hex,
(j) loading said first and sixth ones of said latches with a digital signal
having a value of 42 hex,
(k) loading said second and fifth ones of said latches with a digital
signal having a value of C3 hex,
(l) loading said third, fourth and seventh ones of said latches with a
digital signal having a value of 00 hex,
(m) loading said first and sixth ones of said latches with a digital signal
having a value of 81 hex, and
(n) loading said second, third, fourth, fifth and seventh ones of said
latches with a digital signal having a value of 00 hex, whereby a moving
cross pattern of said impulses is generated within said array. |
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Claims  |
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Description  |
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FIELD OF THE INVENTION
The present invention relates in general to electrical signal generating
systems and more particularly to a cardiac mapping system simulator for
generating a series of signals which simulate two-dimensional
electrophysiological impulses.
BACKGROUND OF THE INVENTION
Medical analysis of the heart muscle has revealed that each normal heart
contraction originates from an area in the upper right atrium called the
sinus auricular node, and spreads in the form of a depolarization wave
through the atrioventricular node, across the heart to the ventricular
myocardium. The depolarization wave then spreads through the muscular
tissue of the ventricle to cause the ventricle to contract for pumping
blood through the arteries.
Thus, although normal contraction of the heart is referred to in common
parlance as being a "heartbeat", in actuality the contraction proceeds as
a wave which travels across the surface of the heart. In the event that
various cells within the heart tissue have been damaged, propagation of
the depolarization wave across the heart may be obstructed. Furthermore,
in the event that the cells in a specific region of the heart have been
damaged, conflicting depolarization waves may be generated by the affected
cells which interfere with the normal heart rhythm, a condition known as
cardiac arrhythmia.
The surgical treatment of cardiac arrhythmias has been facilitated by an
understanding of the mechanisms of arrhythmia gained through a precise
description of the structure and function of the cardiac tissues. To this
end, advances in medical technology have resulted in development of
various devices for investigating electrical activity, and thereby
interoperatively identifying the sources of cardiac arrhythmias within a
patient.
One such developmental tool is known as a cardiac mapping system comprising
an electrode array having a plurality of electrodes arranged in a
three-dimensional grid, a plurality of preamplifier units for amplifying
signals received from the electrode array, a data acquisition sub-system
for performing analog-to-digital conversion of the signals received from
the preamplifier units, and an analysis and display processor for
displaying individual epicardial waveforms as they propagate across the
heart during each contraction.
In operation, the chest cavity of a patient is opened and the electrode
array is located over or within the heart muscle. The electrodes detect
bioelectric phenomena of the heart muscle at their individual locations
across the surface of the heart and in response generate corresponding
analog-electrical impulses representative thereof. The analysis and
display processor captures and processes the data received from the
acquisition sub-system and displays the individual waveforms. The
information is typically displayed on a colour monitor as well as remote
monitors in the operating room in the form of an isochronal map.
Preferably, the data from the electrodes are then stored on an optical
disc or other suitable storage apparatus.
It is important that proper functioning of the cardiac mapping system be
assessed prior to use on patients since interpretation of results in the
operating theatre will determine the diagnosis and hence the procedure to
be performed.
A number of prior art systems have been developed for generating signals
which simulate various electrophysiological impulses. For example, U.S.
Pat. No. 3,323,068 (Woods) discloses an electrocardiogram simulator for
generating EKG waveforms of the human heart. The simulator according to
this prior art patent generates a single pulse conforming to a standard
idealized EKG wave in order to set up or trouble shoot EKG analysis
equipment.
Similarly, U.S. Pat. No. 3,469,115 (Cartridge) discloses a cardiac waveform
simulator for generating a pulse having a generally triangular shape and a
rise time to fall time characteristic closely resembling the pulses of a
human cardiac waveform.
U.S. Pat. No. 4,204,261 (Ruszala et al) teaches a complex analog signal
generator for generating a complete complex waveform which is divided into
a plurality of outputs for testing and calibrating various types of
medical equipment such as electrocardiogram displays and blood pressure
waveform displays. Related U.S. Pat. No. 4,205,386 (Ruszala et al) teaches
an electrocardiographic and blood pressure waveform simulator device for
simulating both electrocardiographic and blood pressure waveforms, with
the beginning of the blood pressure waveform being delayed from the
beginning of the electrocardiographic waveform so that the waves are
provided in a time sequence corresponding to waveforms that would
ordinarily be supplied by a live patient.
U.S. Pat. No. 4,352,163 (Schultz et al) discloses a vector-cardiogram
simulator for generating three distinct waveforms for simulating
electrical activity within the human heart along three separate axes. The
three generated waveforms are applied to the input of a vector-cardiogram
machine for the purpose of calibration and testing.
The above discussed prior art patents all relate to systems for generating
analog signals representative of electrophysiological activity in a single
dimension with respect to time. A typical display output for such prior
art systems would be in the form of a graph depicting electrical amplitude
on one axis versus time on the other axis. Thus, such prior art systems
provide signals which simulate the electrophysiological characteristics of
a heartbeat, but do not provide for simulation of electrophysiological
waves in two dimensions with respect to time (i.e. a simulation of the
depolarization wave which travels across the heart surface).
SUMMARY OF THE INVENTION
According to the present invention, apparatus is provided for generating a
series of signals for simulating two-dimensional electrophysiological
impulses. The generated signals appear on outputs of the apparatus which
are arranged to form a two-dimensional array or grid conforming to the
grid pattern of the electrode array used in the cardiac mapping system.
The apparatus preferably includes microprocessor circuitry for generating
signals of sufficient complexity in two dimensions to enable thorough
testing of the cardiac mapping system. Other arrays may be configured as
global, patching or bands for either the epicardial or endocardial
surfaces.
It is typically necessary to generate a variety of maps in order to
completely characterize the system and ensure correct functioning of each
channel corresponding to a grid on the electrode array. Thus, the
microprocessor circuitry allows for flexible programming to generate the
various complex signal patterns corresponding to the isochronal maps. The
patterns which are generated by the simulator preferably include vertical,
horizontal and square isochronal maps.
It is believed that no cardiac mapping simulator has hitherto been
developed for generating waveforms in the form of timed sequences of
signals for simulating two-dimensional electrophysiological impulses.
According to the present invention, there is provided an apparatus for
generating a two-dimensional pattern of timed simulated
electrophysiological impulses for application to an electrophysiological
impulse display device, comprising programmable circuitry for generating a
succession of digital signals, a circuit for receiving the aforementioned
succession of digital signals and in response generating a succession of
output signals on predetermined outputs thereof, wherein the outputs are
arranged to form a two-dimensional array, and circuitry for shaping the
output signals to resemble electrophysiological impulses, whereby the
succession of output signals forms a two-dimensional pattern of simulated
electrophysiological impulses for application to the display device.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will be described in greater detail below in
conjunction with the following drawings, in which:
FIG. 1 is a block diagram of a cardiac mapping system,
FIG. 2 is a perspective view of a cardiac mapping system electrode array
mounted on a heart model and connected to an input portion of the cardiac
mapping system,
FIGS. 3A and 3B are anterior and posterior views of an output map of the
cardiac mapping system showing a vertical test map,
FIG. 4 is a perspective view of the cardiac mapping system simulator of the
present invention connected to the input portion of the cardiac mapping
system, and
FIGS. 5A and 5B are a schematic diagram of the cardiac mapping system
simulator according to a preferred embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Turning to FIG. 1, a cardiac mapping system is shown in block diagram
format comprised of an electrode array 1 incorporating a plurality of
electrodes for detecting electrophysiological impulses and in response
generating and transmitting analog impulse signals to preamplifier and
filter circuitry 3. The preamplifier and filter circuitry 3 is typically
located under the operating room table. The electrode array 1 is attached
to a human (or animal) heart 5 in the manner shown with reference to FIG.
2. A bundle of wires extends from the individual electrodes of the
electrode array to a connector of the preamplifier and filter circuitry 3.
Analog signal outputs from the preamplifier and filter circuitry 3 are
transmitted to a data acquisition computer 7 by means of a multiplexer 9.
An analog display 11 is connected to the multiplexer 9 for generating an
analog display of a pre-selected one or more of the multiplexed signals
received from the preamplifier and filter circuitry 3.
The data acquisition computer 7 performs an analog-to-digital
transformation of the signals received from multiplexer 9, and the digital
data is transmitted for storage to an optical disc computer 13 and
associated optical disc storage medium 15. The data from the electrodes is
sampled by the optical disc computer at a rate of preferably 1,000 Hz per
electrode with 12-bit resolution.
The digital data signals generated by the data acquisition computer 7 are
also applied to a data processing computer 17 which captures a preferably
10-second segment of the data signals and in response displays individual
epicardial waveforms.
The processed data from computer 17 can then be displayed on a colour
monitor 19 as well as remote monitors in the operating room and at the
location of the acquisition sub-system (e.g. via analog display 11). Upon
capturing the data, an operator at the data processing computer 17 can
review the individual waveforms or request a complete isochronal map as
shown in FIG. 3. The map is displayed on the colour monitor 19 as well as
being transferred to a colour ink-jet printer 21.
The data processing computer 17 is also typically provided with well known
peripherals such as hard disc drive 23, floppy disc drive 25, mouse 27,
terminal 29 and black-and-white printer 31.
Turning to FIGS. 3A and 3B, a typical isochronal map is shown as it would
appear on colour monitor 19 and colour printer 21 with the exception that
the graph of FIG. 3 is in black and white instead of colour. FIG. 3A
represents the anterior view of the electrode array 1, while FIG. 3B
represents a posterior view. The electrode array 1 is comprised of a
plurality of spaced apart electrodes (e.g. from as few as 5 to as many as
265, or more). However, according to the embodiment illustrated, 56
epicardial electrodes 33-145 are arranged in seven rows by eight columns
across the surface of the array 5, for detecting electrophysiological
impulses at the heart's surface.
Time durations from a predetermined one of the electrodes, chosen as a
"Reference electrode", are measured to each of the other electrodes. These
activation times are plotted on an outline of the heart and common
activation times are connected in order to form isochronal lines (i.e. the
lines of vertical shading in FIGS. 3A and 3B which correspond to
respective colours in a colour isochronal map).
Solid black lines 147 indicate anatomical landmarks in the heart (e.g.
coronary arteries).
FIG. 4 shows the cardiac mapping simulator 149 of the present invention
connected to the preamplifier and filter circuitry 3 discussed with
reference to FIGS. 1 and 2. The simulator 149 is provided with a start
switch 151 for initiating simulation of two-dimensional
electrophysiological impulses which are used to test the cardiac mapping
system.
As shown in greater detail with reference to FIGS. 5A and 5B, the cardiac
mapping system simulator incorporates a microprocessor 153 for generating
a succession of digital signals according to a known pattern via outputs
PA0-PA7 via data bus 154 to successive inputs of a plurality of (e.g.
seven) output latches. For the purpose of illustration, only one of the
output latches 155 is illustrated. Although not shown, the remaining six
output latches are connected to data ports PAO-PA7 of microprocessor 153
via bus 154 in a manner identical to that shown with reference to output
latch 155.
The microprocessor 153 is preferably a single-chip computer such as the
Motorola MC68705R3S integrated HMOS microprocessor featuring on-board RAM,
EPROM, bi-directional input/output lines, etc. An external crystal Xl is
connected to the microprocessor for generating a system clock frequency of
preferably 1 MHz resulting in an instruction cycle time of 4 microseconds.
The clock frequency is dictated by the crystal's resonating frequency.
Capacitors C1 and C2 are coupling capacitors, while C3 provides a
reset-delay at power ON. An LEDI may optionally be connected via terminals
Jl-7 and Jl-8 to an input/output port PB4 of microprocessor 153 and via
current limiting resistor R2 to the +5 volt power source for indicating
when the simulator is activated.
The microprocessor 153, output latch 155 and other circuitry of the
simulator is powered by means of a 9-volt battery 157 connected at
terminals Jl-1 and Jl-2 to start switch 151, relay K1 and regulator 159
for generating a regulated 5-volt DC output to the various electronic
components of the simulator.
Depression of the start switch 151 results in power being momentarily
applied to power the microprocessor 153, thereby implementing an
initialization routine. The initialization routine of microprocessor 153
causes a high-to-low logic transition on output PB5. This causes the Q0a
output of a flip-flop 161 to go to a logic high level, thereby energizing
the relay coil of relay K1 for Closing the relay contact and providing
battery supply to the system. Three sections of the flip-flop 161 are
connected in parallel to supply the current required by relay K1. The
initialization routine also outputs a 100 msec pulse to trigger the
cardiac mapping system via an output port PB3.
At the end of the map generation routines (discussed in greater detail
below), the microprocessor 153 causes the PB5 output to go to a logic high
level, thereby causing the Q0a output of flip-flop 161 to return to a
logic low level, for opening the relay contact and disconnecting power
from the system.
Thus, according to the circuit of the present invention, the mapping
simulator does not consume any energy from battery 157 when it is not in
use, thereby prolonging the operating life of the battery.
Input/output lines PB0-PB2 of microprocessor 153 are arranged as BCD
(Binary Coded Decimal) outputs for driving a one-of-eight decoder 163. The
X1-X7 outputs of decoder 163 are connected to respective clock inputs CK
of the seven output latches. The X1-X7 outputs of decoder 163 are active
high and are used to select individual ones of the output latches to
receive data from microprocessor 153 via the respective D0-D7 inputs.
The data bus 154 connecting outputs PA0-PA7 of microprocessor 153 to
respective data inputs D0-D7 of the seven output latches is also Connected
Via a resistor array R7 to the +5-volt power source for ensuring proper
tri-state impedance conditions when microprocessor 153 is not generating
data for output via the PA0-PA7 terminals. Similarly, respective outputs
X1-X7 of decoder 163 as well as outputs PB1 and PB2 of microprocessor 153
are connected to ground via a further resistor array R8, while output PB0
is connected to the logic high power source +5-volt via resistor R5.
Resistor arrays R7 and R8 are preferably disposed within a single in-line
package (SIP).
As indicated above, seven 8-bit output latches are provided for generating
simulated electrophysiological signals corresponding to respective ones of
the 56 electrodes 33-145. Data is presented to the output latches from the
PA0-PA7 outputs of microprocessor 153 and an address signal is generated
by microprocessor 153 on the PB0-PB2 outputs and is transmitted to the A,
B and C inputs of decoder 163. The data from microprocessor 153 is clocked
in to the respective output latches by means of a logic high level pulse
from one of the X1-X7 outputs of decoder 163.
When all of the output latches contained the required data for application
to the cardiac mapping system, the microprocessor 153 sets the PCO output
thereof to a logic low level for simultaneously enabling the latches via
the output enable inputs OE. The data signals are presented via output
ports Q0-Q7 to a plurality of wave shaping circuits within a wave shaping
board 165.
Each line from respective ones of the output latches is connected to a
corresponding RC network within the wave shaping board 165 for attenuating
and shaping the received digital pulse into a bipolar pulse of preferably
15 mV amplitude and 5 mS duration. The bipolar pulse waveform closely
resembles the electrophysiological signals normally generated by the heart
and received via the epicardial bipolar electrodes 33-145.
In accordance with the preferred embodiment, nine maps are generated by the
simulator 147 with a 500-mS delay between each map. There is also
preferably a 500-mS delay after execution of the last map and before the
microprocessor 153 causes flip-flop 161 to open relay K1 for removing
power from the simulator.
The vertical map illustrated in FIG. 3 may be generated by the simulator
149 of the present invention in accordance with a pattern of digital
signals output from microprocessor 153 and written into respective ones of
the output latches such as latch 155 in accordance with a sequence of
loading respective ones of the latches as depicted diagrammatically in
Table 1.
The latches are designated in Table 1 as latch No. 1 to latch No. 7, and
the respective outputs Q0-Q7 of the latches are designated by the labels
PA0-PA7 corresponding to the outputs of microprocessor 153. The numbers 1
through 8 shown in Table 1 represent successive instances in time during
which respective digital pulses are output from latch No. 1-No. 7.
TABLE 1
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VERTICAL
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7
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LATCH #1 1 2 3 4 5 6 7 8
LATCH #2 1 2 3 4 5 6 7 8
LATCH #3 1 2 3 4 | | |