A data flow type information processor includes first and second program storing portions, a merging portion, a data pair detecting portion and first and second operation processing portions. Each of the first and the second program storing portions stores a data flow program and outputs a data packet including destination information and instruction information read from the data flow program based on an input data packet. The merging portion performs arbitration between data packets output from said first and second program storing portions. The data pair detecting portion receives a data packet output from the merging portion to detect two data packets having the same destination information. Each of the first and the second operation processing portions receives a data packet output from the data pair detecting portion and performs an operation processing based on the instruction information included in the data packet to output a data packet including the data indicative of the operation result to the corresponding program storing portion.

A scan conversion algorithm for rendering antialiased vectors in a multi-processor graphics system comprises the following steps: providing signals to the processors indicative of scan lines the respective processors are responsible for, determining a first set of storage pixels to be rendered by the processors, rendering such storage pixel of the first set simultaneously, each by a different processor, determining a second set of storage pixels to be rendered, and rendering each of the second set of storage pixels substantially simultaneously by a different one of the processors. The determinations of the first and second sets of storage pixels are made in accordance with the signals indicative of scan lines for which the respective processors are responsible.

A data packet including a destination field, an instruction field and two data fields is outputted from a data pair detecting portion of a data flow type information processor. The data packet is divided into two data packets. The data packet including the destination field and an identification tag is sent to a program storing portion, and the data packet including the instruction field, the two data fields and the identification tag is sent to an operation processing portion. The program storing portion outputs a data packet including the destination field, the instruction field and the identification tag. The operation processing portion outputs a data packet including a result data field and the identification tag. These data packets are merged with each other, based on the identification tags and sent to the data pair detecting portion.

A data pair detecting portion of a data flow type information processor outputs a data packet including a destination field and an instruction field and a data packet including two data fields. The data packet including the destination field and the instruction field is separated into a data packet including the destination filed and a data packet including the instruction field. The data packet including the destination field is applied to a program storing portion and the data packet including the instruction field is applied to an operation processing portion. The data packet including the two data fields is also applied to the operation processing portion. In a copy processing or in a constant reading processing, the program storing portion outputs a further data packet including a destination field and an instruction field or a data packet including a constant simultaneously with a data packet including a destination field and an instruction field. The operation processing portion outputs a data packet including a data field indicative of an operation result. The data packets output from the program storing portion and the data packet output from the operation processing portion are applied in parallel to a data pair detecting portion.

A data driven filter unit includes a register file including a plurality of registers, a first computing element group including a multiplier, a second computing element group including an add/shift composite computing element, an input part for writing externally received data in a register, specified by a program, in the register file, and an output part for outputting register data, specified by a program, in the register file to the exterior of the unit. The register file includes a plurality of registers, and a single entry corresponds to a single fir or iir instruction. The register file stores external data, data being processed, a constant and an initial value. This register file executes reading and writing along a rule of single substitution/single readout. This program is read from a program memory provided in the filter unit, so that required data is stored in the register file. Connection between the register file and a computing element is decided by the program. This filter unit is especially suited for use combination with a data driven type information processor, achieving easy and high speed implementation of filters having arbitrary structure.