A pseudorandom number generator includes: an M-sequence generator having a plurality of stages a.sub.i ; and a matrix product circuit which combines a matrix G having components g.sub.ji with the stages a.sub.i to provide output elements b.sub.j of a number, each b.sub.j being represented by the expression,
A high-speed pseudo-random number generator comprising a first shift register with p stages for storing and shifting a value with the least significant bit being adjacent an output terminal; a second shift register with b stages for storing and shifting a pre-loaded value with the least significant bit of the pre-loaded value being stored in the bth stage; a serial adder having at least l input taps with the serial adder adding the two values shifted out of the first and second shift registers and loading the sum output of the serial adder into the first shift register; and a controller for controlling clocking of the first and second shift registers and the serial adder, controlling pre-loading of the pre-load value into the second shift register, and clearing the serial adder.
A mobile communication method is disclosed, and particularly a power of two length pseudorandom noise sequence generator is disclosed, in which a pseudorandom noise code sequence is generated to use it for a direct sequence spreading of communication signals in a spread spectrum communication system. In the PN sequence generator, a mask value and a comparison value are calculated for shifting the PN sequence output having a length of 2.sup.N as much as wanted, so that the PN sequence can be shifted as much as a predetermined value in response to the single clock signal. In order to generate a PN sequence of the desired timing, a new PN mask value is directly obtained from the current PN mask value and the offset shift value to be shifted, and at the same time, a comparison value corresponding to the mask value is obtained, whereby ultimately a PN sequence having a length of 2.sup.N after shifting the cycle as much as the desired shifting value is obtained. The present invention adopts a method of forming a new comparison value corresponding to the PN mask value by using a comparison value translator, and as a result, the conventional additional circuits for inserting an additional bit into the PN sequence output are not required, and therefore, the constitution of the present invention is very much simplified compared with the conventional apparatus.
In a parallel computer system comprising a plurality of processor elements, a parent processor element generates random-number initial values, and distributes the random-number initial values to child processor elements using a communication mechanism or a shared memory; and child processor elements conduct processing to generate random-number sequences in accordance with the maximum length shift register sequence (M-sequence) method using the distributed random-number initial values as seeds.
A pseudo-random number generator, and an associated method, generates a pseudo-random number. The pseudo-random number is a complex, linear combination of values of input sequences provided to the generator and exhibits little correlation with such input values. The generator includes a summation combiner and an IIR (infinite impulse response) filter connected in a feedback connection with the summation combiner. Because of the low correlation of the pseudo-random number and input values provided to the generator, the pseudo-random number is less susceptible to cryptanalysis by an unauthorized party.
A pseudorandom number generator which uses linear feedback shift registers and a nonlinear function circuit and can make the conditioned output distribution of generated pseudorandom numbers uniform even if the conditioned output distribution of the nonlinear function circuit has some deviation. The generator has a shift register to which the output of the nonlinear function circuit is inputted as a serial input, an initial value setting circuit for setting random initial values to the linear feedback shift registers and the shift registers, and an adder for adding predetermined bits of the parallel outputs of the register and outputting a pseudorandom number stream. The generator can be used to generate a cryptogram which cannot be deciphered by the correlation attack method.