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Electronic still video camera with direct personal computer (PC) compatible digital format output    
United States Patent5138459   
Link to this pagehttp://www.wikipatents.com/5138459.html
Inventor(s)Roberts; Marc K. (Burke, VA); Chikosky; Matthew A. (Springfield, VA); Speasl; Jerry A. (Vienna, VA)
AbstractAn electronic still camera comprising a lens, shutter, and exposure control system, a focus and range control circuit, a solid state imaging device incorporating a Charge Couple Device (CCD) through which an image is focused, a digital control unit through which timing and control of an image for electronic processing is accomplished, an Analog-to-Digital (A/D) converter circuit to convert the analog picture signals into their digital equivalents, a pixel buffer for collecting a complete row of an image's digital equivalent, a frame buffer for collecting all rows of an image's digital equivalent, and a selectively adjustable digital image compression and decompression algorithm that compresses the size of a digital image and selectively formats the compressed digital image to a compatible format for either the IBM Personal Computer and related architectures or the Apple Macintosh PC architecture as selected by the operator so that the digital image can be directly read into most word processing, desktop publishing, and data base software packages including means for executing the appropriate selected decompression algorithm; and a memory input/output interface that provides both temporary storage of the digital image and controls the transmission and interface with a standard Personal Computer (PC) memory storage device such as a digital diskette. The digital diskette is removable inserted into the housing of the camera prior top use in recording digital image data.



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Drawing from US Patent 5138459
Electronic still video camera with direct personal computer (PC)

     compatible digital format output - US Patent 5138459 Drawing
Electronic still video camera with direct personal computer (PC) compatible digital format output
Inventor     Roberts; Marc K. (Burke, VA); Chikosky; Matthew A. (Springfield, VA); Speasl; Jerry A. (Vienna, VA)
Owner/Assignee     Personal Computer Cameras, Inc. (McLean, VA)
Patent assignment
All assignments
Publication Date     August 11, 1992
Application Number     07/615,848
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     November 20, 1990
US Classification     348/231.6
Int'l Classification     H04N 005/30
Examiner     Moore; David K.
Assistant Examiner     Ho; Tuan V.
Attorney/Law Firm     Fish; Paul W.
Address
Parent Case    
Priority Data    
USPTO Field of Search     358/903 358/909 358/209 358/217 364/521 364/900 364/200 340/723 340/724 382/56
Patent Tags     electronic still video camera direct personal computer (pc) compatible digital format output
   
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ReferenceRelevancyCommentsReferenceRelevancyComments
4972266
Tani
348/229.1
Nov,1990

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4963986
Fukuyama
348/347
Oct,1990

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Koshiishi
358/296
Feb,1990

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Yamawaki
348/231.6
Feb,1990

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Music
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Jul,1989

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Sasaki
348/220.1
Jun,1989

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Harase
348/64
May,1989

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Pape
348/231.6
Feb,1989

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Kawahara
348/222.1
Jul,1988

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Kawahara
382/282
Sep,1986

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Schneider
358/497
Feb,1986

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Toyoda
386/118
Jun,1984

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Taylor
348/580
Nov,1981

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Lloyd
386/117
Dec,1978

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Barrett
358/296
Feb,1978

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What is claimed is:

1. In an electronic still image camera comprising:

an optical lens,

a shutter mechanism operably associated with said lens,

an array of discrete light sensing pixel elements, each pixel element being responsive when said shutter mechanism is operated to incident illumination from a subject image radiating through said lens and shutter mechanism to generate an analog picture information signal corresponding to said subject image,

pixel multiplexing means responsive to each array of pixel elements for separating an output from each pixel element into its primary color components,

analog to digital converter means responsive to the outputs of said pixel multiplexing means for converting said analog picture information signal into corresponding digital data information signals,

removably mounted memory means for storing said digital data information signals,

the improvement comprising output data control means for selecting one of a plurality of different output data format codes prerecorded in said camera to be associated with each said digital data information signals where each of said plurality of output data format codes corresponds respectively to one of a like plurality of different data formats for different types of computer apparatus, and

logic means responsive to said output data control means for determining the output data format of said digital data information signals in accordance with a selected one of said plurality of different output data format codes.

2. The improved electronic still camera of claim 1 further comprising picture image resolution determining means and digital data compression means for selectively determining which of a plurality of compression algorithm parameters are to be applied to said digital data information signals in response to an operator activated switch means.

3. The improved electronic still image camera of claim 2 wherein said removably mounted memory means comprises digital diskette means having thereon a plurality of selectively addressable magnetic sector and track sections for recording said digital data information signals.

4. The improved electronic still image camera of claim 3 hwerein said digital compression algorithm of said digital data compression means is also recorded in its entirety on said diskette means and further comprising record marking means for recording a digital coded mark for indicating the compression alogorithm parameters utilized in compressing each said digital data information signals.

5. The improved electronic still image camera of claim 2 further comprising record marking means for recording a unique digital mark indicating the compression alogorithm parameters utilized in compressing each said digital data information signals.

6. The improved electronic still camera of claim 2 further comprising record marking means for generating and recording with each said digital data information signals a coded mark indicating the compression algorithm parameters utilized in compressing said digital data information signals.

7. The improved electronic still image camera of claim 1 further comprising memory formatting means operable during the camera power-up routine to automatically format said memory means in acccordance with one of a plurality of output data formats.

8. The improved electronic still image camera of claim 1 further comprising audio recording means for simultaneously recording digital audio signals associated with each subject image and memory file correlation means for associating in said memory means the respective storage locations of said audio signals with its associated image signals.

9. The improved electronic still image camera of claim 1 further comprising switch activated control means for improving the image signal storage efficiency by selectively determining the amount of storage of said removably mounted memory means to be associated with storage of each picture image.

10. An electronic still image camera comprising:

an optical lens,

a shutter mechanism operably associated with said lens,

an array of discrete light sensing pixel elements, each pixel element being responsive when said shutter mechanism is operated to incident illumination from a subject image radiating through said lens to generate an analog picture information signal corresponding to said subject image,

pixel multiplexing means responsive to said array of pixel elements for separating an output from each pixel element into its primary color components,

analog to digital converter means responsive to the output of said pixel multiplexing means for converting said analog picture information signal into corresponding digital data information signals,

removably mounted memory means for temporarily storing said digital data information signals,

output data format control means for storing in said camera at least one of a plurality of different output data format codes where each of said plurality of output data format codes corresponds respectively to one of a like plurality of different data formats for different types of computer apparatus, and

logic means responsive to said format control means for selectively controlling the formatting of said digital data information signals in accordance with a selected one of said plurality of different output data codes.

11. The electronic still image camera of claim 10 further comprising memory formatting means operable to automatically format said removably mounted memory means in accordance with one of a plurality of operator selectable data storage formats.

12. The electronic still image camera of claim 10 further comprising image resolution determining means for selectively determining which of a plurality of compression algorithm parameters are to be applied to said digital data information signals.

13. The electronic still image camera of claim 12 further comprising record marking means for indicating which one of said plurality of compression alogorithm parameters were utilized to compress said digital data information signals.

14. The electronic still image camera of claim 10 wherein said removably mounted memory means comprises digital data diskette means and further comprising selectable diskette formatting means for automatically formatting diskette means in accordance with one of a plurality of operator selectable data formats.

15. The electronic still image camera of claim 10 further comprising remote activation means for selectively activating said camera and logic means responsive to said remote activation means for intiating an output data format check of said removably mounted memory means.

16. A process for storing an electronically sensed video image comprising the steps of:

generating an analog image signal corresponding to the imagewise pattern of radiant light incident on a plurality of light sensing pixel elements,

converting the analog image signals into digital electronic information signals wherein a distinct digital electronic signal corresponds to the analog image signals corresponding to the intensity of radiant light falling on the light sensing pixel elements,

temporarily storing the digital electronic information signals,

recording in selectable addressible memory means at least one of a plurality of different digital output data format codes where each of said plurality of output data format codes corresponds respectively to one of a like plurality of different data formats for different types of computer apparatus,

selecting from said selectable addressible memory means one of said different digital output data format codes to be associated with each said digital electronic information signals, and

storing said digital electronic information signals in a digital memory in accordance with said selected output data format code.

17. The process of claim 16 further including steps of:

detecting the presence at an electronic still camera of a remotely generated activating signal, and

activating said generating of said analog signal in response to the detecting of said activating signal.

18. An electronic video image signal output data format translator comprising:

input means for receiving image signals corresponding to sensed picture information,

converter means for converting said image signals to digital image signals,

buffer storage means for temporarily storing said digital image signals,

output data format selection means for selecting one of a plurality of different data format codes stored in the translator to be associated with each said digital image signals where each of said plurality of different data format codes corresponds respectively to one of a like plurality of different data formats for different types of computer apparatus, and

output memory means for storing said digital image signals formatted in accordance with said selected data format code.
 Description Submit all comments and votes
 


BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention generally relates to an electronic still video camera and in particular to an improved electronic still camera which converts a still picture of an object or scene into an operator selectable compressed digital signal format for storage utilizing a compression/decompression algorithm, such as the Joint Photographic Experts Group (JPEG) algorithm standard for example, formatted into Personal Computer (PC) compatible format retaining the images' color information, and stored on a PC compatible memory diskette. For example, the diskette can be a three and a half (31/2) inch digital diskette. The digital diskette is removeable from the electronic camera for direct insertion into a PC which contains the previously loaded corresponding decompression algorithm whereby the digital image is in a format compatible for immediate use with word processing, desk top publishing, data base, and multi-media applications.

2. Description of the Prior Art

FIG. 1 is a schematic block diagram showing structure of a conventional prior art electronic still camera system, in which a CCD image sensor element 1a converts a still image of an object into an analog color video signal when the shutter control circuitry 2a is activated. The output color video signal of the image sensor element is then routed to the signal processing subsystem 3a where the signal is converted to National Television System Committee (NTSC) or other composite video formats (such as the European video standard Phase Alternating Line-PAL) and logged in analog format onto a mass memory storage device such as an analog video floppy disk, Electrically Erasable Programmable Read Only Memory (EEPROM), analog audio cassette, bubble memory, or other storage device 5a. Power is supplied by a rechargeable/removable battery system 4a.

An electronic camera that converts an image into electronic image signals and transferred to a memory storage device is disclosed in the following: U.S. Pat. No. 4,131,919; U.S. Pat. No. 4,456,931; U.S. Pat. No. 4,758,883; U.S. Pat. No. 4,803,554; and U.S. Pat. No. 4,837,628.

Conventional prior art electronic still cameras, for example of the types disclosed in the aforementioned references, produce an electronic signal corresponding to a desired image in analog format such as the National Television System Committee (NTSC) or similar on magnetic or electronic storage media for either permanent or temporary storage to facilitate viewing on a television or video monitor. With the current state of the art, it is expensive and time consuming to convert the analog image equivalent to a digital format for direct utilization with PC software applications. Currently, to convert an image captured on an electronic still camera to a PC compatible format one must convert the signal back to either a composite NTSC or RGB video signal and use a conversion device such as a "frame grabber" (a digital circuit board installed into PCs that convert video images into PC compatible formats) of the type sold commercially by Aapps Corporation, Orange Micro, RasterOps, and others or convert the image to a hard-copy print (a photograph) and utilize an electronic "scanner", a piece of equipment that connects to a PC, which converts an image into a digital format. The later technique is employed extensively within the desktop publishing industry.

SUMMARY OF THE INVENTION

It is the object of this invention to provide an improved electronic still camera with operator selectable picture compression in one of a plurality of operator selectable digital data formats recordable on a standard removeable magnetic diskette common to personal computers.

It is a further object of this invention to provide an improved electronic still camera that provides digital image files for immediate and direct incorporation into popular word processing, desktop publishing, and other software programs on PCs.

It is another object of this invention is to provide an improved electronic still camera that, under user selection, can record and store still images selectively compressed in a directly insertable digital memory storage device into a PC in either color or black and white formats thus facilitating storage of a large number of images with the signal flag indicating the degree of compression selected by the operator as well as the color/black and white mode selection being stored as digital values on the digital memory storage device with each image frame.

An additional object of this invention to provide an electronic still camera device that can rapidly capture a series of images automatically as well as singularly. Also, this camera provides multiple outputs in both video format for monitor and display of images and digital formats to facilitate data transmission, additional processing, or storage to a variety of storage media.

It is still another object of this invention is to provide a more efficient electronic still camera that can take a still picture with operator selectable high, medium, or low resolution in either color or black and white by electronic shutter and exposure control by utilizing a variety of electro-optical sensors including Charge Coupled Devices (CCD), Infrared (IR), and Ultra Violet (UV) which can be directly or remotely controlled by analog, digital, or radio frequency (RF) control signals.

A further object of this invention is to provide a programmable video picture translator device for efficiently converting electronic still images in analog composite video format into digital data format readable by a PC. This translator device also provides additional video inputs and outputs for capturing video images, monitoring video images on monitors and displays, and can transmit either compressed or unprocessed digital image data through a variety of output I/O channels in various formats such as serial, parallel, etc. Also, this invention can incorporate sound/voice with images thru additional interface circuitry and audio digitizers.

Finally, it is the object of this invention to provide an electronic still camera that is efficient in design and permits extended periods of portable operation and which provides the user with operational status through the use of continuous internal self-test software routines and operator displays.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic block diagram of a conventional prior art electronic still camera.

FIG. 2 is a schematic block diagram of the overall structure of an electronic still camera embodying the present invention.

FIG. 2A is an illustration showing one embodiment of an audio data file, data format flag, compression level, and color/black and white mode selection values stored on a digital memory diskette storage device.

FIG. 3 is a flowchart showing the power-up and continuous self-test sequence in accordance with one aspect of the present invention.

FIG. 4 is an example of a 1/2" CCD array utilizable in accordance with one aspect of the present invention.

FIG. 5A is a schematic block diagram showing the image signal to digital signal conversion logic in accordance with one aspect of the present invention.

FIG. 5B is a logic and timing diagram for the image signal to digital signal conversion logic in accordance with one aspect of the present invention.

FIG. 6 is an example of the control panel logic in accordance with one aspect of the present invention.

FIG. 6A is an example of one embodiment of switch logic of the control panel switches and controls utilizable in accordance with one aspect of the present invention.

FIG. 6B is an example of the PICT image file format based upon the published standard provided by Apple Computer, Inc.

FIG. 6C is an alternate embodiment of the current invention embodying remote operation.

FIG. 7 is a simplified block diagram of the digital control unit in accordance with one aspect of the present invention.

FIG. 8 is a flowchart showing the steps of the image compression algorithm in accordance with one aspect of the present invention.

FIG. 9 is a block diagram of a video format translator device in accordance with one aspect of the present invention.

FIG. 10 is a block diagram illustrating the operation of a translator device in accordance with one aspect of the present invention.

FIG. 11 is an alternative embodiment of the video format translator in accordance with another aspect of the present invention showing additional video inputs and data outputs.

FIG. 12 is an alternate embodiment of the invention showing an optional diskette format utility flowchart.

FIG. 13 is an alternate embodiment of a frame buffer utilizable in accordance with another aspect of the present invention showing a frame buffer stack permitting multiple shot mode.

FIG. 14A is a block diagram of an embodiment of the format select logic in accordance with one aspect of the present invention.

FIG. 14B is a flow diagram illustrating the steps of the format selection logic operations.

DESCRIPTION OF THE PREFERRED EMBODIMENT

FIG. 2 is a schematic block diagram of the preferred embodiment of an electronic still camera in accordance with the principals of the invention. Referring to FIG. 2, an image optical pick-up element 1, which for example could be a Charge Coupled Device (CCD) (or an Infrared (IR) or Ultraviolet (UV) sensor), converts a still image of an object into an electric signal when a picture "shoot" command is initiated by the operator via control panel 2. When taking a picture, focusing and shutter speed are controlled by a lens system and shutter speed selection mechanism under control of the digital control unit 9. The camera, like other still video cameras, employs an electronic shutter system that controls a charge storage time in a CCD array onto which an image of an object is focused through the lens system.

When the "shoot" control 6 is half depressed (see FIG. 6), a power supply voltage is supplied from the rechargeable batteries 4 to the electronic circuits and digital control unit 9, control panel 2, and the disk drive assembly 5. The exposure control circuitry not shown generates appropriate horizontal and vertical transfer pulses as well as field shift pulses under control of the reference clock timing and control signals provided by the digital control unit 9 type for driving the CCD device and pre-processing circuitry. This design may be of any type well known in the art for example those cited in U.S. Pat. Nos. 4,131,919 and 4,456,931 and any similar designs well known in the prior art.

An alternate embodiment of the present invention that provides remote operation of the camera is shown in FIG. 6C. When remote "Shoot" control 30 is activated by any means for example manually, or by radiant, or electronic energy, a control signal is generated and routed through the external jack 31, located on the external camera body. The external control 30 is electrically connected to the external jack 31 by a twisted-pair conductive cable assembly that is familiar to those skilled in the art. Upon receipt of the externally generated "shoot" command, the relay switch 32 is activated and provides internal switch closure. This closure of switch 32 then initiates the process previously described and provides the half V+ voltage previously described. The full V+ is provided via the fixed delay 33, the value chosen to allow the diskette drive assembly 5 (FIG. 2) and associated control circuitry to initialize prior to receiving image data.

When the "shoot" control is fully depressed in either embodiment, the shutter controller 15 (FIG. 6) generates a shutter pulse that generates control signals for the A/D converters 8 allowing the image/picture data signal in the sample and hold circuitry of the pixel multiplexer 7 to be converted into a digital signal. Control and address instructions of the type well known in the art are generated from the digital control unit 9 to facilitate the storage of the digital image data within the pixel buffer 10 and frame buffer 11. Upon completion of image conversion, the contents of the frame buffer are transferred to the compression processor 12 which for example may be of the many versions currently offered commercially such as C-Cube's (San Jose, Calif.) four chip Application Specific Integrated Circuit (ASIC) set. In the compression processor 12, the Joint Photographic Experts Group (JPEG), a part of the International Standards Organization (ISO) which is a subset of the International Telegraph and Telephone Committee (CCITT), image compression algorithm fully described in Report # JTC1/SC2/WG8 dated 1985 is performed under control of the digital control unit 9 to compress the size of the image. A variable selectable compression ratio of up to 50:1 is performed on the digital image frame. Other compression ratios are operator selectable via the control panel 2 switches 14A and 14B (FIG. 6). The compressed digital frame is then formatted into either an IBM PC/Clone (such as GIFF) or Apple Macintosh (such as PICT II) image file format depending on the setting selected by the operator for a user switch 17 (FIG. 6) position on the control panel 2. After formatting, the file is written into a temporary memory buffer within the disk input/output (I/O) interface circuit 13 which, under the command of the digital control unit 9, controls the high density (1.4 Mbyte storage capacity) disk drive unit 5. Following file transfer to the diskette e.g., the frame counter display 22 on the control panel 2 is updated by appropriate control signals and the camera is ready to undergo the same procedure for the next image. Power to the electronic circuits and disk drive system is terminated following release of the "shoot" control switch 6.

In accordance with the preferred embodiment of this invention, it is permissible for the user to select various resolution quality image recording levels with the higher levels being at the expense of memory diskette storage capacity. The position of switches 14A and 14B for example could represent a unique digital mark or word that denotes the respective switch position and is sensed during initial power application and periodically during operation. FIG. 6A illustrates typical logic AND gate circuits 60a and 60b utilizable in conjunction with switches 14A and 14B or switch 17 to generate appropriate signals to designate respective switch positions and generate appropriate control signals from. The switch positioned in the High position for high resolution allows only four to five images to be stored, while Med. switch position for medium resolution allows approximately twenty five images to be stored, and Low for low resolution allows up to fifty images to be stored on a single diskette. Also, by selecting black and white mode instead of color via switch 14B, the operator may select additional storage capacity since storage is increased by a factor greater than three (one element per pixel versus three for color). Various image resolution combinations are permissible because the operator can select a different resolution and mode setting for each image prior to image signal capture. This is accomplished by marking or "tagging" each image frame data information signal with the resolution and mode of each image as it is written onto the memory diskette in any suitable manner, for example as shown in FIG. 2A. With reference to FIG. 2A, diskette 50 has tracks 51a, 52b, . . . 52n. With reference to track 52b there is shown a representative portion of segment 53 depicting a typical image file information format having digital bit 54 depicting color mode, and digital bits 55 representing compression resolution level markings or tags. With reference to color mode tag 54 it can be seen that if switch 14B is in the color position tag 54 is recorded as a logical "one" or true-conversely if bit 54 is recorded as a logical "zero" it corresponds to the black and white position of switch 14B. Similarly as shown switch 14A would record in memory position 55 a binary "zero" for low resolution, a binary "one" for medium resolution and a binary "two" for high resolution selections by the operator. By incorporating this "tagging" approach, it is possible for the decompression algorithm, loaded into any PC prior to use or written onto the memory storage diskette along with the image data, to automatically determine the appropriate level of compression associated with image file and execute decompression efficiently.

Still another alternate embodiment in accordance with this invention incorporates an acoustic digitizer circuit which digitizes sound. There are several digitizers commercially available such as the Apple Computer Inc. Musical Instrument Data Interface (MIDI) adaptor. The output of this digitizer may be selectively connected to the CPU 20 (FIG. 7) via an additional I/O interface similar to the auxiliary I/O interface 80. The sound or audio associated with each image can be recorded, digitized, and stored on the diskette device on available tracks in an identical manner previously described (FIG. 2A). An image file in accordance with this embodiment would be appropriately marked or tagged with the corresponding digitized audio file 56 (FIG. 2A). Upon playback on a sound configured PC, both the image and the corresponding audio would then be viewed and heard simultaneously.

It should be noted that a major advantage a camera in accordance with the present invention has over conventional still video cameras is that a camera according to this invention is capable of storing multiple digital images in semiconductor memory temporarily at a rapid rate while, simultaneously, the image compression processor 12, file formatter software algorithm, and disk I/O interface 13 that stores formatted files continue to function in concert together at a slower rate. This efficient design coupled with VLSI low power, high speed semiconductor memory devices (10 and 11 FIG. 5A and 24 FIG. 7) allows this operational capability.

Like most other still video and conventional film cameras, when the "shoot" control 6 (FIG. 6) is fully depressed, a control signal is generated from the digital control unit 9 that generates a trigger signal on the control panel 2 to cause a flash unit 16 (FIG. 6) to irradiate a flash of light onto the subject image.

During initial camera operation, the user first inserts a diskette such as a standard three and a half inch or similar storage medium. Various memory diskette sizes and formats are suitable for the invention. However, for the preferred embodiment either a double-density (800 Kbytes of storage) or a high-density (1.4 Mbytes of storage) diskette in a three and a half inch format which are readily available from various commercial sources such as Sony, Maxell, and Verbatim. The user must then select the desired PC format (IBM PC/Clone or Apple Macintosh, etc.) via switch 17 (FIG. 6) on the control panel 2. As shown in FIG. 3.; after turning on the power switch or inserting a diskette 50, the digital control unit 9 performs a self test of all internal circuitry, battery, disk drive unit, and control panel. Should any failures be detected, an appropriate error indicator is illuminated on the control panel. During the power-on sequence (see FIG. 3 and FIG. 12), the inserted diskette 50 is automatically checked for formatting consistencies in accordance with the format selected by the format switch 17 on the control panel 2 (IBM/Apple/etc.) and for available storage space by checking the boot block on the diskette, a technique that will be familiar to those skilled in the art. Should any inconsistencies be detected, an error indicator is illuminated on the control panel (ie, disk full, unformatted, etc.). The operator frame counter display 22 (FIG. 6) is then updated to show the maximum number of pictures available based upon indicated operator selections (color/black and white), diskette type (double versus high density), and capacity (partially full versus empty diskette). During operation, the operator can selectively erase a frame and record over it if desired by selecting the erase mode of operation from the control panel and toggling the forward/reverse control.

The optics for the preferred embodiment of the invention is a commercially available one-half inch (1/2") color CCD device having a pixel grid array of 780.times.488 as pictorially depicted in FIG. 4. This results in 380,640 pixel elements which results in a commercially acceptable quality resolution image as will be understood by those skilled in the art. In a color imaging device (CCD array) photoelectric elements, such as photodiodes, are arranged in a two dimensional array with optical filters for R (red), G (green), and B (blue). Various arrangements of optical filters are well known and the arrangement of optical filters is not limited to a particular one with this invention. During operation each pixel stores a charge corresponding to the amount of incident light. The RGB components of each pixel's charge is sequentially read out via a horizontal/vertical addressing scheme that will be familiar to those skilled in the art.

As shown in FIG. 5A; each charge, when addressed, is amplified and processed in a sample and hold (S/H) circuit 18. The analog voltage in each S/H circuit is digitized by an associated analog to digital (A/D) converter 8. The digital values are routed and collected in the pixel buffer 10. Following completion of discrete pixel element conversion and subsequent formatting in the pixel buffer which is under Control Processor Unit (CPU) 20 software control, the output of the full pixel buffer is routed to the frame buffer 11 by digital control unit 9. This process continues until a complete frame is collected within the frame buffer. The general digital logic and timing and control signals for this circuitry is shown in FIG. 5B. The timing is provided by a master clock that is an integral part of the CPU microprocessor. For example, the MOTOROLA 68040 microprocessor has a clock speed of approximately 40 Megahertz (MHZ) which results in a clock period of 25 nanoseconds (nsec.). This clock pulse is used by the function and address decoder 19 (FIG. 6) to generate the address and control signals shown in FIG. 5B as would be understood by those skilled in the art. The circuit of the present invention may be designed by one skilled in the art to function with a variety of microprocessor architectures and is not limited to any one in particular. One can see from the timing chart that the S/H circuit is allowed (via the SE command) to charge to a voltage level indicative of the analog voltage impinging upon the pixel element (via the PS command). After a fixed time period, the A/D converters are enabled (via the CE command) to begin conversion of the analog voltage value on the S/H. Upon completion of conversion, a conversion completion signal (CC) is generated by the A/D and routed back to the S/H circuit (via the SC command which is generated by the function and address controller 19) to discharge the stored analog voltage in anticipation of the next pixel element conversion process. Next, the output of the A/D converter 8 is clocked into the pixel buffer 10 (via the PB command). When the pixel buffer 10 is full, the output is clocked out to the frame buffer 11 (via the FB command) and the pixel multiplexer address circuitry selects the next pixel for conversion. Reset signals (RST) are sent to all circuit elements to