A digital-to-analog converter having a main analog conversion part which carries out digital to analog conversion of input digital signals, an auxiliary analog conversion part which compensates the digital-to-analog conversion error, a memory circuit which accumulates the compensation data for compensating the conversion error, a register circuit which inputs the output signal of the memory circuit, and a matrix switching circuit which selects the output signal of the register circuit by means of the higher order bits of the input digital signal. Prior to the start of the digital-to-analog conversion operation the compensation data accumulated in the memory circuit are transferred to the register circuit. Later, at the time of the digital to analog conversion operation the matrix switching circuit is controlled by means of the higher order bits of the input digital signal selects the data held in the register circuit, and carries out the compensation of the error in the analog conversion.
A Digital-to-Analog (D/A) converter with programmable transfer function includes a Main Converter and at least one Sub-Converter. Errors in the Main Converter are compensated for by programming the one or more Sub-Converters with compensation values determined during a Calibration Sequence. The Calibration Sequence measures the deviations of the transfer function of the Main Converter from the ideal at predetermined bit transitions of the digital input signal and generates representative separate digital signals for the one or more Sub-Converters. By combining these separate signals with the digital input signal, the net errors of the D/A Converter transfer function are reduced.
A non-linear digital-to-analog converter (non-linear "DAC") and method are disclosed for scaling a digital input value by a non-integer and producing an analog output. The digital input value is multiplied by a non-integer, and the integer portion of the result is fed to a linear DAC to produce a linear analog output. At least one of the bits of the integer portion of the result is decoded, and at least one compensation value is generated responsive to the decoding. The compensation value is added to the linear analog output and represents the fractional portion of the result of scaling the digital input value by the non-integer. A method is also disclosed for utilizing the non-linear DAC for error compensation in a computer graphics system. Color intensity values are scaled up by a non-integer greater than one. A first analog output is generated proportional to the integer portion of the result. At least one bit of the integer portion of the result is decoded, and a second analog output is generated responsive to the decoding. The second analog output represents the fractional portion of the result. The first and second analog outputs are combined, and the combined analog output is used to drive a display device.
A horizontal plan view and a vertical side view of a weather disturbance are combined into a single axonometric display to facilitate analysis of the disturbance. Desired azimuth and elevation angles for the center of the axonometric display and which of the four quadrants of the display to be emphasized are user selectable. Either the plan view or the side view can be separately displayed in the axonometric format and the axonometric display is user selectable with the conventional display being readily available.
A digital-to-analog converter (DAC, 300) utilizes a coarse DAC (306) and fine DAC (315) to produce an analog output signal having both low glitch energy and good linearity performance. The DAC (300) also uses an error table (312) to store correction data generated through a calibration procedure. Outputs (307, 311) from each DAC (306, 315) are summed to produce an analog output signal which exhibits better linearity than does the output (307) of the coarse DAC (306) alone.
A method of self calibration for a segmented digital-to-analog converter is provided. The segmented digital-to-analog converter converts a digital input code to an analog output consisting of an analog output step and an analog calibration factor. The method comprises the step of determining a trim value for each segment of a segmented DAC. The method continues by storing the trim values in memory. Then, the trim values for a plurality of segments preselected to be enabled by a given digital input signal are summed, thereby producing a digital calibration factor associated with each given digital input signal. Last, storing each digital calibration factor in memory at an address corresponding to the associated digital input signal. Thereafter, when a particular digital input signal is received by the DAC, the preselected plurality of segmented current sources are switched to produce the analog output step, and the corresponding digital calibration factor is converted to the analog calibration factor and switched to the output of the segmented DAC.
