 |
Description  |
|
|
BACKGROUND OF THE INVENTION
The invention relates to electron multipliers. In particular, the invention
relates to monolithic electron multipliers and microchannel plates (MCP)
formed from an isotropic etchable material.
Conventional microchannel plate manufacture relies on the glass multifiber
draw (GMD) process. Individual composite fibers, consisting of an etchable
soluble barium borosilicate core glass and an alkali lead silicate
cladding glass, are formed by drawdown of a rod-in-tube preform, packed
together in a hexagonal array, and then redrawn into hexagonal multifiber
bundles. These multifiber bundles are next stacked together and fused
within a glass envelope to form a solid billet. The billet is then sliced,
often at a small angle 8.degree.-15.degree. from the normal to the fiber
axes. The resulting wafers are edged and polished into a thin plate. The
soluble core glass is then removed by a suitable chemical etchant to
produce a wafer containing an array of microscopic channels with channel
densities of 10.sup.5 -10.sup.7 /cm.sup.2. Further chemical treatments
followed by a hydrogen reduction process produces a thin wafer of glass
containing an array of hollow channels with continuous dynodes of reduced
lead silicate glass (RLSG) having conductive and emissive surface
properties required for electron multiplication. Metal electrodes are
thereafter deposited on the faces of the wafer to complete the manufacture
of a microchannel plate.
The GMD method of manufacture described, while satisfactory and economical,
suffers from certain disadvantages. For example, the size of the
individual channels is governed by at least two glass drawing steps in the
manufacturing process. Variations in fiber diameter can cause channel
diameter variation, resulting in differential signal gain, both within an
MCP and from one MCP to another.
Another disadvantage of current technology concerns channel arrangement.
Individual composite fibers are packed in a hexagonal array before
redrawing a multifiber bundle. This local array is moderately regular, but
variation of fiber size can cause some disorder, and fibers on the
periphery of a drawn multifiber bundle are often disordered and dislodged.
Further, when these multifibers are stacked and pressed to form a billet
there are invariably disruptions in the channel array and distortions in
channel cross-section at the boundaries between the multifibers. As a
result of these and other processing steps, there is no longrange order in
channel location, and channel geometry is not constant across the array.
The manufacture of microchannel plates according to the GMD process is also
limited in the choice of materials available. The multifiber drawdown
technique demands that the starting materials, namely the core and
cladding, both be glasses with carefully chosen temperature-viscosity
properties; the fused billet must have properties conducive to wafering
and finishing; core material must be preferentially etched over the
cladding with very high selectivity; the clad material must ultimately
exhibit sufficient surface conductivity and secondary electron emission
properties to function as a continuous dynode for electron multiplication.
This set of constraints greatly limits the range of materials suitable for
manufacturing MCPs with the present technology.
Multi-component alkali lead silicate and barium borosilicate glasses are
typically used as the cladding and core materials, respectively, in
manufacturing MCPs. To obtain satisfactory continuous dynode action with
present materials, the ratio (.alpha.) of channel length (L) to channel
diameter (D) is typically 40 or more. This aspect ratio is routinely
achieved in conventional MCPs by virtue of the extremely high etch
selectivity between core and cladding material. However, the difficulties
of constructing such a substrate become more critical as the channel
diameter and pitch (center to center spacing) of the channels is reduced
to below 10 microns.
Attempts have been made to crystallize a photosensitive glass in a
lithographically-defined pattern so as to render the crystallized regions
selectively etchable from the glass leaving behind an array of channels
for producing a microchannel plate. However, only moderate etch
selectivity between the crystalline and glass phases yields through
channels with non-parallel side walls and limits the minimum channel
diameter to about 25 .mu.m. Moreover, the formation of a two-layer
secondary emissive and conductive surface in the microchannels is
accomplished by a number of cumbersome and difficult steps.
Attempts have also been made in selectively etching a silicon wafer sliced
with a set of its crystalline (111) planes normal to the (110) faces of
the slice. However, simple holes with vertical side walls extending
through the wafer cannot be achieved due to well-known crystallographic
constraints.
SUMMARY OF THE INVENTION
The present invention is designed to overcome the limitations and
disadvantages of the described prior arrangements. In particular, and in
accordance with a preferred embodiment of the invention, there is
disclosed an electron multiplier in the form of a microchannel plate
comprising a wafer of etchable material having been subjected to a
directionally applied flux of reactive particles against at least one face
of the wafer in selected areas corresponding to microchannel locations.
The active species may be energetic and/or chemically active. The
directionally applied flux species removes material from the selected
areas exposed thereto to produce microchannels in the wafer oriented in
accordance with the directionality of the applied flux.
In one embodiment of the invention the microchannels are etched through
from one face of the wafer to the other or from both faces. In another
embodiment of the invention the microchannels are etched to a selected
depth within the wafer and material from the opposite face is ground or
removed to a depth sufficient to expose the ends of the channel within the
wafer.
In accordance with the invention, channel etching selectivity is achieved
by applying an etch mask to at least one face of the wafer exposed to the
flux. In one embodiment the etch mask may be a photosensitive polymer
which has been processed to establish a pattern of microchannel locations.
In another embodiment the mask may be a metallized etch resist or a
chemically durable film deposited or grown on the wafer and then apertured
photolithographically to define microchannel locations.
The channels may be activated to exhibit secondary emission and a current
carrying capacity sufficient to replenish emitted electrons and to
establish a field for accelerating the emitted electrons. The activation
may be achieved by the various techniques including forming an active
layer or a continuous dynode on the channel walls by chemical vapor
deposition (CVD), liquid phase deposition (LPD) and native growth by
reaction with a reactive species. Activation may also include doping the
film with species to control surface conductivity and secondary electron
emission.
In accordance with the present invention major transverse channel
dimensions (e.g. diameters) less than about 4 .mu.m and having a pitch
less than about 6 .mu.m are readily achieved. Thin films for channel
activation range in thickness over about 2-1000 nm. In exemplary
embodiments, a thin film for a continuous dynode on a dielectric substrate
has a thickness of 300 nm, whereas a film for a semiconductor substrate
has a thickness of 20 nm. Also, channel walls are virtually parallel as a
result of the directionality of reactive particle etching.
Various materials may be used for the microchannel plate according to the
present invention, including semiconductors such as GaAs, GaP, InP, AlAs,
AlSb, Si, substantially single component dielectrics such as Si.sub.3
N.sub.4, AlN, Al.sub.2 O.sub.3, SiO.sub.2 glass, and R.sub.2
O-BaO-PbO-SiO.sub.2 glasses (where R is one or more of the following: Na,
K, Rb, Cs). Other embodiments of the invention include process steps and
resulting microchannel plate configurations which include channels of
different shapes and sizes and channels with axes in parallel and
intersecting planes and trenched channels.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a fragmentary perspective view of a microchannel plate in
accordance with the present invention;
FIGS. 2A-2D illustrate in step wise fashion a preferred embodiment of the
process according to the present invention;
FIGS. 3A-3D illustrate in step wise fashion an alternative embodiment of
the process according to the present invention employing a chemically
durable etching mask;
FIGS. 4 and 5 illustrate alternative embodiments of the process according
to the present invention;
FIG. 6 is a fragmentary detail of a MCP according to the present invention
with a semiconductive substrate;
FIG. 7 is a fragmentary detail of a MCP according to the present invention
having a dielectric substrate etched in accordance with the teachings of
the present invention and having a dynode produced by CVD processing;
FIG. 8 is a fragmentary detail of a MCP according to the present invention
having an alkali lead silicate substrate having been etched in accordance
with the teachings of the present invention; and
FIG. 9A-9F illustrate in fragmentary detail various embodiments of the
present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
An MCP 10 fabricated in accordance with the present invention is
illustrated in FIG. 1. The MCP 10 may be in the form of a wafer 12 formed
of a generally homogenous, etchable material. Such materials include
semiconductive materials, including but not limited to GaAs, GaP, InP,
AlAs, AlSb, Si, single component dielectrics such as Si.sub.3 N.sub.4,
AlN, Al.sub.2 O.sub.3, SiO.sub.2 glass, and multicomponent dielectrics
such as R.sub.2 O-BaO-PbO-SiO.sub.2 glasses (where R is one or more of the
following: Na, K, Rb, C.sub.3). The wafer 12 is sliced in a manner which
can be independent of the crystallographic planes of a crystalline wafer
material.
In a preferred embodiment microchannels 14 are formed in the wafer 12 in an
array as shown at a bias angle 16. Thin film dynode 15, formed of
semiconductive and emissive layers for a thin film dynode on dielectric
substrate; or emissive layer on semiconductive substrate, may be deposited
or grown on the walls of the channels 14 by various methods such as set
forth in the copending application of Tasker et al., Ser. No. 395,588,
filed on even date herewith, and commonly assigned to the assignee herein.
Conductive electrodes 18 and 20 are formed on the respective opposite
faces 22 and 24 of the wafer as shown. In operation, a bias voltage
(V.sub.B) and current (i.sub.B) is supplied across the electrodes 18 and
20 by a source 26 which is illustrated schematically.
The microchannels 14 are formed in the wafer 12 at the bias angle 16 by an
anisotropic etching process which is illustrated schematically in FIGS.
2A-2D. In FIG. 2A, the wafer 12 may be prepared by various known
techniques such as slicing it from a bulk homogeneous material (not shown)
or by growing it and thereafter polishing and cleaning the surfaces 22 and
24. Such a material may be a single crystalline, polycrystalline or
amorphous structure. In preparation for etching in FIG. 2B at least one
face 22 of the wafer 12 is masked with a coating 28 which may be a
photosensitive polymer material. The coating 28 is selectively exposed to
light 30 through an apertured mask 32 to produce a pattern of exposed
areas 34 on the coating 28 which correspond to the desired pattern of
microchannels. The exposed areas 34 of the coating 28 may thereafter be
removed by a developing procedure (FIG. 2B) thereby forming apertures 36
in the coating 28 (FIG. 2C) which expose selected portions of the surface
22 of the wafer 12. The masked wafer 12 is subjected to a directionally
applied flux of reactive particles 38 (FIG. 2C) which attacks the
substrate material comprising the wafer 12 through the aperatures 36 in
the coating 28 to thereby form the microchannels 14. The coating 28 is
thereafter removed, the channels are activated, thereafter electrodes 18,
20 may be applied to the faces 22, 24 of the wafer 12 resulting in a
microchannel plate 40 shown in FIG. 2D.
Alternatively, for certain substrates 12, e.g. silicon, the coating 28
fcrming the etch mask may be formed by an oxidation process or deposition
process illustrated in FIGS. 3A-3D. In the arrangement illustrated, the
wafer 12 is formed as noted and subjected or exposed to oxygen at elevated
temperatures to produce a hard silicon oxide coating 13 illustrated in
FIG. 3A. Thereafter the wafer 12 and silicon oxide coating 13 receive a
coating of photopolymer 28 which is exposed through the photomask 32 by
light 30 for producing exposed areas 34 (FIG. 3B) which are developed as
noted above, thereby resulting in an etch mask 28 having apertures 36
therein (FIG. 3C). A first flux of reactive particles 38-1 is applied to
the wafer 12 for producing apertures 15 in the oxide layer 13 as shown.
Thereafter, the photomask 28 is removed and a second flux of reactive
particles 38-2 is applied against the wafer through the apertured oxide
mask 13 for producing the channels 14. The oxide mask 13 is more durable
than photopolymer materials and thus allows for relatively deep channel
formation in the substrate 12 as shown in FIG. 3D. Thereafter the
apertured wafer 12 may be electroded. The etching fluxes 38-1 and 38-2 may
be the same or different particles operating under various conditions as
necessary. For example, a relatively high intensity flux 38-1 may be
applied to make the apertures 15 in the silicon oxide film 13 while a flux
of a different energy 38-2 may be applied for producing the channels 14.
It is also possible that the polymer coating 28 may serve as a mask for
chemical wet etch or dry etch step whereby the apertures 15 are formed in
the silicon oxide layer 13. Alternatively, an etch mask may be formed of
some other chemically durable material, for example, Si.sub.3 N.sub.4 or
Al.sub.2 O.sub.3 by native growth, CVD, LPD or other method as desired.
If desired, and as shown in FIG. 4, an etch resistant metal coating 28 of
W, Ni or Cr may be applied to either or both sides 22,24 of the wafer 12
by sputtering evaporation or other method. The coating 28 may be subjected
to photolithographic processes and subsequent development to produce
apertures 36 and may thus serve as a durable mask for the wafer 12 during
the channel 14 etching step with applied flux of particles 38 (FIG. 2C).
If desired, such a coating may serve as an electrode for the MCP 44.
Etching may be accomplished by a direction-specific ion beam and/or glow
discharge. The ion beam may be produced as set forth in the publication
entitled "Large Area Ion Beam Assisted Etching of GaAs with High Etch
Rates and Controlled Anisotrophy", Lincoln et al., J. Vac. Sci. Technol
B., Vol. 1, No. 4, Oct-Dec. 1983. Etching may also employ various reactive
species. The particular species is selected taking into account the type
of etching process and the substrate to be etched.
It should be understood that the microchannels 14 may be etched in
accordance with the teachings of the present invention for a time
sufficient to establish the channels from one face 22 of the wafer 12 to
the opposite face 24 as shown in FIG. 2C. It is also possible to etch
straight through channels 14 from both sides 22,24 of the wafer as
illustrated in FIG. 4; or it is possible to etch chevron, and one-to-many
channels by two-faced etching hereinafter described.
It is also within the teachings of the present invention to terminate the
etching step at a given depth 42 as more clearly illustrated in FIG. 5.
Excess material 46 beyond the terminal ends 48 of the channels 14 within
the wafer 12 may be removed by grinding, polishing, wet isotropic etch,
plasma etch or by ion milling.
According to an embodiment of the present invention, in the MCP 110 shown
in FIG. 6, the wafer 112 may be made of a bulk semiconductor for carrying
current i.sub.B. The channels 114 formed therein have an emissive 115
layer formed therein. In the case of a semiconductor wafer 112, improved
electron multiplication behavior and reduction of ion feedback may be
achieved. The electric field normal to the wafer midplane 128 and inclined
with an angle 134 with respect to the channel axis Ac allows
multiplication of electrons but reduces ion feedback noise preventing
energetic positive ions I from impacting the channel wall near the input
face of the MCP 110.
In another embodiment, a single component dielectric substrate 112 such as
silica glass as shown in FIG. 7 may be etched in accordance with the
teachings of the present invention to produce microchannels 114 therein.
Thereafter a current carrying, semiconductive coating 152 may be first
deposited on the channel walls as shown and emissive coating 154 may be
deposited or grown over the current carrying layer 152. As used herein a
single component dielectric is a material which is substantially a single
component and conventional adjuvants. Deposition of the coatings 152 and
154 may be by various chemical vapor deposition (CVD) techniques typically
at reduced pressure and at elevated temperatures to thereby produce the
continuous dynode 150 or by other techniques.
Alternatively, as shown in FIG. 8, the substrate 112 may be a
multicomponent dielectric material such as alkali lead silicate glass
which has been anisotropically etched in accordance with the teachings of
the present invention to produce microchannels 114 therein. Thereafter,
the etched substrate 112 may be first subjected to a wet-etch with a weak
acid to deplete the lead from the glass adjacent the channel walls 114 and
then be hydrogen reduced in order to produce a continuous dynode 140 with
a semiconductive layer 165 in the substrate 112 and an emissive surface
164 as shown.
Other variations of the present invention are also possible. For example,
it may be possible to perform the etching step through the substrate from
both sides at the same bias angle and at the same time or sequentially in
order to produce straight microchannels in the configuration illustrated
in FIG. 4. It may also be possible to perform the etching step from each
side at different bias angles in order to produce microchannels 172
entering the plate 170 at a first bias angle 174A and leaving the plate at
a second bias angle 174B in a monolithic structure (FIG. 9A). It is also
possible to produce a microchannel plate 180 having individual channels
182-1, 182-2 which are of various sizes (FIG. 9B). For example, small and
large channels may be arranged in a pattern or matrix. It is further
possible to produce a MCP 190 with an arrangement of microchannels such
that a single relatively large channel 192-1 is interconnected with one or
more relatively smaller channels 192-2 in a monolithic structure (FIG.
9C). It is also possible to form an electron multiplier having one or more
elongated trenches 204 in a single substrate 202 or alternatively in a
stack of such substrates together in side-by-side configuration to form a
laminated microchannel structure 200 (FIG. 9D). It is also possible to
form an electron multiplier 220 with branched trenches 224 in which the
input end 224-I is a single trench and the output has branched channels
224-O each of which forms a separate and distinct output which may be
individually read or controlled (FIG. 9E). In yet another embodiment of
the invention it may be possible to form a wafer 130 having trenched
channels 134-1 . . . 134-2 formed in opposite sides 131-1 and 131-2 in
which the trenched channels 134-1 . . . 134-2 are oriented so that they
are related to the other cross-wise in order to form a pseudo channel
matrix (FIG. 9F).
Further, processing of the channels which are formable in accordance with
the present invention may be staged so that the coatings or the dynode
surfaces exhibit different characteristics. For example, it is possible to
form a channel in a plate by etching to a selected depth in the substrate
and thereafter applying conductive and emissive films. In subsequent
etching steps the channel may be formed to an increased depth within the
wafer and additional coatings may be applied such that the conductivity or
emissivity of the dynode thus produced varies lengthwise of the channel
and in a stepwise or graded fashion. Alternatively, each branch of a
channel may be individually treated after it is formed in order to provide
a branched channel arrangement with different electron multiplication
properties at each output.
In accordance with the present invention, because the substrate may be
anisotropically etched in order to produce an apertured microchannel
plate, a number of the processing steps associated microchannel plate
manufacture by the GMD process are eliminated. Accordingly, some of the
constraints in the properties of suitable substrate materials are
significantly relaxed thereby allowing greater latitude in substrate
materials selected. In addition, the materials properties necessary for
the manufacture of microchannel plate substrates may be divorced or
decoupled from the materials properties necessary for the production of
continuous dynodes.
As a direct result of the present invention, smaller channel diameters, or
widths less than about 4 .mu.m and pitch, less than about 6 .mu.m may be
achieved thereby resulting in improved spatial and temporal
characteristics (e.g. resolution and speed). The channel and pitch
dimensions are better than can be achieved with the conventional GMD
processes or methods employing photosensitive glass. Exemplary film
thicknesses are about 2-20 nm for electron-emissive films and about
10-1000 nm for current-carrying films and are achievable with CVD, LPD and
growth by reactive techniques such as set forth in Tasker et al., Ser. No.
395,588 filed Aug. 18, 1989, the teachings of which are incorporated
| | |
