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Semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure and a method for producing the same    

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United States Patent5208727   
Link to this pagehttp://www.wikipatents.com/5208727.html
Inventor(s)Okamoto; Kaori (Takatsuki, JP); Wakahata; Yasuo (Katano, JP); Ueno; Iwao (Ibaraki, JP)
AbstractThe present invention provides a semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure made of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 as a main component, comprising the functions of a conventional capacitor which absorbs low voltage noises and high frequency noises, and a varistor when high voltage noises and electrostatic charges invade, wherein simultaneous sintering of the materials of ceramic capacitor together with the materials of inner electrodes was made possible in the manufacturing process. Besides, material to be made semiconductive is added to the main component of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 excess in Ti, the materials of Mn-Si, which are converted to MnO.sub.2 and SiO.sub.2 in the sintering process, are also added to the main component. A grain boundary insulated, semiconductor type capacitor is manufactured easily using only a re-oxidation process by using the starting material of the above-described composition, thereby eliminating surface diffusion process of metal oxides which is used in manufacturing conventional capacitors. According to the manufacturing method of the present invention, calcination process of laminated raw sheets prevents troubles occurring in laminated ceramic capacitors with varistor function, such as breaks of electric connections in inner electrodes; de-lamination of ceramic sheet; cracks in ceramic sheet; decrease of sintering density; and non-uniformity in the texture of sintered body, thereby improving electric characteristics, i.e. capacitance, voltage non-linearity coefficient .alpha. and varistor voltage, and reliability of the products. The present invention provides two major advantages in the composition of materials and in the manufacturing process.
   














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Drawing from US Patent 5208727
Semiconductor-type laminated ceramic capacitor with a grain

     boundary-insulated structure and a method for producing the same - US Patent 5208727 Drawing
Semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure and a method for producing the same
Inventor     Okamoto; Kaori (Takatsuki, JP); Wakahata; Yasuo (Katano, JP); Ueno; Iwao (Ibaraki, JP)
Owner/Assignee     Matsushita Electric Industrial Co., Ltd. (Osaka, JP)
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Publication Date     May 4, 1993
Application Number     07/582,221
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     August 5, 1991
US Classification     361/321.4 29/25.42 501/135
Int'l Classification     H01G 004/12 H01G 007/00 C04B 035/46
Examiner     Griffin; Donald A.
Assistant Examiner    
Attorney/Law Firm     Panitch Schwarze Jacobs & Nadel
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Parent Case    
Priority Data     Mar 22, 1989[JP]1-69651 Mar 22, 1989[JP]1-69660 Mar 22, 1989[JP]1-69667
USPTO Field of Search     361/321 501/134 501/135 501/136 501/137 501/138 29/25.42 252/514 338/21
Patent Tags     semiconductor-type laminated ceramic capacitor grain boundary-insulated
   
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4977485
Mori
361/321.4
Dec,1990

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4799127
Ono
361/321.5
Jan,1989

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Momoki
338/21
Apr,1987

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Wheeler
361/321.4
Aug,1985

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We claim:

1. A semiconductor-type laminated ceramic capacitor with a grain boundary insulated structure comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00(where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; and Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%.

2. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 1, wherein said inner electrode is made of at least one or more kinds of metals selected from Au, Pt, Rh, Pd or Ni, or alloys or compositions thereof.

3. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 2, wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu or Zn, or alloys or compositions thereof.

4. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 1, wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu or Zn, or alloys or compositions thereof.

5. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising the steps of calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste have been printed; sintering said laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; and Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%.

6. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 5, wherein said inner electrode is made of at least one or more kinds of metals selected from Au, Pt, Rh, Pd or Ni, or alloys or compositions thereof.

7. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 6, wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu or Zn, or alloys or compositions thereof.

8. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 5 wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu or Zn, or alloys or compositions thereof.

9. A semiconductor-type laminated ceramic capacitor with a grain boundary-structure comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00(where x is in the range of 0.001.ltoreq.x--0.2) ; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na.sub.2 SiO.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.05-2.0%.

10. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising the steps of calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surface of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste have been printed; sintering said laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds of Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 and CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na.sub.2 SiO.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.05-2.0%.

11. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Al.sub.2 O.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.01-2.0%.

12. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising the steps of calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming a raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after reoxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.b 3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Al.sub.2 O.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.01-2.0%.

13. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub. 2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and NaAlO.sub.2 is further included in said ceramic material to make relative molar content in the range of 0.05-4.0%.

14. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising the steps of calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheet alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surface patterns of inner electrode paste have been printed; sintering said laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and NaAlO.sub.2 is further included in said ceramic material to make relative molar content in the range of 0.05-4.0%.

15. A grain boundary insulated, semiconductor type laminated ceramic capacitor comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00(where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub. 3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.05-2.0%.

16. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-structure comprising the steps of: calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming a raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surface of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after reoxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.05-2.0%.

17. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said insulated grain boundary, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub. 2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5 5.0%; and LiAlO.sub.2 is further included in said ceramic material to make relative molar content in the range of 0.05-4.0%.

18. A method for manufacturing a semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising the steps of: calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surface of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after reoxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and LiAlO.sub.2 is further included in said ceramic material to make relative molar content in the range of 0.05-4.0%.

19. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr(1-x)Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.

20. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising the steps of: calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surface of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in a reducing atmosphere or in a nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr(1-x)Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O , Y.sub.2 O.sub.3,La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.

21. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surfaces of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edges of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.

22. A method for manufacturing semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising the steps of: calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surface of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of Sr.sub.(1-x) Ca.sub.x TiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr.sub.(1-x) Ca.sub.x in the range of 0.95.ltoreq.Sr.sub.(1-x) Ca.sub.x /Ti<1.00 (where x is in the range of 0.001.ltoreq.x.ltoreq.0.2); at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub. 3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.
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TECHNICAL FIELD

The present invention relates to a semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure and a method for producing the same, and more particularly to a ceramic capacitor which absorbs both low voltage noises and high frequency noises under the normal operational conditions as a capacitor, works as a varistor against invading high voltage loads such as pulses and electrostatic charges, thereby protecting built-in semiconductors and electronic equipment from being damaged by abnormal voltage loads such as noises, pulses and electrostatic charges arising from surrounding electronic equipment, wherein characteristics of said ceramic capacitor being stable to temperature changes.

BACKGROUND ART

Recently, semiconductor elements such as IC and LSI are widely used in electronic devices and equipment to realize multifunctional applications of the equipment and to make the equipment light, small and handy. However, the use of many semiconductor elements makes the electronic device less resistant to disturbance by electric noises. The conventional method to protect the electronic devices from invading electric noises is to integrate by-pass capacitors such as film capacitor, laminated ceramic capacitor and semiconductor ceramic capacitor into the power line of IC and LSI. These capacitors display excellent performances in absorbing low voltage noises and high frequency noises. They are, however, so impotent to high voltage pulses and electrostatic charges that mulfunctionings of the equipment, break-down of semiconductors and/or capacitors themselves occur frequently when the electronic equipment are invaded by high voltage pulses or electrostatic charges. Therefore, these technical problems in the conventional capacitors should be improved.

A new type capacitor, which has sufficient resistance and excellent absorbing ability to pulses as well as good noise absorbing ability and stability to temperature and frequency changes, was developed and disclosed in Japanese Laid-Open Patent Publication No. 57-27001 and Japanese Laid-Open Patent Publication No. 57-35303 etc., wherein a varistor function was added to a ceramic capacitor made of SrTiO.sub.3 series of ceramic materials and the capacitor was defined as "a semiconductor-type ceramic capacitor with a grain boundary-insulated structure having a varistor function" (hereinafter referred to as a ceramic capacitor with varistor function). This ceramic capacitor with varistor function, works as a varistor when high voltage pulses and electrostatic charges invade it and it absorbs low voltage noises and high frequency noises as a conventional capacitor, thereby protecting the electronic equipment and built-in semiconductors from abnormal high voltage noises, pulses and electrostatic charges generated by surrounding electronic equipment and devices, and providing wide application fields for the capacitor.

Since the electronic parts are made more sophisticated, lighter, smaller, and more handy, ceramic capacitors with varistor function are also required to be smaller but higher in performance. The effective electrode area of the conventional single-plate type ceramic capacitor with varistor function will be, however, decreased when the capacitor is miniaturized, resulting in the reduction of electric capacitance and hence inferior reliability of the capacitor. A capacitor having laminated structure of the electrode is devised to solve the aforementioned problem, wherein the effective electrode area is expected to be increased. However, the ceramic capacitor with varistor function is conventionally manufactured by the process comprising a step coating the surface of SrTiO.sub.3 type semiconductor element with oxides, followed by a thermal diffusion process to form an electric insulating layer in the grain boundaries. It is recognized to be very difficult to manufacture "a laminate type ceramic capacitor having varistor function" (hereinafter referred to as a laminated ceramic capacitor with varistor function) by sintering the material of the ceramic capacitor simultaneously with the material of an inner electrode, though conventional laminated ceramic capacitors made of BaTiO.sub.3 series of materials are manufactured by this process.

As a method to overcome the problem of simultaneous formation of a material of laminated ceramic capacitor with varistor function by sintering the material of the ceramic capacitor together with the material of inner electrode, the following method for manufacturing a laminated ceramic capacitor with varistor function is developed and provided, using methods as is disclosed in Japanese Laid-Open Patent Publication No. 54-53248 and Japanese Laid-Open Patent Publication No. 54-53250, comprising the steps of: printing a pattern corresponding to the inner electrode by using ceramic paste enriched in organic binder on the surface of the ceramic substrate; forming a porous sheet corresponding to the pattern of the inner electrode by sintering; and impregnating the porous sheet with electrically conducting metals under the appropriate pressure, or alternatively a step of forming a pattern of inner electrodes by gilding or fusion method. These processes, however, involve many difficulties and they are yet far from practical applications.

Japanese Laid-Open Patent Publication No. 59-215701 provides a method comprising the manufacturing steps of: forming a raw sheet made of ceramic powder calcinated in the non-oxidizing atmosphere; printing a pattern of the inner electrode by using an electric conductive paste mixed with a thermal diffusion material on the surface of the row sheet, said thermal diffusion material having the ability to form an electric insulating layers in the grain boundaries; and sintering said raw sheet in the oxidizing atmosphere. Another method disclosed in Japanese Laid-Open Patent Publication No. 63-219115 comprises the manufacturing steps of: fo