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Description  |
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BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a demodulation apparatus for demodulating
received input signals, and more particularly, to such a demodulation
apparatus which incorporates an adaptive equalizer so that it is suitable
for application in a digital mobile communication.
2. Description of the Background Art
In a digital communication involving multipath as in a case of a digital
mobile communication, a received input signal is affected by a
communication path distortion due to the multipath. In general, in
demodulating such a received input signal, a bit error rate can be reduced
by detecting after an equalization is performed, using an adaptive
equalizer for example.
However, when the equalizer such as an adaptive equalizer is applied to the
received input signal transmitted through a path involving only shortly
delayed multipath reflections, the bit error rate can actually be
increased compared with a case of not using the adaptive equalizer at all.
In fact, under a circumstance in which the communication environment widely
changes depending on a location of a receiver, as in a case of mobile
communication such as an automobile telephone or a portable telephone,
there are locations for which the multipath hardly exist, for instance in
a vicinity of a local transmission station, where the use of the adaptive
equalizer becomes completely superfluous.
For this reason, there has been a proposition for a selective use of a
demodulator incorporating the adaptive filter, as disclosed in Japanese
Patent Application Laid Open No. 64-8750.
A demodulation apparatus disclosed in this reference is shown in FIG. 1. In
this demodulation apparatus, a distributor 1 distributes a received input
signal into two passages, one of which is connected to a first demodulator
4 incorporating an adaptive equalizer, while the other one of which is
connected to a second demodulator 6 without an adaptive equalizer. Either
one of outputs of the first and second demodulators 4 and 6 is then
selected by a signal selection device 7 according to a judgement made by a
judging device 9 which judges the output with a smaller bit error rate
from the outputs of the first and second demodulators 4 and 6 by comparing
a bit error rate value measured by a measuring device 8 with a prescribed
threshold value, where the measurement is based on an S/N ratio of the
received input signal.
In such a conventional demodulation apparatus, the bit error rate is
obtained by comparing a sign of the training signal inserted into the
received input signals and the sign of the received input signal.
However, the number of training signals is much smaller than that of the
received input signals so that a considerably long period of time is
required in order to obtain a sufficiently reliable threshold value, and
there is a possibility that a path of large bit error rate may be selected
during this period of time.
For instance, for a TDMA using 256 bits per one burst and 15 bit training
signal, in order to achieve the bit error rate threshold value of
10.sup.-6 as in the aforementioned reference, at least 10.sup.6 bits are
necessary, which means at least 8.times.10.sup.4 bursts are necessary.
Even when the threshold value is lowered to 10.sup.-2, several tens of
bits are still necessary. Therefore, the time required for determining the
threshold value cannot be dismissed as ignorable.
Furthermore, in such a conventional demodulation apparatus, both the first
and second demodulators 4 and 6 have to be maintained in activated states
throughout the operation of the demodulation apparatus. In other words,
the power has to be supplied constantly to both of the first and second
demodulators 4 and 6 in such a conventional demodulation apparatus.
This requirement can be a severe limitation for some applications of the
demodulation apparatus such as those of automobile telephone and portable
telephone in which a battery capacity is rather limited. This problem is
practically very important because the power consumption by an equalizer
is much larger than other components of the demodulation apparatus.
For instance, in a case of an adaptive equalizer using an RLS algorithm,
setting a number of taps to be 5, and taking the coefficients between 3 to
5, because (3 to 5).times.5.sup.2 =75 to 125, at most 123 complex
multiplications have to be performed. Since the differential demodulator
requires only one complex multiplication, this implies that the adaptive
equalizer can consume up to 125 times greater power than the differential
demodulator.
Moreover, in this type of a conventional demodulation apparatus, the use of
the first demodulator with an adaptive equalizer and the second
demodulator without an adaptive equalizer causes a difference in
demodulated signal output timing depending on which one of the first and
second demodulator is used, such that in the subsequent operations in the
demodulation apparatus such as those of the error correction codec and
voice codec have to take this difference into account.
Furthermore, a conventional demodulation apparatus incorporating an
adaptive equalizer has not been able to produce a good bit error rate
performance consistently. The bit error rate performance depends on the
equalizer structure and dynamic change of multipath conditions. For
example, a conventional adaptive equalizer is not capable of compensating
the multipath very well when the multipath condition changes from a
non-minimum phase condition to a minimum phase condition. Also, a
conventional adaptive equalizer is not capable of adapting to the channel
movement when the fading pitch is extremely high. If the equalizer fails
to track the dynamic movement of the channel characteristics even once, it
cannot continue to compensate the multipath any more, and a correct
demodulation cannot be obtained thereafter. The equalizer remains in such
a catastrophic state until the next training sequence is received, by
means of which the equalizer re-establish the tracking of the dynamic
movement of the channel characteristics.
On the other hand, in a more general type of a conventional demodulation
apparatus, a frequency offset is generated because of the discrepancy
between the transmission frequency of the received input signals and the
oscillation frequency of a local oscillator, and this frequency offset
have to be removed.
An example of such a conventional demodulation apparatus is shown in FIG.
2.
In this demodulation apparatus, the RF (IF) signals received at an input
terminal 11 is multiplied by an output of a local oscillator 12 at a
multiplier 13, so as to be converted into baseband signals.
The high frequency components of the obtained baseband signals are then
eliminated by a low pass filter 4, while the frequency offset is detected
from the output of the multiplier 13 by a frequency offset detection
device 16, such that the frequency offset can be removed at a frequency
offset removal device 15.
The baseband signals without the frequency offset thus obtained are then
equalized by an equalizer 17, and then sent to a demodulation unit (not
shown) for performing further processing such as an error correction.
Such a demodulation apparatus is also equipped with a power source unit 18
for supplying activation power to each element of the apparatus.
Now, in this type of a conventional demodulation apparatus, the frequency
offset detection device 16 and the demodulation unit have to be maintained
in activated states throughout the operation of the apparatus.
As in the previous example, this requirement can be a severe limitation for
some applications of the demodulation apparatus such as those of
automobile telephone and portable telephone in which a battery capacity is
rather limited.
Also, in this case, in order to maintain the frequency offset detection
device 16 constantly activated, a huge amount of calculations becomes
necessary, which implies that a huge number of gates are necessary in
terms of hardware requirement, so that the compact size or large scale
integration for the apparatus becomes difficult to realize.
In particular, when the transversal filter type device is used as the
frequency offset detection unit 16, the considerations for the power
consumption and the amount of calculations can be serious problems
practically.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a
demodulation apparatus incorporating an adaptive equalizer, capable of
preventing a communication through a path of large bit error rate over an
unignorable period of time.
Another object of the present invention is to provide a demodulation
apparatus incorporating an adaptive equalizer, capable of reducing a total
power consumption during its operation.
Another object of the present invention is to provide a demodulation
apparatus incorporating an adaptive equalizer, capable of realizing a
compact size or large scale integration for the apparatus.
According to one aspect of the present invention there is provided a
demodulation apparatus, comprising: a distributor for distributing an
input signal to a first and a second passages; a first demodulator
including an equalizer capable of compensating a transmission path
distortion, connected with the first passage, for demodulating the input
signal; a second demodulator, connected with the second passage, for
demodulating the input signal; means for measuring a rate of
non-coincidence between bit codes of outputs of the first and second
demodulators; and means for selectively outputting one of the outputs of
the first and second demodulators according to the measured rate of
non-coincidence.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: a distributor for distributing an
input signal to a first and a second passages; a first demodulator
including an equalizer capable of compensating a transmission path
distortion, connected with the first passage, for demodulating the input
signal; a second demodulator, connected with the second passage, for
demodulating the input signal; means for measuring eye apertures of
outputs of the first and second demodulators; and means for selectively
outputting one of the outputs of the first and second demodulators
according to the measured eye apertures.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: a distributor for distributing an
input signal to a first and a second passages; a first demodulator
including an equalizer capable of compensating a transmission path
distortion, connected with the first passage, for demodulating the input
signal; a second demodulator, connected with the second passage, for
demodulating the input signal; means for measuring an eye aperture of an
output of the second demodulator; and means for selectively outputting one
of the outputs of the first and second demodulators according to the
measured eye aperture.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: a distributor for distributing an
input signal to a first and a second passages; a first demodulator
including an equalizer capable of compensating a transmission path
distortion, connected with the first passage, for demodulating the input
signal; a second demodulator, connected with the second passage, for
demodulating the input signal; means for measuring a bit error rate of an
output of the second demodulator; and means for selectively outputting one
of the outputs of the first and second demodulators according to the
measured bit error rate.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: a distributor for distributing an
input signal to a first and a second passages; a first demodulator
including an equalizer capable of compensating a transmission path
distortion, connected with the first passage, for demodulating the input
signal; a second demodulator, connected with the second passage, for
demodulating the input signal; means for detecting a presence of multipath
from the input signal; and means for selectively outputting one of the
outputs of the first and second demodulators according to the detected
presence of the multipath.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: a distributor for distributing an
input signal to a first and a second passages; a first demodulator
including an equalizer capable of compensating a transmission path
distortion, connected with the first passage, for demodulating the input
signal; a second demodulator, connected with the second passage, for
demodulating the input signal; means for measuring a bit error rate of an
output of the second demodulator; means for delaying an input of the first
demodulator by a time taken by the second demodulator to demodulate the
input signal and by the measuring means to measure the bit error rate;
means for delaying an output of the second demodulator by a time taken by
the first demodulator to demodulate the input signal; and means for
selectively outputting one of the outputs of the first and second
demodulators according to the measured bit error rate.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: oscillator means for generating a
oscillator signal of a prescribed frequency; means for obtaining a
baseband signal from an input signal and the oscillator signal; means for
detecting a frequency offset from the baseband signal; means for
memorizing the detected frequency offset; means for removing the detected
frequency offset from the baseband signal; equalizer means for
demodulating and equalizing an output of the removing means; means for
controlling operation of the detecting means and memorizing means
according to an error signal from the equalizer means; and means for
selectively connecting one of the detecting means and the memorizing means
with the removing means according to the error signal from the equalizer
means.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: oscillator means for generating a
oscillator signal of a variable frequency; means for obtaining a baseband
signal from an input signal and the oscillator signal; means for detecting
a frequency offset from the baseband signal; means for memorizing the
detected frequency offset; equalizer means for demodulating and equalizing
an output of the removing means; means for controlling operation of the
detecting means and memorizing means according to an error signal from the
equalizer means; and means for selectively connecting one of the detecting
means and the memorizing means with the oscillator means according to the
error signal from the equalizer means, wherein a frequency of the
oscillator signal is set to cancel the detected frequency offset.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: oscillator means for generating a
oscillator signal of a prescribed frequency; means for obtaining a
baseband signal from an input signal and the oscillator signal; means for
detecting a frequency offset from the baseband signal; means for
memorizing the detected frequency offset; means for removing the detected
frequency offset from the baseband signal; equalizer means for
demodulating and equalizing an output of the removing means; means for
controlling clock signal supply to the detecting means according to an
error signal from the equalizer means; and means for selectively
connecting one of the detecting means and the memorizing means with the
removing means according to the error signal from the equalizer means.
According to another aspect of the present invention there is provided a
demodulation apparatus, comprising: means for converting an input signal
into an intermediate frequency signal; demodulator means including an
equalizer means for obtaining a basic frequency signal from the
intermediate frequency signal; means for detecting and correcting bit code
errors in the basic frequency signal; and means for controlling operation
of the demodulator means and the detecting means according to an error
signal from the equalizer means.
Other features and advantages of the present invention will become apparent
from the following description taken in conjunction with the accompanying
drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic block diagram of one example of a conventional
demodulation apparatus.
FIG. 2 is a schematic lock diagram of another example of a conventional
demodulation apparatus.
FIG. 3 is a schematic block diagram of a first embodiment of a demodulation
apparatus according to the present invention.
FIG. 4 is a graph of a bit error rate as a function of a multipath delay
interval, for two demodulators incorporated in the demodulation apparatus
of FIG. 3.
FIG. 5 is a schematic block diagram of a second embodiment of a
demodulation apparatus according to the present invention.
FIG. 6 is a schematic block diagram of a third embodiment of a demodulation
apparatus according to the present invention.
FIGS. 7(A) and 7(B) are illustrations of sequence diagrams for cases of
narrow and wide eye apertures, respectively.
FIG. 8 is a detailed block diagram of an eye aperture measurement unit
incorporated in the demodulation apparatus of FIG. 6.
FIG. 9 is a schematic block diagram of one variation of the demodulation
apparatus of FIG. 6.
FIG. 10 is a detailed block diagram of an eye aperture measurement unit and
an automatic gain control unit in another variation of the demodulation
apparatus of FIG. 6.
FIG. 11 is a detailed block diagram of an equalizer and an eye aperture
measurement unit in another variation of the demodulation apparatus of
FIG. 6.
FIG. 12 is a diagram of a correction unit in another variation of the
demodulation apparatus of FIG. 6.
FIG. 13 is a schematic block diagram of a fourth embodiment of a
demodulation apparatus according to the present invention.
FIG. 14 is a schematic block diagram of a fifth embodiment of a
demodulation apparatus according to the present invention.
FIG. 15 is an illustration of an input data used in the demodulation
apparatus of FIG. 14.
FIG. 16 is a schematic block diagram of a sixth embodiment of a
demodulation apparatus according to the present invention.
FIG. 17(A) and 17(B) are illustrations of signal diagrams for an output of
a matched filter used in the demodulation apparatus of FIG. 16, for cases
of absence and presence of multipath, respectively.
FIG. 18 is a detailed block diagram of a multipath detection unit
incorporated in the demodulation apparatus of FIG. 16.
FIG. 19 is a schematic block diagram of a seventh embodiment of a
demodulation apparatus according to the present invention.
FIG. 20 is a detailed block diagram of one possible configuration of a
selection control unit incorporated in the demodulation apparatus of FIG.
19.
FIG. 21 is a schematic block diagram of an eighth embodiment of a
demodulation apparatus according to the present invention.
FIG. 22 is a timing chart for outputs and operations of first and second
demodulators in the demodulation apparatus of FIG. 21.
FIG. 23 is a schematic block diagram of a ninth embodiment of a
demodulation apparatus according to the present invention.
FIG. 24 is a timing chart for various inputs and outputs in the
demodulation apparatus of FIG. 23.
FIG. 25 is a graph of a bit error rate as a function of a delay interval,
for the demodulation apparatus of FIG. 23, for the demodulation apparatus
using only an equalizer, and for the demodulation apparatus using only a
differential detector.
FIG. 26 is a graph of a rate of use of an equalizer and a differential
detector as a function of a delay interval, for the demodulation apparatus
of FIG. 23.
FIG. 27 is a detailed block diagram of one example of a configuration for
the demodulation apparatus of FIG. 23.
FIG. 28 is a schematic block diagram of a tenth embodiment of a
demodulation apparatus according to the present invention.
FIG. 29 is a schematic block diagram of one variation of the demodulation
apparatus of FIG. 28.
FIG. 30 is a schematic block diagram of another variation of the
demodulation apparatus of FIG. 28.
FIG. 31 is a schematic block diagram of an eleventh embodiment of a
demodulation apparatus according to the present invention.
FIG. 32 is a schematic block diagram of a twelfth embodiment of a
demodulation apparatus according to the present invention.
FIG. 33 is a detailed block diagram of an equalizer in the demodulation
apparatus of FIG. 32.
FIG. 34 is an illustration of an input data used in the demodulation
apparatus of FIG. 32.
FIG. 35 is a schematic block diagram of a thirteenth embodiment of a
demodulation apparatus according to the present invention.
FIG. 36 is a schematic block diagram of a fourteenth embodiment of a
demodulation apparatus according to the present invention.
FIG. 37 is a schematic block diagram of a fifteenth embodiment of a
demodulation apparatus according to the present invention.
FIG. 38 is an illustration of an input data used in the demodulation
apparatus of FIG. 37.
FIG. 39 is a schematic block diagram of one variation of a demodulation
apparatus according to the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now to FIG. 3, a first embodiment of a demodulation apparatus
according to the present invention will be described in detail.
In this embodiment, the demodulation apparatus comprises: a distributor 100
for distributing a received input signal into two passages; a first
demodulator 102 incorporating an adaptive equalizer which is connected
with one of the two passages coming from the distributor 100; a second
demodulator 104 without an adaptive equalizer which is connected with the
other one of the two passages coming from the distributor 100; a bit code
comparison device 106 for comparing bit codes of the output signals from
the first and second demodulators 102 and 104, a switch 108 for connecting
an output of one of the first and second demodulators 102 and 104 while
disconnecting the other one; and a switch control unit 110 for controlling
the switch 108 in accordance with the result of comparison obtained by the
bit code comparison device 106.
In this demodulation apparatus, a received input signal is distributed by
the distributor 100 to the first and second demodulators 102 and 104. The
first demodulator 102 incorporates the adaptive equalizer capable of
compensating the communication path distortion due to the presence of
multipath, and obtains a digital signal by demodulating the received input
signal after the communication path distortion is compensated. On the
other hand, the second demodulator 104 does not incorporate an adaptive
equalizer, and obtains a digital signal by demodulating the received input
signal directly. The bit code comparison device 106 compares the bit codes
of the output digital signals from the first and second demodulators 102
and 104, in order to measure a rate of non-coincidence D of the bit codes,
for a prescribed period of time such as a period for N bursts in a case of
TDMA for instance. The bit code comparison device 106 also compares the
measured rate of non-coincidence D with a prescribed threshold rate of
non-coincidence Dc, and outputs a selection signal for indicating to the
switch control unit 110 a selection of the first demodulator 102 in a case
D>Dc, or of the second demodulator 104 otherwise. The switch control unit
110 then controls the switch 108 according to the indication of the
selection signal from the bit code comparison device 106, so as to connect
the indicated one of the first and second demodulators 102 and 104 while
disconnecting the other one.
This selection on a basis of the rate of non-coincidence of the bit codes
is effective in selecting one of the demodulators 102 and 104 which has a
lower bit error rate. This is because, as shown in a graph of a bit error
rate as a function of a multipath delay interval in FIG. 4 for a condition
of E.sub.b /N.sub.0 =20 dB, the bit error rate resulting from the first
demodulator 102 incorporating the adaptive equalizer, which is indicated
by a curve A, is relatively low for the large multipath delay interval
compared with the bit error rate resulting from the second demodulator 104
without an adaptive equalizer, which is indicated by a curve B, while for
the small multipath delay interval the bit error rate resulting from the
first demodulator 102 is relatively high compared with the bit error rate
resulting from the second demodulator 104. Now, for the multipath delay
interval belonging to the left of an intersection C of the curves A and B,
the rate of non-coincidence is about 10.sup.-2, while for the multipath
delay interval corresponding to the intersection C, the rate of
non-coincidence is less than 2.times.10.sup.-2, and for the multipath
delay interval belonging to the right of the intersection C, the rate of
non-coincidence becomes much greater than 2.times.10.sup.-2. Thus, by
setting the threshold rate of non-coincidence Dc to 10.sup.-2, one of the
demodulators 102 and 104 which has a lower bit error rate can be selected.
In this selection process, the entire demodulated signal corresponding to
the entire received input signal which includes a training signal part and
a data signal part is used in measuring the rate of non-coincidence, so
that a time required for selecting one of the demodulators 102 and 104
which has a lower bit error rate is very short, compared with a
conventional demodulation apparatus which utilizes only the training
signal part of the received input signal in determining the bit error
rate.
Referring now to FIG. 5, a second embodiment of a demodulation apparatus
according to the present invention will be described in detail.
In this embodiment, the demodulation apparatus comprises: a demodulator 112
for orthogonally demodulating the received input signal in order to obtain
baseband signal; a distributor 114 for distributing a received input
signal into two passages; a first detector 116 incorporating an adaptive
equalizer which is connected with one of the two passages coming from the
distributor 114; a second detector 118 without an adaptive equalizer which
is connected with the other one of the two passages coming from the
distributor 114; a bit code comparison device 120 for comparing bit codes
of the output signals from the first and second detectors 116 and 118, a
switch 124 for connecting an output of one of the first and second
detectors 116 and 118 while disconnecting the other one; and a switch
control unit 122 for controlling the switch 124 in accordance with the
result of comparison obtained by the bit code comparison device 120.
In this demodulation apparatus, a received input signal is converted into
the baseband signal first at the demodulator 112, and then distributed by
the distributor 114 to the first and second detectors 116 and 118. The
first detector 116 incorporates the adaptive equalizer capable of
compensating the communication path distortion due to the presence of
multipath, so as to obtain a digital signal corresponding to the received
input signal with the multipath communication path distortion compensated.
On the other hand, the second detector 118 does not incorporate an
adaptive equalizer, and obtains a digital signal corresponding to the
received input signal without the compensation of the multipath
communication path distortion. The bit code comparison device 120 compares
the bit codes of the output digital signals from the first and second
detectors 116 and 118 in order to measure a rate of non-coincidence D of
the bit codes, for a prescribed period of time, and compares the measured
rate of non-coincidence D with a prescribed threshold rate of
non-coincidence Dc, and then outputs a selection signal for indicating to
the switch control unit 122 a selection of the first detector 116 in a
case D>Dc, or of the second detector 118 otherwise. The switch control
unit 122 then controls the switch 124 according to the indication of the
selection signal from the bit code comparison device 120, so as to connect
the indicated one of the first and second detectors 116 and 118 while
disconnecting the other one.
Thus, in this demodulation apparatus of the second embodiment, the common
functions of the first and second demodulators in the first embodiment
described above which are related to functions other than the wave
detection are commonly attributed to the demodulator 112, while the
function of the wave detection is provided by the first and second
detectors 116 and 118. As a consequence, this configuration is capable of
realizing a simplified configuration, a compact size, and a lower
operation power for the demodulation apparatus as a whole, which makes
this embodiment particularly suitable for applications to the automobile
telephone or the portable telephone for which the allowable size and power
consumption of the apparatus are severely limited.
Referring now to FIG. 6, a third embodiment of a demodulation apparatus
according to the present invention will be described in detail.
In this embodiment, the demodulation apparatus comprises: a distributor 126
for distributing a received input signal into two passages; a first
demodulator 128 incorporating an adaptive equalizer which is connected
with one of the two passages coming from the distributor 126; a second
demodulator 130 without an adaptive equalizer which is connected with the
other one of the two passages coming from the distributor 126; a first eye
aperture measurement unit 132 for measuring an eye aperture of the output
signal of the first demodulator 128; a second eye aperture measurement
unit 134 for measuring an eye aperture of the output signal of the second
demodulator 130; a comparator 135 for comparing the eye apertures measured
by the first and second eye aperture measurement units 132 and 134; a
switch 136 for connecting an output of one of the first and second
demodulators 128 and 130 while disconnecting the other one in accordance
with the result of comparison obtained by the comparator 135.
In this demodulation apparatus, a received input signal is distributed by
the distributor 126 to the first and second demodulators 128 and 130. The
first demodulator 128 incorporates the adaptive equalizer capable of
compensating the communication path distortion due to the presence of
multipath, and obtains a digital signal by demodulating the received input
signal after the communication path distortion is compensated. On the
other hand, the second demodulator 130 does not incorporate an adaptive
equalizer, and obtains a digital signal by demodulating the received input
signal directly.
The first and second eye aperture measurement units 132 and 134 then
measure the eye apertures of the output signals of the first and second
demodulators 128 and 130. Here, the eye aperture is a quantity indicating
how widely opened region is left out by the baseband signal sequence in a
diagram in which the baseband signals are depicted as waveform patterns
along a time axis scaled by the bit periods. Namely as shown in FIG. 7(A),
in the presence of the multipath, the eye aperture tends to be narrower
(smaller), whereas as shown in FIG. 7(B), in the absence of the multipath,
the eye aperture tends to be wider (larger). Thus, by measuring the eye
aperture, how much the received input signal is affected by the multipath
can be assessed.
Each of these first and second eye aperture measurement units 132 and 134
has a configuration as shown in FIG. 8. Namely, in each eye aperture
measurement unit, a bit code of the input signal is judged by a judgement
device 138 whose output result is multiplied by the input signal at a
multiplier 140. Then, a first integrator 142 obtains an average signal
level, while a neighboring signal difference extraction device 144, a self
squaring device 146, and a second integrator 148 obtain an average noise
level. Then, the obtained average signal level is divided by the obtained
average noise level at a divider 150 to obtain the eye aperture. Here, by
setting the integration period of the first and second integrators 142 and
148 to a burst period or a bit code block period of the input signal, the
selection of the first and second demodulators 128 and 130 can be made at
intervals of a period of the burst period or the bit code block period.
The eye aperture measured by the first and second eye aperture measurement
units 132 and 134 are then compared by the comparator 135, which outputs a
selection signal for controlling the switch 136, such that the first
demodulator 128 is selected in a case the eye aperture measured by the
first eye aperture measurement unit 132 is larger than the eye aperture
measured by the second eye aperture measurement unit 134, and that the
second demodulator 130 is selected otherwise, in order to connect the
indicated one of the first and second demodulators 128 and 130 while
disconnecting the other one.
This demodulation apparatus of the third embodiment has an advantage that
the determination of the bit error rate is unaffected by a fading. Namely,
the electric field strength of the received input signal becomes extremely
low in a case of the flat fading in which it often occurs that the
demodulation becomes impossible for the entire one burst period as the
training sequence falls into the valley of the fading. In such a case of
the flat fading, the demodulation can be performed more effectively by the
differential detector of the demodulator alone, without the equalizer.
Moreover, the differential detector can demodulate the data signal part
alone even when the demodulation of the training signal part failed. Thus,
in a case the equalizer fails to converge, more satisfactory bit error
rate can be obtained by using the output of the differential detector in
the demodulator without the equalizer.
Now, the occurrence of the flat fading can be detected by comparing the eye
apertures of the outputs of the first and second demodulators 128 and 130
as described above. Namely, the eye aperture of the output from the
equalizer never becomes large. In particular, when the high speed
synchronization algorithm such as an RLS algorithm is used for the
equalizer, the equalizer either converges or diverges completely, so that
the eye aperture is narrow whenever the equalizer fails to converge. On
the other hand, the eye aperture of the output of the differential
detector is wide as long as the S/N ratio is sufficiently high and the
multipath delay spread is not so large. On the other hand, when the
multipath delay spread is rather large, it becomes less likely that the
training sequence falls into a valley of the fading, so that the equalizer
can operate properly. Thus, the occurrence of the flat fading can be
detected by comparing the eye apertures of the outputs of the first and
second demodulators 128 and 130, and the satisfactory bit error rate can
be obtained consistently by selecting one of the first and second
demodulators 128 and 130 which has the larger eye aperture.
It is to be noted that the inclusion of the differential detector in this
embodiment only amounts to 1% increase of the hardware size, because the
size of the hardware required for the tap coefficient modification
algorithm for the equalizer in the mobile communication system such as the
Kalman algorithm and the RLS algorithm is several tens of times greater
than the hardware size of the differential detector. Thus, not much of the
complication is introduced to the configuration of the demodulation
apparatus in this embodiment.
Referring now to FIGS. 9 to 12, several variations of the third embodiment
of the demodulation apparatus described above will be described.
First, as shown in FIG. 9, the third embodiment of FIG. 6 may be modified
to further include the first and second memory units 154 and 155 between
the switch 136 and each of the first and second demodulators 128 and 130,
respectively. In this configuration of FIG. 9, the outputs of the first
and second demodulators 128 and 130 are temporarily stored in the memory
units 154 and 155 while the first and second eye aperture measurement
units 132 and 134 measures the eye apertures. The output stored in one of
the memory units 154 and 155 is then selected by the switch 136, as the
comparator 135 controls the switch 136 according to the measured results
of the eye apertures.
This configuration of FIG. 9 is capable of improving the reliability of the
demodulation apparatus because the correspondence between the eye
apertures and the reliability of the demodulated digital signals can be
made rigorous. Here, it is preferable to take an average of the eye
aperture over the entire range of the training sequence as the measured
result of the eye aperture.
Secondly, the third embodiment of FIG. 6 may be modified such that a block
FEC (feedforward error correction) is applied on the received input signal
at a transmitter side. In this case, it is preferable to perform the
measurement of the eye apertures in the bit code block period of the
demodulated digital signal outputs from the first and second demodulators
128 and 130.
Thirdly, as shown in FIG. 10, the third embodiment of FIG. 6 may be
modified to further include an AGC (automatic gain control) unit 158
before the second demodulator 130, in which case the second eye aperture
measurement unit 134 of FIG. 6 may be replaced by an eye aperture
measurement unit 160 shown in FIG. 10. In this eye aperture measurement
unit 160, a bit code of the input signal is judged by a judgement device
162 whose output result is subtracted from the input signal at a
subtractor 164. Then, the eye aperture is obtained by a self squaring
device 166, and an integrator 168 from the difference signal obtained by
the subtractor 164. In this case, the output of the eye aperture
measurement unit 160 becomes smaller when the eye aperture is larger.
Fourthly, as shown in FIG. 11, the first demodulator 128 of the third
embodiment may includes a decision feedback equalizer 170 shown in FIG.
11, in which case the first eye aperture measurement unit 132 of FIG. 6
may be replaced by an eye aperture measurement unit 172 shown in FIG. 11.
In this eye aperture measurement unit 172, the eye aperture is obtained by
the self squaring device 174 and an integrator 176 from the error signal
e(t) to be used for the tap coefficient modification for the decision
feedback equalizer 170.
Lastly, when the characteristics of the first and the second eye aperture
measurement units are different, such as when the eye aperture measurement
unit of FIG. 10 or FIG. 11 is used, such a difference of the
characteristics may be compensated by incorporating, as shown in FIG. 12,
a correction unit 178 before the comparator 135 for multiplying the
signals with an appropriate set of correction coefficients, so as to
obtain the minimum bit error rate. Here, such a correction unit 178 may be
incorporated on one of the inputs for the comparator 135 as shown in FIG.
12, or on both of the inputs.
Referring now to FIG. 13, a fou | | |
