A multiprocessor system having global data replicated in all local memories, each local memory related to one of the system central processing units (CPUs), where consistency of the global data in each of the local memories is provided by a global write procedure according to which an agent CPUZ, willing to modify a global data in its own local memory, issues a write command on the system bus for performing the write operation in the local memory of another destination CPU of the system and characterizes the write command as a global write, so that all the CPUs connected to the system bus (including CPUZ) detect such command, perform such write operation in their related local memory and provide the destination CPU with a signal indicative of a performed write operation, so that the destination CPU, as "replier", may signal to CPUZ the successful execution of the global write. By this procedure, it is possible to use standard, commercially available system bus and interface circuits which require, for correct execution of the system bus protocol, the activation of both an "agent" or requesting processor and a "replier" or destination processor.
A flash memory device having a plurality of flash array blocks and a block status register circuit containing a block status register for storing a block status for each flash array block. A flash array controller circuit in the flash memory device performs program or erase operations on the flash array blocks, and maintains the block status in each block status register. An interface circuit in the flash memory device enables read access of the block status registers over a bus.
The present invention relates to means, a method and a computer program product of administrating in a computer system a global data element shared by a multitude of exploiters within said computer system for reducing contention among said exploiters. It is suggested to execute a first step by a first exploiter of accumulating one or a multitude of modifications performed by said first exploiter with respect to the current contents of said global data element into a first local data element not shared by other exploiters. In a second step executed by the first exploiter a size of the accumulated modifications in the first local data element with respect to the current contents of the global data element is determined. Moreover it is determined, if said size exceeds a specified quantum. If said size exceeds the specified quantum, the global data element is updated with the accumulated modifications as new contents.
An apparatus and method, using an inter-processor lock to control access to inter-process relationship data structures in the memory of each processor in a multiprocessor system. The apparatus and method insure that each inter-process relationship is modified in the same sequence on each processor. The apparatus and method also insure that an inter-process relationship is maintained in a consistent state in the face of failure of any of the processors.
A computer system optimized for block copy operations is provided. In order to perform a block copy from a remote source block to a local destination block, a processor within a local node of the computer system performs a specially coded write operation. The local node, upon detection of the specially coded write operation, performs a read operation to the source block in the remote node. Concurrently, the write operation is allowed to complete in the local node such that the processor may proceed with subsequent computing tasks while the local node completes the copy operation. The read from the remote node and subsequent storage of the data in the local node is completed by the local node, not by the processor. In one specific embodiment, the specially coded write operation is indicated using certain most significant bits of the address of the write operation. The address identifies the destination coherency unit within the local node, and a translation of the address to a global address identifies the source coherency unit. Subsequent to completion of the copy operation, the destination coherency unit may be accessed in the local node.
A multiprocessor system having a redundant shared memory configuration includes a plurality of processors, each of which are connected to a shared system bus; and a plurality of shared system memory modules, e.g., dual shared system memory modules connected to the shared system bus. A first processor module is operative to write data in one of dual shared system memory modules and subsequently write the data in the other memory module, so as to ensure that the data in both dual shared system memory modules are equivalent to each other. A second processor module monitors a status of the first processor module, and discriminates whether a write operation for the other memory module is finished in normal termination or in abnormal termination in the case where the first processor module stopped operating. The second processor module copies data starting from the address of a first data in the unsuccessfully copied data from the first memory module to the second memory module.
